projects / people / arne_f / kernel.git / blame
| Commit | Line | Data |
|---|---|---|
| b2441318 | 1 | /* SPDX-License-Identifier: GPL-2.0 */ |
| 58d08319 JN |
2 | #ifndef __reg_map_asm_h |
| 3 | #define __reg_map_asm_h | |
| 4 | ||
| 5 | /* | |
| 6 | * This file is autogenerated from | |
| 7 | * file: reg.rmap | |
| 8 | * | |
| 9 | * by ../../../tools/rdesc/bin/rdes2c -asm -base 0xb0000000 -map marb_bar.r marb_foo.r ccd_top.r ccd_stat.r ccd_tg.r ccd_dp.r ccd.r iop_sap_in.r iop_sap_out.r iop_sw_cfg.r iop_sw_cpu.r iop_sw_mpu.r iop_sw_spu.r iop_version.r iop_crc_par.r iop_dmc_in.r iop_dmc_out.r iop_fifo_in_extra.r iop_fifo_in.r iop_fifo_out_extra.r iop_fifo_out.r iop_mc.r iop_mpu.r iop_scrc_in.r iop_scrc_out.r iop_spu.r iop_timer_grp.r iop_trigger_grp.r iop.r -outfile reg_map_asm.h reg.rmap | |
| 10 | * Any changes here will be lost. | |
| 11 | * | |
| 12 | * -*- buffer-read-only: t -*- | |
| 13 | */ | |
| 14 | #define regi_ccd 0xb0000000 | |
| 15 | #define regi_ccd_top 0xb0000000 | |
| 16 | #define regi_ccd_dp 0xb0000400 | |
| 17 | #define regi_ccd_stat 0xb0000800 | |
| 18 | #define regi_ccd_tg 0xb0001000 | |
| 19 | #define regi_cfg 0xb0002000 | |
| 20 | #define regi_clkgen 0xb0004000 | |
| 21 | #define regi_ddr2_ctrl 0xb0006000 | |
| 22 | #define regi_dma0 0xb0008000 | |
| 23 | #define regi_dma1 0xb000a000 | |
| 24 | #define regi_dma11 0xb000c000 | |
| 25 | #define regi_dma2 0xb000e000 | |
| 26 | #define regi_dma3 0xb0010000 | |
| 27 | #define regi_dma4 0xb0012000 | |
| 28 | #define regi_dma5 0xb0014000 | |
| 29 | #define regi_dma6 0xb0016000 | |
| 30 | #define regi_dma7 0xb0018000 | |
| 31 | #define regi_dma9 0xb001a000 | |
| 32 | #define regi_eth 0xb001c000 | |
| 33 | #define regi_gio 0xb0020000 | |
| 34 | #define regi_h264 0xb0022000 | |
| 35 | #define regi_hist 0xb0026000 | |
| 36 | #define regi_iop 0xb0028000 | |
| 37 | #define regi_iop_version 0xb0028000 | |
| 38 | #define regi_iop_fifo_in_extra 0xb0028040 | |
| 39 | #define regi_iop_fifo_out_extra 0xb0028080 | |
| 40 | #define regi_iop_trigger_grp0 0xb00280c0 | |
| 41 | #define regi_iop_trigger_grp1 0xb0028100 | |
| 42 | #define regi_iop_trigger_grp2 0xb0028140 | |
| 43 | #define regi_iop_trigger_grp3 0xb0028180 | |
| 44 | #define regi_iop_trigger_grp4 0xb00281c0 | |
| 45 | #define regi_iop_trigger_grp5 0xb0028200 | |
| 46 | #define regi_iop_trigger_grp6 0xb0028240 | |
| 47 | #define regi_iop_trigger_grp7 0xb0028280 | |
| 48 | #define regi_iop_crc_par 0xb0028300 | |
| 49 | #define regi_iop_dmc_in 0xb0028380 | |
| 50 | #define regi_iop_dmc_out 0xb0028400 | |
| 51 | #define regi_iop_fifo_in 0xb0028480 | |
| 52 | #define regi_iop_fifo_out 0xb0028500 | |
| 53 | #define regi_iop_scrc_in 0xb0028580 | |
| 54 | #define regi_iop_scrc_out 0xb0028600 | |
| 55 | #define regi_iop_timer_grp0 0xb0028680 | |
| 56 | #define regi_iop_timer_grp1 0xb0028700 | |
| 57 | #define regi_iop_sap_in 0xb0028800 | |
| 58 | #define regi_iop_sap_out 0xb0028900 | |
| 59 | #define regi_iop_spu 0xb0028a00 | |
| 60 | #define regi_iop_sw_cfg 0xb0028b00 | |
| 61 | #define regi_iop_sw_cpu 0xb0028c00 | |
| 62 | #define regi_iop_sw_mpu 0xb0028d00 | |
| 63 | #define regi_iop_sw_spu 0xb0028e00 | |
| 64 | #define regi_iop_mpu 0xb0029000 | |
| 65 | #define regi_irq 0xb002a000 | |
| 66 | #define regi_jpeg 0xb002c000 | |
| 67 | #define regi_l2cache 0xb0030000 | |
| 68 | #define regi_marb_bar 0xb0032000 | |
| 69 | #define regi_marb_bar_bp0 0xb0032140 | |
| 70 | #define regi_marb_bar_bp1 0xb0032180 | |
| 71 | #define regi_marb_bar_bp2 0xb00321c0 | |
| 72 | #define regi_marb_bar_bp3 0xb0032200 | |
| 73 | #define regi_marb_foo 0xb0034000 | |
| 74 | #define regi_marb_foo_bp0 0xb0034280 | |
| 75 | #define regi_marb_foo_bp1 0xb00342c0 | |
| 76 | #define regi_marb_foo_bp2 0xb0034300 | |
| 77 | #define regi_marb_foo_bp3 0xb0034340 | |
| 78 | #define regi_pinmux 0xb0038000 | |
| 79 | #define regi_pio 0xb0036000 | |
| 80 | #define regi_sclr 0xb003a000 | |
| 81 | #define regi_sclr_fifo 0xb003c000 | |
| 82 | #define regi_ser0 0xb003e000 | |
| 83 | #define regi_ser1 0xb0040000 | |
| 84 | #define regi_ser2 0xb0042000 | |
| 85 | #define regi_ser3 0xb0044000 | |
| 86 | #define regi_ser4 0xb0046000 | |
| 87 | #define regi_sser 0xb0048000 | |
| 88 | #define regi_strcop 0xb004a000 | |
| 89 | #define regi_strdma0 0xb004e000 | |
| 90 | #define regi_strdma1 0xb0050000 | |
| 91 | #define regi_strdma2 0xb0052000 | |
| 92 | #define regi_strdma3 0xb0054000 | |
| 93 | #define regi_strdma5 0xb0056000 | |
| 94 | #define regi_strmux 0xb004c000 | |
| 95 | #define regi_timer0 0xb0058000 | |
| 96 | #define regi_timer1 0xb005a000 | |
| 97 | #define regi_trace 0xb005c000 | |
| 98 | #define regi_vin 0xb005e000 | |
| 99 | #define regi_vout 0xb0060000 | |
| 100 | #endif /* __reg_map_asm_h */ |