projects / thirdparty / linux.git / blame
| Commit | Line | Data |
|---|---|---|
| b2441318 | 1 | /* SPDX-License-Identifier: GPL-2.0 */ |
| 58d08319 JN |
2 | #ifndef __reg_map_h |
| 3 | #define __reg_map_h | |
| 4 | ||
| 5 | /* | |
| 6 | * This file is autogenerated from | |
| 7 | * file: ../../mod/fakereg.rmap | |
| 8 | * id: fakereg.rmap,v 1.3 2004/02/11 19:53:22 ronny Exp | |
| 9 | * last modified: Wed Feb 11 20:53:25 2004 | |
| 10 | * file: ../../rtl/global.rmap | |
| 11 | * id: global.rmap,v 1.3 2003/08/18 15:08:23 mikaeln Exp | |
| 12 | * last modified: Mon Aug 18 17:08:23 2003 | |
| 13 | * file: ../../mod/modreg.rmap | |
| 14 | * id: modreg.rmap,v 1.31 2004/02/20 15:40:04 stefans Exp | |
| 15 | * last modified: Fri Feb 20 16:40:04 2004 | |
| 16 | * | |
| 17 | * by /n/asic/design/tools/rdesc/src/rdes2c -map -base 0xb0000000 ../../rtl/global.rmap ../../mod/modreg.rmap ../../inst/io_proc/rtl/guinness/iop_top.r ../../inst/memarb/rtl/guinness/marb_top.r ../../mod/fakereg.rmap | |
| 18 | * id: $Id: reg_map.h,v 1.1 2007/02/13 11:55:30 starvik Exp $ | |
| 19 | * Any changes here will be lost. | |
| 20 | * | |
| 21 | * -*- buffer-read-only: t -*- | |
| 22 | */ | |
| 23 | typedef enum { | |
| 24 | regi_ata = 0xb0032000, | |
| 25 | regi_bif_core = 0xb0014000, | |
| 26 | regi_bif_dma = 0xb0016000, | |
| 27 | regi_bif_slave = 0xb0018000, | |
| 28 | regi_config = 0xb003c000, | |
| 29 | regi_dma0 = 0xb0000000, | |
| 30 | regi_dma1 = 0xb0002000, | |
| 31 | regi_dma2 = 0xb0004000, | |
| 32 | regi_dma3 = 0xb0006000, | |
| 33 | regi_dma4 = 0xb0008000, | |
| 34 | regi_dma5 = 0xb000a000, | |
| 35 | regi_dma6 = 0xb000c000, | |
| 36 | regi_dma7 = 0xb000e000, | |
| 37 | regi_dma8 = 0xb0010000, | |
| 38 | regi_dma9 = 0xb0012000, | |
| 39 | regi_eth0 = 0xb0034000, | |
| 40 | regi_eth1 = 0xb0036000, | |
| 41 | regi_gio = 0xb001a000, | |
| 42 | regi_iop = 0xb0020000, | |
| 43 | regi_iop_version = 0xb0020000, | |
| 44 | regi_iop_fifo_in0_extra = 0xb0020040, | |
| 45 | regi_iop_fifo_in1_extra = 0xb0020080, | |
| 46 | regi_iop_fifo_out0_extra = 0xb00200c0, | |
| 47 | regi_iop_fifo_out1_extra = 0xb0020100, | |
| 48 | regi_iop_trigger_grp0 = 0xb0020140, | |
| 49 | regi_iop_trigger_grp1 = 0xb0020180, | |
| 50 | regi_iop_trigger_grp2 = 0xb00201c0, | |
| 51 | regi_iop_trigger_grp3 = 0xb0020200, | |
| 52 | regi_iop_trigger_grp4 = 0xb0020240, | |
| 53 | regi_iop_trigger_grp5 = 0xb0020280, | |
| 54 | regi_iop_trigger_grp6 = 0xb00202c0, | |
| 55 | regi_iop_trigger_grp7 = 0xb0020300, | |
| 56 | regi_iop_crc_par0 = 0xb0020380, | |
| 57 | regi_iop_crc_par1 = 0xb0020400, | |
| 58 | regi_iop_dmc_in0 = 0xb0020480, | |
| 59 | regi_iop_dmc_in1 = 0xb0020500, | |
| 60 | regi_iop_dmc_out0 = 0xb0020580, | |
| 61 | regi_iop_dmc_out1 = 0xb0020600, | |
| 62 | regi_iop_fifo_in0 = 0xb0020680, | |
| 63 | regi_iop_fifo_in1 = 0xb0020700, | |
| 64 | regi_iop_fifo_out0 = 0xb0020780, | |
| 65 | regi_iop_fifo_out1 = 0xb0020800, | |
| 66 | regi_iop_scrc_in0 = 0xb0020880, | |
| 67 | regi_iop_scrc_in1 = 0xb0020900, | |
| 68 | regi_iop_scrc_out0 = 0xb0020980, | |
| 69 | regi_iop_scrc_out1 = 0xb0020a00, | |
| 70 | regi_iop_timer_grp0 = 0xb0020a80, | |
| 71 | regi_iop_timer_grp1 = 0xb0020b00, | |
| 72 | regi_iop_timer_grp2 = 0xb0020b80, | |
| 73 | regi_iop_timer_grp3 = 0xb0020c00, | |
| 74 | regi_iop_sap_in = 0xb0020d00, | |
| 75 | regi_iop_sap_out = 0xb0020e00, | |
| 76 | regi_iop_spu0 = 0xb0020f00, | |
| 77 | regi_iop_spu1 = 0xb0021000, | |
| 78 | regi_iop_sw_cfg = 0xb0021100, | |
| 79 | regi_iop_sw_cpu = 0xb0021200, | |
| 80 | regi_iop_sw_mpu = 0xb0021300, | |
| 81 | regi_iop_sw_spu0 = 0xb0021400, | |
| 82 | regi_iop_sw_spu1 = 0xb0021500, | |
| 83 | regi_iop_mpu = 0xb0021600, | |
| 84 | regi_irq = 0xb001c000, | |
| 85 | regi_irq2 = 0xb005c000, | |
| 86 | regi_marb = 0xb003e000, | |
| 87 | regi_marb_bp0 = 0xb003e240, | |
| 88 | regi_marb_bp1 = 0xb003e280, | |
| 89 | regi_marb_bp2 = 0xb003e2c0, | |
| 90 | regi_marb_bp3 = 0xb003e300, | |
| 91 | regi_pinmux = 0xb0038000, | |
| 92 | regi_ser0 = 0xb0026000, | |
| 93 | regi_ser1 = 0xb0028000, | |
| 94 | regi_ser2 = 0xb002a000, | |
| 95 | regi_ser3 = 0xb002c000, | |
| 96 | regi_sser0 = 0xb0022000, | |
| 97 | regi_sser1 = 0xb0024000, | |
| 98 | regi_strcop = 0xb0030000, | |
| 99 | regi_strmux = 0xb003a000, | |
| 100 | regi_timer = 0xb001e000, | |
| 101 | regi_timer0 = 0xb001e000, | |
| 102 | regi_timer2 = 0xb005e000, | |
| 103 | regi_trace = 0xb0040000, | |
| 104 | } reg_scope_instances; | |
| 105 | #endif /* __reg_map_h */ |