[thirdparty/kernel/linux.git] / arch / ia64 / include / asm / mca.h

/* SPDX-License-Identifier: GPL-2.0 */
/*
 * File:	mca.h
 * Purpose:	Machine check handling specific defines
 *
 * Copyright (C) 1999, 2004 Silicon Graphics, Inc.
 * Copyright (C) Vijay Chander <vijay@engr.sgi.com>
 * Copyright (C) Srinivasa Thirumalachar <sprasad@engr.sgi.com>
 * Copyright (C) Russ Anderson <rja@sgi.com>
 */

#ifndef _ASM_IA64_MCA_H
#define _ASM_IA64_MCA_H

#if !defined(__ASSEMBLY__)

#include <linux/interrupt.h>
#include <linux/types.h>

#include <asm/param.h>
#include <asm/sal.h>
#include <asm/processor.h>
#include <asm/mca_asm.h>

#define IA64_MCA_RENDEZ_TIMEOUT		(20 * 1000)	/* value in milliseconds - 20 seconds */

typedef struct ia64_fptr {
	unsigned long fp;
	unsigned long gp;
} ia64_fptr_t;

typedef union cmcv_reg_u {
	u64	cmcv_regval;
	struct	{
		u64	cmcr_vector		: 8;
		u64	cmcr_reserved1		: 4;
		u64	cmcr_ignored1		: 1;
		u64	cmcr_reserved2		: 3;
		u64	cmcr_mask		: 1;
		u64	cmcr_ignored2		: 47;
	} cmcv_reg_s;

} cmcv_reg_t;

#define cmcv_mask		cmcv_reg_s.cmcr_mask
#define cmcv_vector		cmcv_reg_s.cmcr_vector

enum {
	IA64_MCA_RENDEZ_CHECKIN_NOTDONE	=	0x0,
	IA64_MCA_RENDEZ_CHECKIN_DONE	=	0x1,
	IA64_MCA_RENDEZ_CHECKIN_INIT	=	0x2,
	IA64_MCA_RENDEZ_CHECKIN_CONCURRENT_MCA	=	0x3,
};

/* Information maintained by the MC infrastructure */
typedef struct ia64_mc_info_s {
	u64		imi_mca_handler;
	size_t		imi_mca_handler_size;
	u64		imi_monarch_init_handler;
	size_t		imi_monarch_init_handler_size;
	u64		imi_slave_init_handler;
	size_t		imi_slave_init_handler_size;
	u8		imi_rendez_checkin[NR_CPUS];

} ia64_mc_info_t;

/* Handover state from SAL to OS and vice versa, for both MCA and INIT events.
 * Besides the handover state, it also contains some saved registers from the
 * time of the event.
 * Note: mca_asm.S depends on the precise layout of this structure.
 */

struct ia64_sal_os_state {

	/* SAL to OS */
	unsigned long		os_gp;			/* GP of the os registered with the SAL, physical */
	unsigned long		pal_proc;		/* PAL_PROC entry point, physical */
	unsigned long		sal_proc;		/* SAL_PROC entry point, physical */
	unsigned long		rv_rc;			/* MCA - Rendezvous state, INIT - reason code */
	unsigned long		proc_state_param;	/* from R18 */
	unsigned long		monarch;		/* 1 for a monarch event, 0 for a slave */

	/* common */
	unsigned long		sal_ra;			/* Return address in SAL, physical */
	unsigned long		sal_gp;			/* GP of the SAL - physical */
	pal_min_state_area_t	*pal_min_state;		/* from R17.  physical in asm, virtual in C */
	/* Previous values of IA64_KR(CURRENT) and IA64_KR(CURRENT_STACK).
	 * Note: if the MCA/INIT recovery code wants to resume to a new context
	 * then it must change these values to reflect the new kernel stack.
	 */
	unsigned long		prev_IA64_KR_CURRENT;	/* previous value of IA64_KR(CURRENT) */
	unsigned long		prev_IA64_KR_CURRENT_STACK;
	struct task_struct	*prev_task;		/* previous task, NULL if it is not useful */
	/* Some interrupt registers are not saved in minstate, pt_regs or
	 * switch_stack.  Because MCA/INIT can occur when interrupts are
	 * disabled, we need to save the additional interrupt registers over
	 * MCA/INIT and resume.
	 */
	unsigned long		isr;
	unsigned long		ifa;
	unsigned long		itir;
	unsigned long		iipa;
	unsigned long		iim;
	unsigned long		iha;

	/* OS to SAL */
	unsigned long		os_status;		/* OS status to SAL, enum below */
	unsigned long		context;		/* 0 if return to same context
							   1 if return to new context */

	/* I-resources */
	unsigned long		iip;
	unsigned long		ipsr;
	unsigned long		ifs;
};

enum {
	IA64_MCA_CORRECTED	=	0x0,	/* Error has been corrected by OS_MCA */
	IA64_MCA_WARM_BOOT	=	-1,	/* Warm boot of the system need from SAL */
	IA64_MCA_COLD_BOOT	=	-2,	/* Cold boot of the system need from SAL */
	IA64_MCA_HALT		=	-3	/* System to be halted by SAL */
};

enum {
	IA64_INIT_RESUME	=	0x0,	/* Resume after return from INIT */
	IA64_INIT_WARM_BOOT	=	-1,	/* Warm boot of the system need from SAL */
};

enum {
	IA64_MCA_SAME_CONTEXT	=	0x0,	/* SAL to return to same context */
	IA64_MCA_NEW_CONTEXT	=	-1	/* SAL to return to new context */
};

/* Per-CPU MCA state that is too big for normal per-CPU variables.  */

struct ia64_mca_cpu {
	u64 mca_stack[KERNEL_STACK_SIZE/8];
	u64 init_stack[KERNEL_STACK_SIZE/8];
};

/* Array of physical addresses of each CPU's MCA area.  */
extern unsigned long __per_cpu_mca[NR_CPUS];

extern int cpe_vector;
extern int ia64_cpe_irq;
extern void ia64_mca_init(void);
extern void ia64_mca_irq_init(void);
extern void ia64_mca_cpu_init(void *);
extern void ia64_os_mca_dispatch(void);
extern void ia64_os_mca_dispatch_end(void);
extern void ia64_mca_ucmc_handler(struct pt_regs *, struct ia64_sal_os_state *);
extern void ia64_init_handler(struct pt_regs *,
			      struct switch_stack *,
			      struct ia64_sal_os_state *);
extern void ia64_os_init_on_kdump(void);
extern void ia64_monarch_init_handler(void);
extern void ia64_slave_init_handler(void);
extern void ia64_mca_cmc_vector_setup(void);
extern int  ia64_reg_MCA_extension(int (*fn)(void *, struct ia64_sal_os_state *));
extern void ia64_unreg_MCA_extension(void);
extern unsigned long ia64_get_rnat(unsigned long *);
extern void ia64_set_psr_mc(void);
extern void ia64_mca_printk(const char * fmt, ...)
	 __attribute__ ((format (printf, 1, 2)));

struct ia64_mca_notify_die {
	struct ia64_sal_os_state *sos;
	int *monarch_cpu;
	int *data;
};

DECLARE_PER_CPU(u64, ia64_mca_pal_base);

#else	/* __ASSEMBLY__ */

#define IA64_MCA_CORRECTED	0x0	/* Error has been corrected by OS_MCA */
#define IA64_MCA_WARM_BOOT	-1	/* Warm boot of the system need from SAL */
#define IA64_MCA_COLD_BOOT	-2	/* Cold boot of the system need from SAL */
#define IA64_MCA_HALT		-3	/* System to be halted by SAL */

#define IA64_INIT_RESUME	0x0	/* Resume after return from INIT */
#define IA64_INIT_WARM_BOOT	-1	/* Warm boot of the system need from SAL */

#define IA64_MCA_SAME_CONTEXT	0x0	/* SAL to return to same context */
#define IA64_MCA_NEW_CONTEXT	-1	/* SAL to return to new context */

#endif /* !__ASSEMBLY__ */
#endif /* _ASM_IA64_MCA_H */
Commit	Line	Data
b2441318	1	/* SPDX-License-Identifier: GPL-2.0 */
1da177e4 LT	2	/*
	3	* File: mca.h
	4	* Purpose: Machine check handling specific defines
	5	*
	6	* Copyright (C) 1999, 2004 Silicon Graphics, Inc.
fe77efb8 HS	7	* Copyright (C) Vijay Chander <vijay@engr.sgi.com>
	8	* Copyright (C) Srinivasa Thirumalachar <sprasad@engr.sgi.com>
	9	* Copyright (C) Russ Anderson <rja@sgi.com>
1da177e4 LT	10	*/
	11
	12	#ifndef _ASM_IA64_MCA_H
	13	#define _ASM_IA64_MCA_H
	14
1da177e4 LT	15	#if !defined(__ASSEMBLY__)
	16
	17	#include <linux/interrupt.h>
	18	#include <linux/types.h>
	19
	20	#include <asm/param.h>
	21	#include <asm/sal.h>
	22	#include <asm/processor.h>
	23	#include <asm/mca_asm.h>
	24
	25	#define IA64_MCA_RENDEZ_TIMEOUT (20 * 1000) /* value in milliseconds - 20 seconds */
	26
	27	typedef struct ia64_fptr {
	28	unsigned long fp;
	29	unsigned long gp;
	30	} ia64_fptr_t;
	31
	32	typedef union cmcv_reg_u {
	33	u64 cmcv_regval;
	34	struct {
	35	u64 cmcr_vector : 8;
	36	u64 cmcr_reserved1 : 4;
	37	u64 cmcr_ignored1 : 1;
	38	u64 cmcr_reserved2 : 3;
	39	u64 cmcr_mask : 1;
	40	u64 cmcr_ignored2 : 47;
	41	} cmcv_reg_s;
	42
	43	} cmcv_reg_t;
	44
	45	#define cmcv_mask cmcv_reg_s.cmcr_mask
	46	#define cmcv_vector cmcv_reg_s.cmcr_vector
	47
	48	enum {
	49	IA64_MCA_RENDEZ_CHECKIN_NOTDONE = 0x0,
7f613c7d KO	50	IA64_MCA_RENDEZ_CHECKIN_DONE = 0x1,
7f613c7d KO	51	IA64_MCA_RENDEZ_CHECKIN_INIT = 0x2,
1612b18c	52	IA64_MCA_RENDEZ_CHECKIN_CONCURRENT_MCA = 0x3,
1da177e4 LT	53	};
	54
	55	/* Information maintained by the MC infrastructure */
	56	typedef struct ia64_mc_info_s {
	57	u64 imi_mca_handler;
	58	size_t imi_mca_handler_size;
	59	u64 imi_monarch_init_handler;
	60	size_t imi_monarch_init_handler_size;
	61	u64 imi_slave_init_handler;
	62	size_t imi_slave_init_handler_size;
	63	u8 imi_rendez_checkin[NR_CPUS];
	64
	65	} ia64_mc_info_t;
	66
7f613c7d KO	67	/* Handover state from SAL to OS and vice versa, for both MCA and INIT events.
	68	* Besides the handover state, it also contains some saved registers from the
	69	* time of the event.
	70	* Note: mca_asm.S depends on the precise layout of this structure.
	71	*/
	72
	73	struct ia64_sal_os_state {
d270acbc KO	74
d270acbc KO	75	/* SAL to OS */
e088a4ad MW	76	unsigned long os_gp; /* GP of the os registered with the SAL, physical */
	77	unsigned long pal_proc; /* PAL_PROC entry point, physical */
	78	unsigned long sal_proc; /* SAL_PROC entry point, physical */
	79	unsigned long rv_rc; /* MCA - Rendezvous state, INIT - reason code */
	80	unsigned long proc_state_param; /* from R18 */
	81	unsigned long monarch; /* 1 for a monarch event, 0 for a slave */
d270acbc KO	82
d270acbc KO	83	/* common */
e088a4ad MW	84	unsigned long sal_ra; /* Return address in SAL, physical */
e088a4ad MW	85	unsigned long sal_gp; /* GP of the SAL - physical */
7f613c7d	86	pal_min_state_area_t pal_min_state; / from R17. physical in asm, virtual in C */
20bb8685 KO	87	/* Previous values of IA64_KR(CURRENT) and IA64_KR(CURRENT_STACK).
	88	* Note: if the MCA/INIT recovery code wants to resume to a new context
	89	* then it must change these values to reflect the new kernel stack.
	90	*/
e088a4ad MW	91	unsigned long prev_IA64_KR_CURRENT; /* previous value of IA64_KR(CURRENT) */
e088a4ad MW	92	unsigned long prev_IA64_KR_CURRENT_STACK;
7f613c7d KO	93	struct task_struct prev_task; / previous task, NULL if it is not useful */
	94	/* Some interrupt registers are not saved in minstate, pt_regs or
	95	* switch_stack. Because MCA/INIT can occur when interrupts are
	96	* disabled, we need to save the additional interrupt registers over
	97	* MCA/INIT and resume.
	98	*/
e088a4ad MW	99	unsigned long isr;
	100	unsigned long ifa;
	101	unsigned long itir;
	102	unsigned long iipa;
	103	unsigned long iim;
	104	unsigned long iha;
d270acbc KO	105
d270acbc KO	106	/* OS to SAL */
e088a4ad MW	107	unsigned long os_status; /* OS status to SAL, enum below */
e088a4ad MW	108	unsigned long context; /* 0 if return to same context
7f613c7d	109	1 if return to new context */
9ee27c76 TI	110
	111	/* I-resources */
	112	unsigned long iip;
	113	unsigned long ipsr;
	114	unsigned long ifs;
7f613c7d	115	};
1da177e4 LT	116
	117	enum {
	118	IA64_MCA_CORRECTED = 0x0, /* Error has been corrected by OS_MCA */
	119	IA64_MCA_WARM_BOOT = -1, /* Warm boot of the system need from SAL */
	120	IA64_MCA_COLD_BOOT = -2, /* Cold boot of the system need from SAL */
	121	IA64_MCA_HALT = -3 /* System to be halted by SAL */
	122	};
	123
7f613c7d KO	124	enum {
	125	IA64_INIT_RESUME = 0x0, /* Resume after return from INIT */
	126	IA64_INIT_WARM_BOOT = -1, /* Warm boot of the system need from SAL */
	127	};
	128
1da177e4 LT	129	enum {
	130	IA64_MCA_SAME_CONTEXT = 0x0, /* SAL to return to same context */
	131	IA64_MCA_NEW_CONTEXT = -1 /* SAL to return to new context */
	132	};
	133
1da177e4 LT	134	/* Per-CPU MCA state that is too big for normal per-CPU variables. */
	135
	136	struct ia64_mca_cpu {
7f613c7d	137	u64 mca_stack[KERNEL_STACK_SIZE/8];
1da177e4	138	u64 init_stack[KERNEL_STACK_SIZE/8];
7f613c7d	139	};
1da177e4 LT	140
	141	/* Array of physical addresses of each CPU's MCA area. */
	142	extern unsigned long __per_cpu_mca[NR_CPUS];
	143
ff741906 AR	144	extern int cpe_vector;
ff741906 AR	145	extern int ia64_cpe_irq;
1da177e4	146	extern void ia64_mca_init(void);
d303e9e9	147	extern void ia64_mca_irq_init(void);
1da177e4 LT	148	extern void ia64_mca_cpu_init(void *);
	149	extern void ia64_os_mca_dispatch(void);
	150	extern void ia64_os_mca_dispatch_end(void);
7f613c7d KO	151	extern void ia64_mca_ucmc_handler(struct pt_regs , struct ia64_sal_os_state );
	152	extern void ia64_init_handler(struct pt_regs *,
	153	struct switch_stack *,
	154	struct ia64_sal_os_state *);
07a6a4ae	155	extern void ia64_os_init_on_kdump(void);
1da177e4 LT	156	extern void ia64_monarch_init_handler(void);
	157	extern void ia64_slave_init_handler(void);
	158	extern void ia64_mca_cmc_vector_setup(void);
7f613c7d	159	extern int ia64_reg_MCA_extension(int (fn)(void , struct ia64_sal_os_state *));
1da177e4	160	extern void ia64_unreg_MCA_extension(void);
e088a4ad	161	extern unsigned long ia64_get_rnat(unsigned long *);
4295ab34	162	extern void ia64_set_psr_mc(void);
ac542a51 KK	163	extern void ia64_mca_printk(const char * fmt, ...)
ac542a51 KK	164	__attribute__ ((format (printf, 1, 2)));
7f613c7d	165
958b166c KO	166	struct ia64_mca_notify_die {
	167	struct ia64_sal_os_state *sos;
	168	int *monarch_cpu;
4fa2f0e6	169	int *data;
958b166c KO	170	};
958b166c KO	171
29763254 SH	172	DECLARE_PER_CPU(u64, ia64_mca_pal_base);
29763254 SH	173
7f613c7d KO	174	#else /* __ASSEMBLY__ */
	175
	176	#define IA64_MCA_CORRECTED 0x0 /* Error has been corrected by OS_MCA */
	177	#define IA64_MCA_WARM_BOOT -1 /* Warm boot of the system need from SAL */
	178	#define IA64_MCA_COLD_BOOT -2 /* Cold boot of the system need from SAL */
	179	#define IA64_MCA_HALT -3 /* System to be halted by SAL */
	180
	181	#define IA64_INIT_RESUME 0x0 /* Resume after return from INIT */
	182	#define IA64_INIT_WARM_BOOT -1 /* Warm boot of the system need from SAL */
	183
	184	#define IA64_MCA_SAME_CONTEXT 0x0 /* SAL to return to same context */
	185	#define IA64_MCA_NEW_CONTEXT -1 /* SAL to return to new context */
1da177e4 LT	186
	187	#endif /* !__ASSEMBLY__ */
	188	#endif /* _ASM_IA64_MCA_H */