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[thirdparty/kernel/linux.git] / arch / m68k / include / asm / io_mm.h
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b2441318 1/* SPDX-License-Identifier: GPL-2.0 */
1da177e4
LT
2/*
3 * linux/include/asm-m68k/io.h
4 *
5 * 4/1/00 RZ: - rewritten to avoid clashes between ISA/PCI and other
6 * IO access
7 * - added Q40 support
8 * - added skeleton for GG-II and Amiga PCMCIA
9 * 2/3/01 RZ: - moved a few more defs into raw_io.h
10 *
2171a19a
AB
11 * inX/outX should not be used by any driver unless it does
12 * ISA access. Other drivers should use function defined in raw_io.h
1da177e4
LT
13 * or define its own macros on top of these.
14 *
2171a19a 15 * inX(),outX() are for ISA I/O
1da177e4 16 * isa_readX(),isa_writeX() are for ISA memory
1da177e4
LT
17 */
18
19#ifndef _IO_H
20#define _IO_H
21
22#ifdef __KERNEL__
23
556269c1
TK
24#define ARCH_HAS_IOREMAP_WT
25
ad9ec4f8 26#include <linux/compiler.h>
1da177e4
LT
27#include <asm/raw_io.h>
28#include <asm/virtconvert.h>
29
f9569e1d 30#include <asm-generic/iomap.h>
1da177e4
LT
31
32#ifdef CONFIG_ATARI
33#include <asm/atarihw.h>
34#endif
35
36
37/*
38 * IO/MEM definitions for various ISA bridges
39 */
40
41
42#ifdef CONFIG_Q40
43
44#define q40_isa_io_base 0xff400000
45#define q40_isa_mem_base 0xff800000
46
47#define Q40_ISA_IO_B(ioaddr) (q40_isa_io_base+1+4*((unsigned long)(ioaddr)))
48#define Q40_ISA_IO_W(ioaddr) (q40_isa_io_base+ 4*((unsigned long)(ioaddr)))
49#define Q40_ISA_MEM_B(madr) (q40_isa_mem_base+1+4*((unsigned long)(madr)))
50#define Q40_ISA_MEM_W(madr) (q40_isa_mem_base+ 4*((unsigned long)(madr)))
51
52#define MULTI_ISA 0
53#endif /* Q40 */
54
1da177e4
LT
55#ifdef CONFIG_AMIGA_PCMCIA
56#include <asm/amigayle.h>
57
58#define AG_ISA_IO_B(ioaddr) ( GAYLE_IO+(ioaddr)+(((ioaddr)&1)*GAYLE_ODD) )
59#define AG_ISA_IO_W(ioaddr) ( GAYLE_IO+(ioaddr) )
60
61#ifndef MULTI_ISA
62#define MULTI_ISA 0
63#else
64#undef MULTI_ISA
65#define MULTI_ISA 1
66#endif
67#endif /* AMIGA_PCMCIA */
68
84b16b7b
MS
69#ifdef CONFIG_ATARI_ROM_ISA
70
71#define enec_isa_read_base 0xfffa0000
72#define enec_isa_write_base 0xfffb0000
73
74#define ENEC_ISA_IO_B(ioaddr) (enec_isa_read_base+((((unsigned long)(ioaddr))&0x7F)<<9))
75#define ENEC_ISA_IO_W(ioaddr) (enec_isa_read_base+((((unsigned long)(ioaddr))&0x7F)<<9))
76#define ENEC_ISA_MEM_B(madr) (enec_isa_read_base+((((unsigned long)(madr))&0x7F)<<9))
77#define ENEC_ISA_MEM_W(madr) (enec_isa_read_base+((((unsigned long)(madr))&0x7F)<<9))
78
79#ifndef MULTI_ISA
80#define MULTI_ISA 0
81#else
82#undef MULTI_ISA
83#define MULTI_ISA 1
84#endif
85#endif /* ATARI_ROM_ISA */
1da177e4
LT
86
87
9ff601a4
GU
88#if defined(CONFIG_PCI) && defined(CONFIG_COLDFIRE)
89
90#define HAVE_ARCH_PIO_SIZE
91#define PIO_OFFSET 0
92#define PIO_MASK 0xffff
93#define PIO_RESERVED 0x10000
94
95u8 mcf_pci_inb(u32 addr);
96u16 mcf_pci_inw(u32 addr);
97u32 mcf_pci_inl(u32 addr);
98void mcf_pci_insb(u32 addr, u8 *buf, u32 len);
99void mcf_pci_insw(u32 addr, u16 *buf, u32 len);
100void mcf_pci_insl(u32 addr, u32 *buf, u32 len);
101
102void mcf_pci_outb(u8 v, u32 addr);
103void mcf_pci_outw(u16 v, u32 addr);
104void mcf_pci_outl(u32 v, u32 addr);
105void mcf_pci_outsb(u32 addr, const u8 *buf, u32 len);
106void mcf_pci_outsw(u32 addr, const u16 *buf, u32 len);
107void mcf_pci_outsl(u32 addr, const u32 *buf, u32 len);
108
109#define inb mcf_pci_inb
110#define inb_p mcf_pci_inb
111#define inw mcf_pci_inw
112#define inw_p mcf_pci_inw
113#define inl mcf_pci_inl
114#define inl_p mcf_pci_inl
115#define insb mcf_pci_insb
116#define insw mcf_pci_insw
117#define insl mcf_pci_insl
118
119#define outb mcf_pci_outb
120#define outb_p mcf_pci_outb
121#define outw mcf_pci_outw
122#define outw_p mcf_pci_outw
123#define outl mcf_pci_outl
124#define outl_p mcf_pci_outl
125#define outsb mcf_pci_outsb
126#define outsw mcf_pci_outsw
127#define outsl mcf_pci_outsl
128
129#define readb(addr) in_8(addr)
130#define writeb(v, addr) out_8((addr), (v))
131#define readw(addr) in_le16(addr)
132#define writew(v, addr) out_le16((addr), (v))
133
84b16b7b 134#elif defined(CONFIG_ISA) || defined(CONFIG_ATARI_ROM_ISA)
1da177e4
LT
135
136#if MULTI_ISA == 0
137#undef MULTI_ISA
138#endif
139
84b16b7b
MS
140#define ISA_TYPE_Q40 (1)
141#define ISA_TYPE_AG (2)
142#define ISA_TYPE_ENEC (3)
1da177e4
LT
143
144#if defined(CONFIG_Q40) && !defined(MULTI_ISA)
52de114e 145#define ISA_TYPE ISA_TYPE_Q40
1da177e4
LT
146#define ISA_SEX 0
147#endif
148#if defined(CONFIG_AMIGA_PCMCIA) && !defined(MULTI_ISA)
52de114e 149#define ISA_TYPE ISA_TYPE_AG
1da177e4
LT
150#define ISA_SEX 1
151#endif
84b16b7b
MS
152#if defined(CONFIG_ATARI_ROM_ISA) && !defined(MULTI_ISA)
153#define ISA_TYPE ISA_TYPE_ENEC
154#define ISA_SEX 0
155#endif
1da177e4
LT
156
157#ifdef MULTI_ISA
158extern int isa_type;
159extern int isa_sex;
160
161#define ISA_TYPE isa_type
162#define ISA_SEX isa_sex
163#endif
164
165/*
166 * define inline addr translation functions. Normally only one variant will
167 * be compiled in so the case statement will be optimised away
168 */
169
ad9ec4f8 170static inline u8 __iomem *isa_itb(unsigned long addr)
1da177e4
LT
171{
172 switch(ISA_TYPE)
173 {
174#ifdef CONFIG_Q40
52de114e 175 case ISA_TYPE_Q40: return (u8 __iomem *)Q40_ISA_IO_B(addr);
1da177e4 176#endif
1da177e4 177#ifdef CONFIG_AMIGA_PCMCIA
52de114e 178 case ISA_TYPE_AG: return (u8 __iomem *)AG_ISA_IO_B(addr);
84b16b7b
MS
179#endif
180#ifdef CONFIG_ATARI_ROM_ISA
181 case ISA_TYPE_ENEC: return (u8 __iomem *)ENEC_ISA_IO_B(addr);
1da177e4 182#endif
ad9ec4f8 183 default: return NULL; /* avoid warnings, just in case */
1da177e4
LT
184 }
185}
ad9ec4f8 186static inline u16 __iomem *isa_itw(unsigned long addr)
1da177e4
LT
187{
188 switch(ISA_TYPE)
189 {
190#ifdef CONFIG_Q40
52de114e 191 case ISA_TYPE_Q40: return (u16 __iomem *)Q40_ISA_IO_W(addr);
1da177e4 192#endif
1da177e4 193#ifdef CONFIG_AMIGA_PCMCIA
52de114e 194 case ISA_TYPE_AG: return (u16 __iomem *)AG_ISA_IO_W(addr);
84b16b7b
MS
195#endif
196#ifdef CONFIG_ATARI_ROM_ISA
197 case ISA_TYPE_ENEC: return (u16 __iomem *)ENEC_ISA_IO_W(addr);
1da177e4 198#endif
ad9ec4f8 199 default: return NULL; /* avoid warnings, just in case */
1da177e4
LT
200 }
201}
f9569e1d
AV
202static inline u32 __iomem *isa_itl(unsigned long addr)
203{
204 switch(ISA_TYPE)
205 {
206#ifdef CONFIG_AMIGA_PCMCIA
52de114e 207 case ISA_TYPE_AG: return (u32 __iomem *)AG_ISA_IO_W(addr);
f9569e1d
AV
208#endif
209 default: return 0; /* avoid warnings, just in case */
210 }
211}
ad9ec4f8 212static inline u8 __iomem *isa_mtb(unsigned long addr)
1da177e4
LT
213{
214 switch(ISA_TYPE)
215 {
216#ifdef CONFIG_Q40
52de114e 217 case ISA_TYPE_Q40: return (u8 __iomem *)Q40_ISA_MEM_B(addr);
1da177e4 218#endif
1da177e4 219#ifdef CONFIG_AMIGA_PCMCIA
52de114e 220 case ISA_TYPE_AG: return (u8 __iomem *)addr;
84b16b7b
MS
221#endif
222#ifdef CONFIG_ATARI_ROM_ISA
223 case ISA_TYPE_ENEC: return (u8 __iomem *)ENEC_ISA_MEM_B(addr);
1da177e4 224#endif
ad9ec4f8 225 default: return NULL; /* avoid warnings, just in case */
1da177e4
LT
226 }
227}
ad9ec4f8 228static inline u16 __iomem *isa_mtw(unsigned long addr)
1da177e4
LT
229{
230 switch(ISA_TYPE)
231 {
232#ifdef CONFIG_Q40
52de114e 233 case ISA_TYPE_Q40: return (u16 __iomem *)Q40_ISA_MEM_W(addr);
1da177e4 234#endif
1da177e4 235#ifdef CONFIG_AMIGA_PCMCIA
52de114e 236 case ISA_TYPE_AG: return (u16 __iomem *)addr;
84b16b7b
MS
237#endif
238#ifdef CONFIG_ATARI_ROM_ISA
239 case ISA_TYPE_ENEC: return (u16 __iomem *)ENEC_ISA_MEM_W(addr);
1da177e4 240#endif
ad9ec4f8 241 default: return NULL; /* avoid warnings, just in case */
1da177e4
LT
242 }
243}
244
245
246#define isa_inb(port) in_8(isa_itb(port))
247#define isa_inw(port) (ISA_SEX ? in_be16(isa_itw(port)) : in_le16(isa_itw(port)))
f9569e1d 248#define isa_inl(port) (ISA_SEX ? in_be32(isa_itl(port)) : in_le32(isa_itl(port)))
1da177e4
LT
249#define isa_outb(val,port) out_8(isa_itb(port),(val))
250#define isa_outw(val,port) (ISA_SEX ? out_be16(isa_itw(port),(val)) : out_le16(isa_itw(port),(val)))
f9569e1d 251#define isa_outl(val,port) (ISA_SEX ? out_be32(isa_itl(port),(val)) : out_le32(isa_itl(port),(val)))
1da177e4
LT
252
253#define isa_readb(p) in_8(isa_mtb((unsigned long)(p)))
254#define isa_readw(p) \
255 (ISA_SEX ? in_be16(isa_mtw((unsigned long)(p))) \
256 : in_le16(isa_mtw((unsigned long)(p))))
257#define isa_writeb(val,p) out_8(isa_mtb((unsigned long)(p)),(val))
258#define isa_writew(val,p) \
259 (ISA_SEX ? out_be16(isa_mtw((unsigned long)(p)),(val)) \
260 : out_le16(isa_mtw((unsigned long)(p)),(val)))
261
84b16b7b
MS
262#ifdef CONFIG_ATARI_ROM_ISA
263#define isa_rom_inb(port) rom_in_8(isa_itb(port))
264#define isa_rom_inw(port) \
265 (ISA_SEX ? rom_in_be16(isa_itw(port)) \
266 : rom_in_le16(isa_itw(port)))
267
268#define isa_rom_outb(val, port) rom_out_8(isa_itb(port), (val))
269#define isa_rom_outw(val, port) \
270 (ISA_SEX ? rom_out_be16(isa_itw(port), (val)) \
271 : rom_out_le16(isa_itw(port), (val)))
272
273#define isa_rom_readb(p) rom_in_8(isa_mtb((unsigned long)(p)))
274#define isa_rom_readw(p) \
275 (ISA_SEX ? rom_in_be16(isa_mtw((unsigned long)(p))) \
276 : rom_in_le16(isa_mtw((unsigned long)(p))))
277#define isa_rom_readw_swap(p) \
278 (ISA_SEX ? rom_in_le16(isa_mtw((unsigned long)(p))) \
279 : rom_in_be16(isa_mtw((unsigned long)(p))))
280#define isa_rom_readw_raw(p) rom_in_be16(isa_mtw((unsigned long)(p)))
281
282#define isa_rom_writeb(val, p) rom_out_8(isa_mtb((unsigned long)(p)), (val))
283#define isa_rom_writew(val, p) \
284 (ISA_SEX ? rom_out_be16(isa_mtw((unsigned long)(p)), (val)) \
285 : rom_out_le16(isa_mtw((unsigned long)(p)), (val)))
286#define isa_rom_writew_swap(val, p) \
287 (ISA_SEX ? rom_out_le16(isa_mtw((unsigned long)(p)), (val)) \
288 : rom_out_be16(isa_mtw((unsigned long)(p)), (val)))
289#define isa_rom_writew_raw(val, p) rom_out_be16(isa_mtw((unsigned long)(p)), (val))
290#endif /* CONFIG_ATARI_ROM_ISA */
291
1da177e4
LT
292static inline void isa_delay(void)
293{
294 switch(ISA_TYPE)
295 {
296#ifdef CONFIG_Q40
52de114e 297 case ISA_TYPE_Q40: isa_outb(0,0x80); break;
1da177e4 298#endif
1da177e4 299#ifdef CONFIG_AMIGA_PCMCIA
52de114e 300 case ISA_TYPE_AG: break;
84b16b7b
MS
301#endif
302#ifdef CONFIG_ATARI_ROM_ISA
303 case ISA_TYPE_ENEC: break;
1da177e4
LT
304#endif
305 default: break; /* avoid warnings */
306 }
307}
308
309#define isa_inb_p(p) ({u8 v=isa_inb(p);isa_delay();v;})
310#define isa_outb_p(v,p) ({isa_outb((v),(p));isa_delay();})
311#define isa_inw_p(p) ({u16 v=isa_inw(p);isa_delay();v;})
312#define isa_outw_p(v,p) ({isa_outw((v),(p));isa_delay();})
313#define isa_inl_p(p) ({u32 v=isa_inl(p);isa_delay();v;})
314#define isa_outl_p(v,p) ({isa_outl((v),(p));isa_delay();})
315
316#define isa_insb(port, buf, nr) raw_insb(isa_itb(port), (u8 *)(buf), (nr))
317#define isa_outsb(port, buf, nr) raw_outsb(isa_itb(port), (u8 *)(buf), (nr))
318
319#define isa_insw(port, buf, nr) \
320 (ISA_SEX ? raw_insw(isa_itw(port), (u16 *)(buf), (nr)) : \
321 raw_insw_swapw(isa_itw(port), (u16 *)(buf), (nr)))
322
323#define isa_outsw(port, buf, nr) \
324 (ISA_SEX ? raw_outsw(isa_itw(port), (u16 *)(buf), (nr)) : \
325 raw_outsw_swapw(isa_itw(port), (u16 *)(buf), (nr)))
f9569e1d
AV
326
327#define isa_insl(port, buf, nr) \
328 (ISA_SEX ? raw_insl(isa_itl(port), (u32 *)(buf), (nr)) : \
329 raw_insw_swapw(isa_itw(port), (u16 *)(buf), (nr)<<1))
330
331#define isa_outsl(port, buf, nr) \
332 (ISA_SEX ? raw_outsl(isa_itl(port), (u32 *)(buf), (nr)) : \
333 raw_outsw_swapw(isa_itw(port), (u16 *)(buf), (nr)<<1))
334
1da177e4 335
84b16b7b
MS
336#ifdef CONFIG_ATARI_ROM_ISA
337#define isa_rom_inb_p(p) ({ u8 _v = isa_rom_inb(p); isa_delay(); _v; })
338#define isa_rom_inw_p(p) ({ u16 _v = isa_rom_inw(p); isa_delay(); _v; })
339#define isa_rom_outb_p(v, p) ({ isa_rom_outb((v), (p)); isa_delay(); })
340#define isa_rom_outw_p(v, p) ({ isa_rom_outw((v), (p)); isa_delay(); })
341
342#define isa_rom_insb(port, buf, nr) raw_rom_insb(isa_itb(port), (u8 *)(buf), (nr))
343
344#define isa_rom_insw(port, buf, nr) \
345 (ISA_SEX ? raw_rom_insw(isa_itw(port), (u16 *)(buf), (nr)) : \
346 raw_rom_insw_swapw(isa_itw(port), (u16 *)(buf), (nr)))
347
348#define isa_rom_outsb(port, buf, nr) raw_rom_outsb(isa_itb(port), (u8 *)(buf), (nr))
349
350#define isa_rom_outsw(port, buf, nr) \
351 (ISA_SEX ? raw_rom_outsw(isa_itw(port), (u16 *)(buf), (nr)) : \
352 raw_rom_outsw_swapw(isa_itw(port), (u16 *)(buf), (nr)))
353#endif /* CONFIG_ATARI_ROM_ISA */
354
355#endif /* CONFIG_ISA || CONFIG_ATARI_ROM_ISA */
356
357
358#if defined(CONFIG_ISA) && !defined(CONFIG_ATARI_ROM_ISA)
1da177e4
LT
359#define inb isa_inb
360#define inb_p isa_inb_p
361#define outb isa_outb
362#define outb_p isa_outb_p
363#define inw isa_inw
364#define inw_p isa_inw_p
365#define outw isa_outw
366#define outw_p isa_outw_p
f9569e1d
AV
367#define inl isa_inl
368#define inl_p isa_inl_p
369#define outl isa_outl
370#define outl_p isa_outl_p
1da177e4
LT
371#define insb isa_insb
372#define insw isa_insw
f9569e1d 373#define insl isa_insl
1da177e4
LT
374#define outsb isa_outsb
375#define outsw isa_outsw
f9569e1d 376#define outsl isa_outsl
1da177e4
LT
377#define readb isa_readb
378#define readw isa_readw
379#define writeb isa_writeb
380#define writew isa_writew
84b16b7b 381#endif /* CONFIG_ISA && !CONFIG_ATARI_ROM_ISA */
1da177e4 382
84b16b7b
MS
383#ifdef CONFIG_ATARI_ROM_ISA
384/*
385 * kernel with both ROM port ISA and IDE compiled in, those have
386 * conflicting defs for in/out. Simply consider port < 1024
387 * ROM port ISA and everything else regular ISA for IDE. read,write defined
388 * below.
389 */
390#define inb(port) ((port) < 1024 ? isa_rom_inb(port) : in_8(port))
391#define inb_p(port) ((port) < 1024 ? isa_rom_inb_p(port) : in_8(port))
392#define inw(port) ((port) < 1024 ? isa_rom_inw(port) : in_le16(port))
393#define inw_p(port) ((port) < 1024 ? isa_rom_inw_p(port) : in_le16(port))
394#define inl isa_inl
395#define inl_p isa_inl_p
396
397#define outb(val, port) ((port) < 1024 ? isa_rom_outb((val), (port)) : out_8((port), (val)))
398#define outb_p(val, port) ((port) < 1024 ? isa_rom_outb_p((val), (port)) : out_8((port), (val)))
399#define outw(val, port) ((port) < 1024 ? isa_rom_outw((val), (port)) : out_le16((port), (val)))
400#define outw_p(val, port) ((port) < 1024 ? isa_rom_outw_p((val), (port)) : out_le16((port), (val)))
401#define outl isa_outl
402#define outl_p isa_outl_p
403
404#define insb(port, buf, nr) ((port) < 1024 ? isa_rom_insb((port), (buf), (nr)) : isa_insb((port), (buf), (nr)))
405#define insw(port, buf, nr) ((port) < 1024 ? isa_rom_insw((port), (buf), (nr)) : isa_insw((port), (buf), (nr)))
406#define insl isa_insl
407#define outsb(port, buf, nr) ((port) < 1024 ? isa_rom_outsb((port), (buf), (nr)) : isa_outsb((port), (buf), (nr)))
408#define outsw(port, buf, nr) ((port) < 1024 ? isa_rom_outsw((port), (buf), (nr)) : isa_outsw((port), (buf), (nr)))
409#define outsl isa_outsl
410
411#define readb(addr) in_8(addr)
412#define writeb(val, addr) out_8((addr), (val))
413#define readw(addr) in_le16(addr)
414#define writew(val, addr) out_le16((addr), (val))
415#endif /* CONFIG_ATARI_ROM_ISA */
416
03aa29f8
GU
417#if !defined(CONFIG_ISA) && !defined(CONFIG_ATARI_ROM_ISA) && \
418 !(defined(CONFIG_PCI) && defined(CONFIG_COLDFIRE))
1da177e4 419/*
f9569e1d 420 * We need to define dummy functions for GENERIC_IOMAP support.
1da177e4 421 */
f9569e1d
AV
422#define inb(port) 0xff
423#define inb_p(port) 0xff
424#define outb(val,port) ((void)0)
425#define outb_p(val,port) ((void)0)
426#define inw(port) 0xffff
779b7e64 427#define inw_p(port) 0xffff
f9569e1d 428#define outw(val,port) ((void)0)
779b7e64 429#define outw_p(val,port) ((void)0)
f9569e1d 430#define inl(port) 0xffffffffUL
779b7e64 431#define inl_p(port) 0xffffffffUL
f9569e1d 432#define outl(val,port) ((void)0)
779b7e64 433#define outl_p(val,port) ((void)0)
f9569e1d
AV
434
435#define insb(port,buf,nr) ((void)0)
436#define outsb(port,buf,nr) ((void)0)
437#define insw(port,buf,nr) ((void)0)
438#define outsw(port,buf,nr) ((void)0)
439#define insl(port,buf,nr) ((void)0)
440#define outsl(port,buf,nr) ((void)0)
1da177e4
LT
441
442/*
443 * These should be valid on any ioremap()ed region
444 */
445#define readb(addr) in_8(addr)
446#define writeb(val,addr) out_8((addr),(val))
f9569e1d
AV
447#define readw(addr) in_le16(addr)
448#define writew(val,addr) out_le16((addr),(val))
2171a19a 449
84b16b7b 450#endif /* !CONFIG_ISA && !CONFIG_ATARI_ROM_ISA */
2171a19a 451
1da177e4
LT
452#define readl(addr) in_le32(addr)
453#define writel(val,addr) out_le32((addr),(val))
1da177e4 454
f5db9c6a
GU
455#define readsb(port, buf, nr) raw_insb((port), (u8 *)(buf), (nr))
456#define readsw(port, buf, nr) raw_insw((port), (u16 *)(buf), (nr))
457#define readsl(port, buf, nr) raw_insl((port), (u32 *)(buf), (nr))
458#define writesb(port, buf, nr) raw_outsb((port), (u8 *)(buf), (nr))
459#define writesw(port, buf, nr) raw_outsw((port), (u16 *)(buf), (nr))
460#define writesl(port, buf, nr) raw_outsl((port), (u32 *)(buf), (nr))
461
1da177e4
LT
462#define mmiowb()
463
ad9ec4f8 464static inline void __iomem *ioremap(unsigned long physaddr, unsigned long size)
1da177e4
LT
465{
466 return __ioremap(physaddr, size, IOMAP_NOCACHE_SER);
467}
ad9ec4f8 468static inline void __iomem *ioremap_nocache(unsigned long physaddr, unsigned long size)
1da177e4
LT
469{
470 return __ioremap(physaddr, size, IOMAP_NOCACHE_SER);
471}
4c73e892 472#define ioremap_uc ioremap_nocache
556269c1
TK
473static inline void __iomem *ioremap_wt(unsigned long physaddr,
474 unsigned long size)
475{
476 return __ioremap(physaddr, size, IOMAP_WRITETHROUGH);
477}
ad9ec4f8 478static inline void __iomem *ioremap_fullcache(unsigned long physaddr,
1da177e4
LT
479 unsigned long size)
480{
481 return __ioremap(physaddr, size, IOMAP_FULL_CACHING);
482}
483
f9569e1d
AV
484static inline void memset_io(volatile void __iomem *addr, unsigned char val, int count)
485{
486 __builtin_memset((void __force *) addr, val, count);
487}
488static inline void memcpy_fromio(void *dst, const volatile void __iomem *src, int count)
489{
490 __builtin_memcpy(dst, (void __force *) src, count);
491}
492static inline void memcpy_toio(volatile void __iomem *dst, const void *src, int count)
493{
494 __builtin_memcpy((void __force *) dst, src, count);
495}
1da177e4
LT
496
497#ifndef CONFIG_SUN3
498#define IO_SPACE_LIMIT 0xffff
499#else
500#define IO_SPACE_LIMIT 0x0fffffff
501#endif
502
503#endif /* __KERNEL__ */
504
505#define __ARCH_HAS_NO_PAGE_ZERO_MAPPED 1
506
507/*
508 * Convert a physical pointer to a virtual kernel pointer for /dev/mem
509 * access
510 */
511#define xlate_dev_mem_ptr(p) __va(p)
512
513/*
514 * Convert a virtual cached pointer to an uncached pointer
515 */
516#define xlate_dev_kmem_ptr(p) p
517
a000dfc2
GU
518static inline void __iomem *ioport_map(unsigned long port, unsigned int nr)
519{
520 return (void __iomem *) port;
521}
522
523static inline void ioport_unmap(void __iomem *p)
524{
525}
e93a6bbe 526
1da177e4 527#endif /* _IO_H */