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76316a31 MS |
1 | /* |
2 | * (C) Copyright 2007 Michal Simek | |
3 | * | |
db14d779 | 4 | * Michal SIMEK <monstr@monstr.eu> |
76316a31 | 5 | * |
1a459660 | 6 | * SPDX-License-Identifier: GPL-2.0+ |
76316a31 MS |
7 | */ |
8 | ||
9 | #include <common.h> | |
fb05f6da | 10 | #include <asm/asm.h> |
76316a31 | 11 | |
76316a31 MS |
12 | int dcache_status (void) |
13 | { | |
14 | int i = 0; | |
15 | int mask = 0x80; | |
16 | __asm__ __volatile__ ("mfs %0,rmsr"::"r" (i):"memory"); | |
17 | /* i&=0x80 */ | |
18 | __asm__ __volatile__ ("and %0,%0,%1"::"r" (i), "r" (mask):"memory"); | |
19 | return i; | |
20 | } | |
21 | ||
22 | int icache_status (void) | |
23 | { | |
24 | int i = 0; | |
25 | int mask = 0x20; | |
26 | __asm__ __volatile__ ("mfs %0,rmsr"::"r" (i):"memory"); | |
27 | /* i&=0x20 */ | |
28 | __asm__ __volatile__ ("and %0,%0,%1"::"r" (i), "r" (mask):"memory"); | |
29 | return i; | |
30 | } | |
f3f001a3 MS |
31 | |
32 | void icache_enable (void) { | |
fb05f6da | 33 | MSRSET(0x20); |
f3f001a3 MS |
34 | } |
35 | ||
36 | void icache_disable(void) { | |
8ff972c6 MS |
37 | /* we are not generate ICACHE size -> flush whole cache */ |
38 | flush_cache(0, 32768); | |
fb05f6da | 39 | MSRCLR(0x20); |
f3f001a3 MS |
40 | } |
41 | ||
42 | void dcache_enable (void) { | |
fb05f6da | 43 | MSRSET(0x80); |
f3f001a3 MS |
44 | } |
45 | ||
46 | void dcache_disable(void) { | |
8ff972c6 | 47 | #ifdef XILINX_USE_DCACHE |
8ff972c6 | 48 | flush_cache(0, XILINX_DCACHE_BYTE_SIZE); |
8ff972c6 | 49 | #endif |
fb05f6da | 50 | MSRCLR(0x80); |
f3f001a3 | 51 | } |
8ff972c6 MS |
52 | |
53 | void flush_cache (ulong addr, ulong size) | |
54 | { | |
55 | int i; | |
56 | for (i = 0; i < size; i += 4) | |
57 | asm volatile ( | |
58 | #ifdef CONFIG_ICACHE | |
59 | "wic %0, r0;" | |
60 | #endif | |
61 | "nop;" | |
62 | #ifdef CONFIG_DCACHE | |
63 | "wdc.flush %0, r0;" | |
64 | #endif | |
65 | "nop;" | |
66 | : | |
67 | : "r" (addr + i) | |
68 | : "memory"); | |
69 | } |