[people/ms/u-boot.git] / arch / microblaze / cpu / timer.c

/*
 * (C) Copyright 2007 Michal Simek
 *
 * Michal  SIMEK <monstr@monstr.eu>
 *
 * SPDX-License-Identifier:	GPL-2.0+
 */

#include <common.h>
#include <fdtdec.h>
#include <asm/microblaze_timer.h>
#include <asm/microblaze_intc.h>

DECLARE_GLOBAL_DATA_PTR;

volatile int timestamp = 0;
microblaze_timer_t *tmr;

ulong get_timer (ulong base)
{
	if (tmr)
		return timestamp - base;
	return timestamp++ - base;
}

void __udelay(unsigned long usec)
{
	u32 i;

	if (tmr) {
		i = get_timer(0);
		while ((get_timer(0) - i) < (usec / 1000))
			;
	}
}

#ifndef CONFIG_SPL_BUILD
static void timer_isr(void *arg)
{
	timestamp++;
	tmr->control = tmr->control | TIMER_INTERRUPT;
}

int timer_init (void)
{
	int irq = -1;
	u32 preload = 0;
	u32 ret = 0;
	const void *blob = gd->fdt_blob;
	int node = 0;
	u32 cell[2];

	debug("TIMER: Initialization\n");

	node = fdt_node_offset_by_compatible(blob, node,
				"xlnx,xps-timer-1.00.a");
	if (node != -1) {
		fdt_addr_t base = fdtdec_get_addr(blob, node, "reg");
		if (base == FDT_ADDR_T_NONE)
			return -1;

		debug("TIMER: Base addr %lx\n", base);
		tmr = (microblaze_timer_t *)base;

		ret = fdtdec_get_int_array(blob, node, "interrupts",
					    cell, ARRAY_SIZE(cell));
		if (ret)
			return ret;

		irq = cell[0];
		debug("TIMER: IRQ %x\n", irq);

		preload = fdtdec_get_int(blob, node, "clock-frequency", 0);
		preload /= CONFIG_SYS_HZ;
	} else {
		return node;
	}

	if (tmr && preload && irq >= 0) {
		tmr->loadreg = preload;
		tmr->control = TIMER_INTERRUPT | TIMER_RESET;
		tmr->control = TIMER_ENABLE | TIMER_ENABLE_INTR |\
					TIMER_RELOAD | TIMER_DOWN_COUNT;
		timestamp = 0;
		ret = install_interrupt_handler (irq, timer_isr, (void *)tmr);
		if (ret)
			tmr = NULL;
	}
	/* No problem if timer is not found/initialized */
	return 0;
}
#else
int timer_init(void)
{
	return 0;
}
#endif

/*
 * This function is derived from PowerPC code (read timebase as long long).
 * On Microblaze it just returns the timer value.
 */
unsigned long long get_ticks(void)
{
	return get_timer(0);
}

/*
 * This function is derived from PowerPC code (timebase clock frequency).
 * On Microblaze it returns the number of timer ticks per second.
 */
ulong get_tbclk(void)
{
	return CONFIG_SYS_HZ;
}
Commit	Line	Data
76316a31 MS	1	/*
	2	* (C) Copyright 2007 Michal Simek
	3	*
	4	* Michal SIMEK <monstr@monstr.eu>
	5	*
1a459660	6	* SPDX-License-Identifier: GPL-2.0+
76316a31 MS	7	*/
	8
	9	#include <common.h>
9aa65cab	10	#include <fdtdec.h>
76316a31	11	#include <asm/microblaze_timer.h>
42efed61	12	#include <asm/microblaze_intc.h>
76316a31	13
9aa65cab MS	14	DECLARE_GLOBAL_DATA_PTR;
9aa65cab MS	15
76316a31	16	volatile int timestamp = 0;
bcbb046b	17	microblaze_timer_t *tmr;
76316a31	18
76316a31 MS	19	ulong get_timer (ulong base)
76316a31 MS	20	{
bcbb046b MS	21	if (tmr)
	22	return timestamp - base;
	23	return timestamp++ - base;
76316a31 MS	24	}
76316a31 MS	25
779bf42c MS	26	void __udelay(unsigned long usec)
779bf42c MS	27	{
bcbb046b	28	u32 i;
779bf42c	29
bcbb046b MS	30	if (tmr) {
	31	i = get_timer(0);
	32	while ((get_timer(0) - i) < (usec / 1000))
	33	;
bcbb046b	34	}
779bf42c	35	}
779bf42c	36
9d242745	37	#ifndef CONFIG_SPL_BUILD
bcbb046b	38	static void timer_isr(void *arg)
76316a31 MS	39	{
	40	timestamp++;
	41	tmr->control = tmr->control \| TIMER_INTERRUPT;
	42	}
	43
5bbcb6cf	44	int timer_init (void)
76316a31	45	{
bcbb046b MS	46	int irq = -1;
	47	u32 preload = 0;
	48	u32 ret = 0;
9aa65cab MS	49	const void *blob = gd->fdt_blob;
	50	int node = 0;
	51	u32 cell[2];
	52
	53	debug("TIMER: Initialization\n");
	54
	55	node = fdt_node_offset_by_compatible(blob, node,
	56	"xlnx,xps-timer-1.00.a");
	57	if (node != -1) {
	58	fdt_addr_t base = fdtdec_get_addr(blob, node, "reg");
	59	if (base == FDT_ADDR_T_NONE)
	60	return -1;
	61
	62	debug("TIMER: Base addr %lx\n", base);
	63	tmr = (microblaze_timer_t *)base;
	64
	65	ret = fdtdec_get_int_array(blob, node, "interrupts",
	66	cell, ARRAY_SIZE(cell));
	67	if (ret)
	68	return ret;
	69
	70	irq = cell[0];
	71	debug("TIMER: IRQ %x\n", irq);
	72
	73	preload = fdtdec_get_int(blob, node, "clock-frequency", 0);
	74	preload /= CONFIG_SYS_HZ;
	75	} else {
	76	return node;
	77	}
	78
bcbb046b MS	79	if (tmr && preload && irq >= 0) {
	80	tmr->loadreg = preload;
	81	tmr->control = TIMER_INTERRUPT \| TIMER_RESET;
	82	tmr->control = TIMER_ENABLE \| TIMER_ENABLE_INTR \|\
	83	TIMER_RELOAD \| TIMER_DOWN_COUNT;
	84	timestamp = 0;
	85	ret = install_interrupt_handler (irq, timer_isr, (void *)tmr);
	86	if (ret)
	87	tmr = NULL;
	88	}
bcbb046b	89	/* No problem if timer is not found/initialized */
5bbcb6cf	90	return 0;
76316a31	91	}
9d242745 MS	92	#else
	93	int timer_init(void)
	94	{
	95	return 0;
	96	}
	97	#endif
b9f0b730 SL	98
	99	/*
	100	* This function is derived from PowerPC code (read timebase as long long).
	101	* On Microblaze it just returns the timer value.
	102	*/
	103	unsigned long long get_ticks(void)
	104	{
	105	return get_timer(0);
	106	}
	107
	108	/*
	109	* This function is derived from PowerPC code (timebase clock frequency).
	110	* On Microblaze it returns the number of timer ticks per second.
	111	*/
	112	ulong get_tbclk(void)
	113	{
	114	return CONFIG_SYS_HZ;
	115	}