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Commit | Line | Data |
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dd84058d MY |
1 | menu "MIPS architecture" |
2 | depends on MIPS | |
3 | ||
4 | config SYS_ARCH | |
dd84058d MY |
5 | default "mips" |
6 | ||
b9863b6d DS |
7 | config SYS_CPU |
8 | default "mips32" if CPU_MIPS32_R1 || CPU_MIPS32_R2 | |
9 | default "mips64" if CPU_MIPS64_R1 || CPU_MIPS64_R2 | |
10 | ||
dd84058d MY |
11 | choice |
12 | prompt "Target select" | |
a26cd049 | 13 | optional |
dd84058d MY |
14 | |
15 | config TARGET_QEMU_MIPS | |
16 | bool "Support qemu-mips" | |
0e1dc345 DS |
17 | select SUPPORTS_BIG_ENDIAN |
18 | select SUPPORTS_LITTLE_ENDIAN | |
02611cbb DS |
19 | select SUPPORTS_CPU_MIPS32_R1 |
20 | select SUPPORTS_CPU_MIPS32_R2 | |
aa45f75e DS |
21 | select SUPPORTS_CPU_MIPS64_R1 |
22 | select SUPPORTS_CPU_MIPS64_R2 | |
dd84058d MY |
23 | |
24 | config TARGET_MALTA | |
25 | bool "Support malta" | |
0e1dc345 DS |
26 | select SUPPORTS_BIG_ENDIAN |
27 | select SUPPORTS_LITTLE_ENDIAN | |
02611cbb DS |
28 | select SUPPORTS_CPU_MIPS32_R1 |
29 | select SUPPORTS_CPU_MIPS32_R2 | |
9d638eea | 30 | select SWAP_IO_SPACE |
dd84058d MY |
31 | |
32 | config TARGET_VCT | |
33 | bool "Support vct" | |
0e1dc345 | 34 | select SUPPORTS_BIG_ENDIAN |
02611cbb DS |
35 | select SUPPORTS_CPU_MIPS32_R1 |
36 | select SUPPORTS_CPU_MIPS32_R2 | |
dd7c7200 | 37 | select SYS_MIPS_CACHE_INIT_RAM_LOAD |
dd84058d MY |
38 | |
39 | config TARGET_DBAU1X00 | |
40 | bool "Support dbau1x00" | |
0e1dc345 DS |
41 | select SUPPORTS_BIG_ENDIAN |
42 | select SUPPORTS_LITTLE_ENDIAN | |
02611cbb DS |
43 | select SUPPORTS_CPU_MIPS32_R1 |
44 | select SUPPORTS_CPU_MIPS32_R2 | |
dd7c7200 | 45 | select SYS_MIPS_CACHE_INIT_RAM_LOAD |
dd84058d MY |
46 | |
47 | config TARGET_PB1X00 | |
48 | bool "Support pb1x00" | |
0e1dc345 | 49 | select SUPPORTS_LITTLE_ENDIAN |
02611cbb DS |
50 | select SUPPORTS_CPU_MIPS32_R1 |
51 | select SUPPORTS_CPU_MIPS32_R2 | |
dd7c7200 | 52 | select SYS_MIPS_CACHE_INIT_RAM_LOAD |
dd84058d | 53 | |
dd84058d MY |
54 | |
55 | endchoice | |
56 | ||
57 | source "board/dbau1x00/Kconfig" | |
58 | source "board/imgtec/malta/Kconfig" | |
59 | source "board/micronas/vct/Kconfig" | |
60 | source "board/pb1x00/Kconfig" | |
61 | source "board/qemu-mips/Kconfig" | |
62 | ||
0e1dc345 DS |
63 | if MIPS |
64 | ||
65 | choice | |
66 | prompt "Endianness selection" | |
67 | help | |
68 | Some MIPS boards can be configured for either little or big endian | |
69 | byte order. These modes require different U-Boot images. In general there | |
70 | is one preferred byteorder for a particular system but some systems are | |
71 | just as commonly used in the one or the other endianness. | |
72 | ||
73 | config SYS_BIG_ENDIAN | |
74 | bool "Big endian" | |
75 | depends on SUPPORTS_BIG_ENDIAN | |
76 | ||
77 | config SYS_LITTLE_ENDIAN | |
78 | bool "Little endian" | |
79 | depends on SUPPORTS_LITTLE_ENDIAN | |
80 | ||
81 | endchoice | |
82 | ||
02611cbb DS |
83 | choice |
84 | prompt "CPU selection" | |
85 | default CPU_MIPS32_R2 | |
86 | ||
87 | config CPU_MIPS32_R1 | |
88 | bool "MIPS32 Release 1" | |
89 | depends on SUPPORTS_CPU_MIPS32_R1 | |
90 | select 32BIT | |
91 | help | |
92 | Choose this option to build an U-Boot for release 1 or later of the | |
93 | MIPS32 architecture. | |
94 | ||
95 | config CPU_MIPS32_R2 | |
96 | bool "MIPS32 Release 2" | |
97 | depends on SUPPORTS_CPU_MIPS32_R2 | |
98 | select 32BIT | |
99 | help | |
100 | Choose this option to build an U-Boot for release 2 or later of the | |
101 | MIPS32 architecture. | |
102 | ||
103 | config CPU_MIPS64_R1 | |
104 | bool "MIPS64 Release 1" | |
105 | depends on SUPPORTS_CPU_MIPS64_R1 | |
106 | select 64BIT | |
107 | help | |
108 | Choose this option to build a kernel for release 1 or later of the | |
109 | MIPS64 architecture. | |
110 | ||
111 | config CPU_MIPS64_R2 | |
112 | bool "MIPS64 Release 2" | |
113 | depends on SUPPORTS_CPU_MIPS64_R2 | |
114 | select 64BIT | |
115 | help | |
116 | Choose this option to build a kernel for release 2 or later of the | |
117 | MIPS64 architecture. | |
118 | ||
119 | endchoice | |
120 | ||
25fc664f DS |
121 | menu "OS boot interface" |
122 | ||
123 | config MIPS_BOOT_CMDLINE_LEGACY | |
124 | bool "Hand over legacy command line to Linux kernel" | |
125 | default y | |
126 | help | |
127 | Enable this option if you want U-Boot to hand over the Yamon-style | |
128 | command line to the kernel. All bootargs will be prepared as argc/argv | |
129 | compatible list. The argument count (argc) is stored in register $a0. | |
130 | The address of the argument list (argv) is stored in register $a1. | |
131 | ||
ca65e585 DS |
132 | config MIPS_BOOT_ENV_LEGACY |
133 | bool "Hand over legacy environment to Linux kernel" | |
134 | default y | |
135 | help | |
136 | Enable this option if you want U-Boot to hand over the Yamon-style | |
137 | environment to the kernel. Information like memory size, initrd | |
138 | address and size will be prepared as zero-terminated key/value list. | |
139 | The address of the enviroment is stored in register $a2. | |
140 | ||
5002d8cc | 141 | config MIPS_BOOT_FDT |
90b1c9fa | 142 | bool "Hand over a flattened device tree to Linux kernel" |
5002d8cc DS |
143 | default n |
144 | help | |
145 | Enable this option if you want U-Boot to hand over a flattened | |
90b1c9fa DS |
146 | device tree to the kernel. According to UHI register $a0 will be set |
147 | to -2 and the FDT address is stored in $a1. | |
5002d8cc | 148 | |
25fc664f DS |
149 | endmenu |
150 | ||
0e1dc345 DS |
151 | config SUPPORTS_BIG_ENDIAN |
152 | bool | |
153 | ||
154 | config SUPPORTS_LITTLE_ENDIAN | |
155 | bool | |
156 | ||
02611cbb DS |
157 | config SUPPORTS_CPU_MIPS32_R1 |
158 | bool | |
159 | ||
160 | config SUPPORTS_CPU_MIPS32_R2 | |
161 | bool | |
162 | ||
163 | config SUPPORTS_CPU_MIPS64_R1 | |
164 | bool | |
165 | ||
166 | config SUPPORTS_CPU_MIPS64_R2 | |
167 | bool | |
168 | ||
c57dafb5 DS |
169 | config CPU_MIPS32 |
170 | bool | |
171 | default y if CPU_MIPS32_R1 || CPU_MIPS32_R2 | |
172 | ||
173 | config CPU_MIPS64 | |
174 | bool | |
175 | default y if CPU_MIPS64_R1 || CPU_MIPS64_R2 | |
176 | ||
02611cbb DS |
177 | config 32BIT |
178 | bool | |
179 | ||
180 | config 64BIT | |
181 | bool | |
182 | ||
9d638eea DS |
183 | config SWAP_IO_SPACE |
184 | bool | |
185 | ||
dd7c7200 PB |
186 | config SYS_MIPS_CACHE_INIT_RAM_LOAD |
187 | bool | |
188 | ||
0e1dc345 DS |
189 | endif |
190 | ||
dd84058d | 191 | endmenu |