[thirdparty/kernel/stable.git] / arch / mips / boot / dts / loongson / ls7a-pch.dtsi

// SPDX-License-Identifier: GPL-2.0

/ {
	pch: bus@10000000 {
		compatible = "simple-bus";
		#address-cells = <2>;
		#size-cells = <2>;
		ranges = <0 0x10000000 0 0x10000000 0 0x10000000 /* PIO & CONF & APB */
				0 0x20000000 0 0x20000000 0 0x10000000
				0 0x40000000 0 0x40000000 0 0x40000000 /* PCI MEM */
				0xe00 0x00000000 0xe00 0x00000000 0x100 0x0000000>;

		pic: interrupt-controller@10000000 {
			compatible = "loongson,pch-pic-1.0";
			reg = <0 0x10000000 0 0x400>;
			interrupt-controller;
			interrupt-parent = <&htvec>;
			loongson,pic-base-vec = <0>;
			#interrupt-cells = <2>;
		};

		rtc0: rtc@100d0100 {
			compatible = "loongson,ls7a-rtc";
			reg = <0 0x100d0100 0 0x78>;
			interrupt-parent = <&pic>;
			interrupts = <52 IRQ_TYPE_LEVEL_HIGH>;
		};

		ls7a_uart0: serial@10080000 {
			compatible = "ns16550a";
			reg = <0 0x10080000 0 0x100>;
			clock-frequency = <50000000>;
			interrupt-parent = <&pic>;
			interrupts = <8 IRQ_TYPE_LEVEL_HIGH>;
			no-loopback-test;
		};

		ls7a_uart1: serial@10080100 {
			status = "disabled";
			compatible = "ns16550a";
			reg = <0 0x10080100 0 0x100>;
			clock-frequency = <50000000>;
			interrupt-parent = <&pic>;
			interrupts = <8 IRQ_TYPE_LEVEL_HIGH>;
			no-loopback-test;
		};

		ls7a_uart2: serial@10080200 {
			status = "disabled";
			compatible = "ns16550a";
			reg = <0 0x10080200 0 0x100>;
			clock-frequency = <50000000>;
			interrupt-parent = <&pic>;
			interrupts = <8 IRQ_TYPE_LEVEL_HIGH>;
			no-loopback-test;
		};

		ls7a_uart3: serial@10080300 {
			status = "disabled";
			compatible = "ns16550a";
			reg = <0 0x10080300 0 0x100>;
			clock-frequency = <50000000>;
			interrupt-parent = <&pic>;
			interrupts = <8 IRQ_TYPE_LEVEL_HIGH>;
			no-loopback-test;
		};

		pci@1a000000 {
			compatible = "loongson,ls7a-pci";
			device_type = "pci";
			#address-cells = <3>;
			#size-cells = <2>;
			#interrupt-cells = <2>;
			msi-parent = <&msi>;

			reg = <0 0x1a000000 0 0x02000000>,
				<0xefe 0x00000000 0 0x20000000>;

			ranges = <0x01000000 0x0 0x00020000 0x0 0x18020000 0x0 0x00020000>,
				 <0x02000000 0x0 0x40000000 0x0 0x40000000 0x0 0x40000000>;

			ohci@4,0 {
				compatible = "pci0014,7a24.0",
						   "pci0014,7a24",
						   "pciclass0c0310",
						   "pciclass0c03";

				reg = <0x2000 0x0 0x0 0x0 0x0>;
				interrupts = <49 IRQ_TYPE_LEVEL_HIGH>;
				interrupt-parent = <&pic>;
			};

			ehci@4,1 {
				compatible = "pci0014,7a14.0",
						   "pci0014,7a14",
						   "pciclass0c0320",
						   "pciclass0c03";

				reg = <0x2100 0x0 0x0 0x0 0x0>;
				interrupts = <48 IRQ_TYPE_LEVEL_HIGH>;
				interrupt-parent = <&pic>;
			};

			ohci@5,0 {
				compatible = "pci0014,7a24.0",
						   "pci0014,7a24",
						   "pciclass0c0310",
						   "pciclass0c03";

				reg = <0x2800 0x0 0x0 0x0 0x0>;
				interrupts = <51 IRQ_TYPE_LEVEL_HIGH>;
				interrupt-parent = <&pic>;
			};

			ehci@5,1 {
				compatible = "pci0014,7a14.0",
						   "pci0014,7a14",
						   "pciclass0c0320",
						   "pciclass0c03";

				reg = <0x2900 0x0 0x0 0x0 0x0>;
				interrupts = <50 IRQ_TYPE_LEVEL_HIGH>;
				interrupt-parent = <&pic>;
			};

			sata@8,0 {
				compatible = "pci0014,7a08.0",
						   "pci0014,7a08",
						   "pciclass010601",
						   "pciclass0106";

				reg = <0x4000 0x0 0x0 0x0 0x0>;
				interrupts = <16 IRQ_TYPE_LEVEL_HIGH>;
				interrupt-parent = <&pic>;
			};

			sata@8,1 {
				compatible = "pci0014,7a08.0",
						   "pci0014,7a08",
						   "pciclass010601",
						   "pciclass0106";

				reg = <0x4100 0x0 0x0 0x0 0x0>;
				interrupts = <17 IRQ_TYPE_LEVEL_HIGH>;
				interrupt-parent = <&pic>;
			};

			sata@8,2 {
				compatible = "pci0014,7a08.0",
						   "pci0014,7a08",
						   "pciclass010601",
						   "pciclass0106";

				reg = <0x4200 0x0 0x0 0x0 0x0>;
				interrupts = <18 IRQ_TYPE_LEVEL_HIGH>;
				interrupt-parent = <&pic>;
			};

			gpu@6,0 {
				compatible = "pci0014,7a15.0",
						   "pci0014,7a15",
						   "pciclass030200",
						   "pciclass0302";

				reg = <0x3000 0x0 0x0 0x0 0x0>;
				interrupts = <29 IRQ_TYPE_LEVEL_HIGH>;
				interrupt-parent = <&pic>;
			};

			dc@6,1 {
				compatible = "pci0014,7a06.0",
						   "pci0014,7a06",
						   "pciclass030000",
						   "pciclass0300";

				reg = <0x3100 0x0 0x0 0x0 0x0>;
				interrupts = <28 IRQ_TYPE_LEVEL_HIGH>;
				interrupt-parent = <&pic>;
			};

			hda@7,0 {
				compatible = "pci0014,7a07.0",
						   "pci0014,7a07",
						   "pciclass040300",
						   "pciclass0403";

				reg = <0x3800 0x0 0x0 0x0 0x0>;
				interrupts = <58 IRQ_TYPE_LEVEL_HIGH>;
				interrupt-parent = <&pic>;
			};

			gmac@3,0 {
				compatible = "pci0014,7a03.0",
						   "pci0014,7a03",
						   "pciclass020000",
						   "pciclass0200";

				reg = <0x1800 0x0 0x0 0x0 0x0>;
				interrupts = <12 IRQ_TYPE_LEVEL_HIGH>,
					     <13 IRQ_TYPE_LEVEL_HIGH>;
				interrupt-names = "macirq", "eth_lpi";
				interrupt-parent = <&pic>;
				phy-mode = "rgmii";
				mdio {
					#address-cells = <1>;
					#size-cells = <0>;
					compatible = "snps,dwmac-mdio";
					phy0: ethernet-phy@0 {
						reg = <0>;
					};
				};
			};

			gmac@3,1 {
				compatible = "pci0014,7a03.0",
						   "pci0014,7a03",
						   "pciclass020000",
						   "pciclass0200",
						   "loongson, pci-gmac";

				reg = <0x1900 0x0 0x0 0x0 0x0>;
				interrupts = <14 IRQ_TYPE_LEVEL_HIGH>,
					     <15 IRQ_TYPE_LEVEL_HIGH>;
				interrupt-names = "macirq", "eth_lpi";
				interrupt-parent = <&pic>;
				phy-mode = "rgmii";
				mdio {
					#address-cells = <1>;
					#size-cells = <0>;
					compatible = "snps,dwmac-mdio";
					phy1: ethernet-phy@1 {
						reg = <0>;
					};
				};
			};

			pci_bridge@9,0 {
				compatible = "pci0014,7a19.1",
						   "pci0014,7a19",
						   "pciclass060400",
						   "pciclass0604";

				reg = <0x4800 0x0 0x0 0x0 0x0>;
				interrupts = <32 IRQ_TYPE_LEVEL_HIGH>;
				interrupt-parent = <&pic>;

				#interrupt-cells = <1>;
				interrupt-map-mask = <0 0 0 0>;
				interrupt-map = <0 0 0 0 &pic 32 IRQ_TYPE_LEVEL_HIGH>;
			};

			pci_bridge@a,0 {
				compatible = "pci0014,7a09.1",
						   "pci0014,7a09",
						   "pciclass060400",
						   "pciclass0604";

				reg = <0x5000 0x0 0x0 0x0 0x0>;
				interrupts = <33 IRQ_TYPE_LEVEL_HIGH>;
				interrupt-parent = <&pic>;

				#interrupt-cells = <1>;
				interrupt-map-mask = <0 0 0 0>;
				interrupt-map = <0 0 0 0 &pic 33 IRQ_TYPE_LEVEL_HIGH>;
			};

			pci_bridge@b,0 {
				compatible = "pci0014,7a09.1",
						   "pci0014,7a09",
						   "pciclass060400",
						   "pciclass0604";

				reg = <0x5800 0x0 0x0 0x0 0x0>;
				interrupts = <34 IRQ_TYPE_LEVEL_HIGH>;
				interrupt-parent = <&pic>;

				#interrupt-cells = <1>;
				interrupt-map-mask = <0 0 0 0>;
				interrupt-map = <0 0 0 0 &pic 34 IRQ_TYPE_LEVEL_HIGH>;
			};

			pci_bridge@c,0 {
				compatible = "pci0014,7a09.1",
						   "pci0014,7a09",
						   "pciclass060400",
						   "pciclass0604";

				reg = <0x6000 0x0 0x0 0x0 0x0>;
				interrupts = <35 IRQ_TYPE_LEVEL_HIGH>;
				interrupt-parent = <&pic>;

				#interrupt-cells = <1>;
				interrupt-map-mask = <0 0 0 0>;
				interrupt-map = <0 0 0 0 &pic 35 IRQ_TYPE_LEVEL_HIGH>;
			};

			pci_bridge@d,0 {
				compatible = "pci0014,7a19.1",
						   "pci0014,7a19",
						   "pciclass060400",
						   "pciclass0604";

				reg = <0x6800 0x0 0x0 0x0 0x0>;
				interrupts = <36 IRQ_TYPE_LEVEL_HIGH>;
				interrupt-parent = <&pic>;

				#interrupt-cells = <1>;
				interrupt-map-mask = <0 0 0 0>;
				interrupt-map = <0 0 0 0 &pic 36 IRQ_TYPE_LEVEL_HIGH>;
			};

			pci_bridge@e,0 {
				compatible = "pci0014,7a09.1",
						   "pci0014,7a09",
						   "pciclass060400",
						   "pciclass0604";

				reg = <0x7000 0x0 0x0 0x0 0x0>;
				interrupts = <37 IRQ_TYPE_LEVEL_HIGH>;
				interrupt-parent = <&pic>;

				#interrupt-cells = <1>;
				interrupt-map-mask = <0 0 0 0>;
				interrupt-map = <0 0 0 0 &pic 37 IRQ_TYPE_LEVEL_HIGH>;
			};

			pci_bridge@f,0 {
				compatible = "pci0014,7a29.1",
						   "pci0014,7a29",
						   "pciclass060400",
						   "pciclass0604";

				reg = <0x7800 0x0 0x0 0x0 0x0>;
				interrupts = <40 IRQ_TYPE_LEVEL_HIGH>;
				interrupt-parent = <&pic>;

				#interrupt-cells = <1>;
				interrupt-map-mask = <0 0 0 0>;
				interrupt-map = <0 0 0 0 &pic 40 IRQ_TYPE_LEVEL_HIGH>;
			};

			pci_bridge@10,0 {
				compatible = "pci0014,7a19.1",
						   "pci0014,7a19",
						   "pciclass060400",
						   "pciclass0604";

				reg = <0x8000 0x0 0x0 0x0 0x0>;
				interrupts = <41 IRQ_TYPE_LEVEL_HIGH>;
				interrupt-parent = <&pic>;

				#interrupt-cells = <1>;
				interrupt-map-mask = <0 0 0 0>;
				interrupt-map = <0 0 0 0 &pic 41 IRQ_TYPE_LEVEL_HIGH>;
			};

			pci_bridge@11,0 {
				compatible = "pci0014,7a29.1",
						   "pci0014,7a29",
						   "pciclass060400",
						   "pciclass0604";

				reg = <0x8800 0x0 0x0 0x0 0x0>;
				interrupts = <42 IRQ_TYPE_LEVEL_HIGH>;
				interrupt-parent = <&pic>;

				#interrupt-cells = <1>;
				interrupt-map-mask = <0 0 0 0>;
				interrupt-map = <0 0 0 0 &pic 42 IRQ_TYPE_LEVEL_HIGH>;
			};

			pci_bridge@12,0 {
				compatible = "pci0014,7a19.1",
						   "pci0014,7a19",
						   "pciclass060400",
						   "pciclass0604";

				reg = <0x9000 0x0 0x0 0x0 0x0>;
				interrupts = <43 IRQ_TYPE_LEVEL_HIGH>;
				interrupt-parent = <&pic>;

				#interrupt-cells = <1>;
				interrupt-map-mask = <0 0 0 0>;
				interrupt-map = <0 0 0 0 &pic 43 IRQ_TYPE_LEVEL_HIGH>;
			};

			pci_bridge@13,0 {
				compatible = "pci0014,7a29.1",
						   "pci0014,7a29",
						   "pciclass060400",
						   "pciclass0604";

				reg = <0x9800 0x0 0x0 0x0 0x0>;
				interrupts = <38 IRQ_TYPE_LEVEL_HIGH>;
				interrupt-parent = <&pic>;

				#interrupt-cells = <1>;
				interrupt-map-mask = <0 0 0 0>;
				interrupt-map = <0 0 0 0 &pic 38 IRQ_TYPE_LEVEL_HIGH>;
			};

			pci_bridge@14,0 {
				compatible = "pci0014,7a19.1",
						   "pci0014,7a19",
						   "pciclass060400",
						   "pciclass0604";

				reg = <0xa000 0x0 0x0 0x0 0x0>;
				interrupts = <39 IRQ_TYPE_LEVEL_HIGH>;
				interrupt-parent = <&pic>;

				#interrupt-cells = <1>;
				interrupt-map-mask = <0 0 0 0>;
				interrupt-map = <0 0 0 0 &pic 39 IRQ_TYPE_LEVEL_HIGH>;
			};
		};

		isa@18000000 {
			compatible = "isa";
			#address-cells = <2>;
			#size-cells = <1>;
			ranges = <1 0 0 0x18000000 0x20000>;
		};
	};
};
Commit	Line	Data
24af1059 JY	1	// SPDX-License-Identifier: GPL-2.0
	2
	3	/ {
	4	pch: bus@10000000 {
	5	compatible = "simple-bus";
	6	#address-cells = <2>;
	7	#size-cells = <2>;
	8	ranges = <0 0x10000000 0 0x10000000 0 0x10000000 /* PIO & CONF & APB */
	9	0 0x20000000 0 0x20000000 0 0x10000000
	10	0 0x40000000 0 0x40000000 0 0x40000000 /* PCI MEM */
	11	0xe00 0x00000000 0xe00 0x00000000 0x100 0x0000000>;
	12
	13	pic: interrupt-controller@10000000 {
	14	compatible = "loongson,pch-pic-1.0";
	15	reg = <0 0x10000000 0 0x400>;
	16	interrupt-controller;
	17	interrupt-parent = <&htvec>;
	18	loongson,pic-base-vec = <0>;
	19	#interrupt-cells = <2>;
	20	};
	21
8a649e33 BZ	22	rtc0: rtc@100d0100 {
	23	compatible = "loongson,ls7a-rtc";
	24	reg = <0 0x100d0100 0 0x78>;
	25	interrupt-parent = <&pic>;
	26	interrupts = <52 IRQ_TYPE_LEVEL_HIGH>;
	27	};
	28
5fa1f768 TY	29	ls7a_uart0: serial@10080000 {
	30	compatible = "ns16550a";
	31	reg = <0 0x10080000 0 0x100>;
	32	clock-frequency = <50000000>;
	33	interrupt-parent = <&pic>;
	34	interrupts = <8 IRQ_TYPE_LEVEL_HIGH>;
	35	no-loopback-test;
	36	};
	37
	38	ls7a_uart1: serial@10080100 {
	39	status = "disabled";
	40	compatible = "ns16550a";
	41	reg = <0 0x10080100 0 0x100>;
	42	clock-frequency = <50000000>;
	43	interrupt-parent = <&pic>;
	44	interrupts = <8 IRQ_TYPE_LEVEL_HIGH>;
	45	no-loopback-test;
	46	};
	47
	48	ls7a_uart2: serial@10080200 {
	49	status = "disabled";
	50	compatible = "ns16550a";
	51	reg = <0 0x10080200 0 0x100>;
	52	clock-frequency = <50000000>;
	53	interrupt-parent = <&pic>;
	54	interrupts = <8 IRQ_TYPE_LEVEL_HIGH>;
	55	no-loopback-test;
	56	};
	57
	58	ls7a_uart3: serial@10080300 {
	59	status = "disabled";
	60	compatible = "ns16550a";
	61	reg = <0 0x10080300 0 0x100>;
	62	clock-frequency = <50000000>;
	63	interrupt-parent = <&pic>;
	64	interrupts = <8 IRQ_TYPE_LEVEL_HIGH>;
	65	no-loopback-test;
	66	};
	67
24af1059 JY	68	pci@1a000000 {
	69	compatible = "loongson,ls7a-pci";
	70	device_type = "pci";
	71	#address-cells = <3>;
	72	#size-cells = <2>;
	73	#interrupt-cells = <2>;
	74	msi-parent = <&msi>;
	75
	76	reg = <0 0x1a000000 0 0x02000000>,
	77	<0xefe 0x00000000 0 0x20000000>;
	78
	79	ranges = <0x01000000 0x0 0x00020000 0x0 0x18020000 0x0 0x00020000>,
	80	<0x02000000 0x0 0x40000000 0x0 0x40000000 0x0 0x40000000>;
	81
	82	ohci@4,0 {
	83	compatible = "pci0014,7a24.0",
	84	"pci0014,7a24",
	85	"pciclass0c0310",
	86	"pciclass0c03";
	87
	88	reg = <0x2000 0x0 0x0 0x0 0x0>;
	89	interrupts = <49 IRQ_TYPE_LEVEL_HIGH>;
	90	interrupt-parent = <&pic>;
	91	};
	92
	93	ehci@4,1 {
	94	compatible = "pci0014,7a14.0",
	95	"pci0014,7a14",
	96	"pciclass0c0320",
	97	"pciclass0c03";
	98
	99	reg = <0x2100 0x0 0x0 0x0 0x0>;
	100	interrupts = <48 IRQ_TYPE_LEVEL_HIGH>;
	101	interrupt-parent = <&pic>;
	102	};
	103
	104	ohci@5,0 {
	105	compatible = "pci0014,7a24.0",
	106	"pci0014,7a24",
	107	"pciclass0c0310",
	108	"pciclass0c03";
	109
	110	reg = <0x2800 0x0 0x0 0x0 0x0>;
	111	interrupts = <51 IRQ_TYPE_LEVEL_HIGH>;
	112	interrupt-parent = <&pic>;
	113	};
	114
	115	ehci@5,1 {
	116	compatible = "pci0014,7a14.0",
	117	"pci0014,7a14",
	118	"pciclass0c0320",
	119	"pciclass0c03";
	120
	121	reg = <0x2900 0x0 0x0 0x0 0x0>;
	122	interrupts = <50 IRQ_TYPE_LEVEL_HIGH>;
	123	interrupt-parent = <&pic>;
	124	};
	125
	126	sata@8,0 {
	127	compatible = "pci0014,7a08.0",
	128	"pci0014,7a08",
	129	"pciclass010601",
	130	"pciclass0106";
	131
132	reg = <0x4000 0x0 0x0 0x0 0x0>;
133	interrupts = <16 IRQ_TYPE_LEVEL_HIGH>;
134	interrupt-parent = <&pic>;
135	};
136
137	sata@8,1 {
138	compatible = "pci0014,7a08.0",
139	"pci0014,7a08",
140	"pciclass010601",
141	"pciclass0106";
142
143	reg = <0x4100 0x0 0x0 0x0 0x0>;
144	interrupts = <17 IRQ_TYPE_LEVEL_HIGH>;
145	interrupt-parent = <&pic>;
146	};
147
148	sata@8,2 {
149	compatible = "pci0014,7a08.0",
150	"pci0014,7a08",
151	"pciclass010601",
152	"pciclass0106";
153
154	reg = <0x4200 0x0 0x0 0x0 0x0>;
155	interrupts = <18 IRQ_TYPE_LEVEL_HIGH>;
156	interrupt-parent = <&pic>;
157	};
158
159	gpu@6,0 {
160	compatible = "pci0014,7a15.0",
161	"pci0014,7a15",
162	"pciclass030200",
163	"pciclass0302";
164
165	reg = <0x3000 0x0 0x0 0x0 0x0>;
166	interrupts = <29 IRQ_TYPE_LEVEL_HIGH>;
167	interrupt-parent = <&pic>;
168	};
169
170	dc@6,1 {
171	compatible = "pci0014,7a06.0",
172	"pci0014,7a06",
173	"pciclass030000",
174	"pciclass0300";
175
176	reg = <0x3100 0x0 0x0 0x0 0x0>;
177	interrupts = <28 IRQ_TYPE_LEVEL_HIGH>;
178	interrupt-parent = <&pic>;
179	};
180
181	hda@7,0 {
182	compatible = "pci0014,7a07.0",
183	"pci0014,7a07",
184	"pciclass040300",
185	"pciclass0403";
186
187	reg = <0x3800 0x0 0x0 0x0 0x0>;
188	interrupts = <58 IRQ_TYPE_LEVEL_HIGH>;
189	interrupt-parent = <&pic>;
190	};
191
192	gmac@3,0 {
193	compatible = "pci0014,7a03.0",
194	"pci0014,7a03",
195	"pciclass020000",
4907a3f5	196	"pciclass0200";
24af1059 JY	197
	198	reg = <0x1800 0x0 0x0 0x0 0x0>;
	199	interrupts = <12 IRQ_TYPE_LEVEL_HIGH>,
	200	<13 IRQ_TYPE_LEVEL_HIGH>;
	201	interrupt-names = "macirq", "eth_lpi";
	202	interrupt-parent = <&pic>;
	203	phy-mode = "rgmii";
	204	mdio {
	205	#address-cells = <1>;
	206	#size-cells = <0>;
	207	compatible = "snps,dwmac-mdio";
	208	phy0: ethernet-phy@0 {
	209	reg = <0>;
	210	};
	211	};
	212	};
	213
	214	gmac@3,1 {
	215	compatible = "pci0014,7a03.0",
	216	"pci0014,7a03",
	217	"pciclass020000",
47a311c3 QZ	218	"pciclass0200",
47a311c3 QZ	219	"loongson, pci-gmac";
24af1059 JY	220
	221	reg = <0x1900 0x0 0x0 0x0 0x0>;
	222	interrupts = <14 IRQ_TYPE_LEVEL_HIGH>,
	223	<15 IRQ_TYPE_LEVEL_HIGH>;
	224	interrupt-names = "macirq", "eth_lpi";
	225	interrupt-parent = <&pic>;
	226	phy-mode = "rgmii";
	227	mdio {
	228	#address-cells = <1>;
	229	#size-cells = <0>;
	230	compatible = "snps,dwmac-mdio";
	231	phy1: ethernet-phy@1 {
	232	reg = <0>;
	233	};
	234	};
	235	};
	236
	237	pci_bridge@9,0 {
	238	compatible = "pci0014,7a19.1",
	239	"pci0014,7a19",
	240	"pciclass060400",
	241	"pciclass0604";
	242
	243	reg = <0x4800 0x0 0x0 0x0 0x0>;
	244	interrupts = <32 IRQ_TYPE_LEVEL_HIGH>;
	245	interrupt-parent = <&pic>;
	246
	247	#interrupt-cells = <1>;
	248	interrupt-map-mask = <0 0 0 0>;
	249	interrupt-map = <0 0 0 0 &pic 32 IRQ_TYPE_LEVEL_HIGH>;
	250	};
	251
	252	pci_bridge@a,0 {
	253	compatible = "pci0014,7a09.1",
	254	"pci0014,7a09",
	255	"pciclass060400",
	256	"pciclass0604";
	257
	258	reg = <0x5000 0x0 0x0 0x0 0x0>;
	259	interrupts = <33 IRQ_TYPE_LEVEL_HIGH>;
	260	interrupt-parent = <&pic>;
	261
	262	#interrupt-cells = <1>;
	263	interrupt-map-mask = <0 0 0 0>;
	264	interrupt-map = <0 0 0 0 &pic 33 IRQ_TYPE_LEVEL_HIGH>;
	265	};
	266
	267	pci_bridge@b,0 {
	268	compatible = "pci0014,7a09.1",
	269	"pci0014,7a09",
	270	"pciclass060400",
	271	"pciclass0604";
	272
	273	reg = <0x5800 0x0 0x0 0x0 0x0>;
	274	interrupts = <34 IRQ_TYPE_LEVEL_HIGH>;
	275	interrupt-parent = <&pic>;
	276
	277	#interrupt-cells = <1>;
	278	interrupt-map-mask = <0 0 0 0>;
	279	interrupt-map = <0 0 0 0 &pic 34 IRQ_TYPE_LEVEL_HIGH>;
	280	};
	281
	282	pci_bridge@c,0 {
	283	compatible = "pci0014,7a09.1",
284	"pci0014,7a09",
285	"pciclass060400",
286	"pciclass0604";
287
288	reg = <0x6000 0x0 0x0 0x0 0x0>;
289	interrupts = <35 IRQ_TYPE_LEVEL_HIGH>;
290	interrupt-parent = <&pic>;
291
292	#interrupt-cells = <1>;
293	interrupt-map-mask = <0 0 0 0>;
294	interrupt-map = <0 0 0 0 &pic 35 IRQ_TYPE_LEVEL_HIGH>;
295	};
296
297	pci_bridge@d,0 {
298	compatible = "pci0014,7a19.1",
299	"pci0014,7a19",
300	"pciclass060400",
301	"pciclass0604";
302
303	reg = <0x6800 0x0 0x0 0x0 0x0>;
304	interrupts = <36 IRQ_TYPE_LEVEL_HIGH>;
305	interrupt-parent = <&pic>;
306
307	#interrupt-cells = <1>;
308	interrupt-map-mask = <0 0 0 0>;
309	interrupt-map = <0 0 0 0 &pic 36 IRQ_TYPE_LEVEL_HIGH>;
310	};
311
312	pci_bridge@e,0 {
313	compatible = "pci0014,7a09.1",
314	"pci0014,7a09",
315	"pciclass060400",
316	"pciclass0604";
317
318	reg = <0x7000 0x0 0x0 0x0 0x0>;
319	interrupts = <37 IRQ_TYPE_LEVEL_HIGH>;
320	interrupt-parent = <&pic>;
321
322	#interrupt-cells = <1>;
323	interrupt-map-mask = <0 0 0 0>;
324	interrupt-map = <0 0 0 0 &pic 37 IRQ_TYPE_LEVEL_HIGH>;
325	};
326
327	pci_bridge@f,0 {
328	compatible = "pci0014,7a29.1",
329	"pci0014,7a29",
330	"pciclass060400",
331	"pciclass0604";
332
333	reg = <0x7800 0x0 0x0 0x0 0x0>;
334	interrupts = <40 IRQ_TYPE_LEVEL_HIGH>;
335	interrupt-parent = <&pic>;
336
337	#interrupt-cells = <1>;
338	interrupt-map-mask = <0 0 0 0>;
339	interrupt-map = <0 0 0 0 &pic 40 IRQ_TYPE_LEVEL_HIGH>;
340	};
341
342	pci_bridge@10,0 {
343	compatible = "pci0014,7a19.1",
344	"pci0014,7a19",
345	"pciclass060400",
346	"pciclass0604";
347
348	reg = <0x8000 0x0 0x0 0x0 0x0>;
349	interrupts = <41 IRQ_TYPE_LEVEL_HIGH>;
350	interrupt-parent = <&pic>;
351
352	#interrupt-cells = <1>;
353	interrupt-map-mask = <0 0 0 0>;
354	interrupt-map = <0 0 0 0 &pic 41 IRQ_TYPE_LEVEL_HIGH>;
355	};
356
357	pci_bridge@11,0 {
358	compatible = "pci0014,7a29.1",
359	"pci0014,7a29",
360	"pciclass060400",
361	"pciclass0604";
362
363	reg = <0x8800 0x0 0x0 0x0 0x0>;
364	interrupts = <42 IRQ_TYPE_LEVEL_HIGH>;
365	interrupt-parent = <&pic>;
366
367	#interrupt-cells = <1>;
368	interrupt-map-mask = <0 0 0 0>;
369	interrupt-map = <0 0 0 0 &pic 42 IRQ_TYPE_LEVEL_HIGH>;
370	};
371
372	pci_bridge@12,0 {
373	compatible = "pci0014,7a19.1",
374	"pci0014,7a19",
375	"pciclass060400",
376	"pciclass0604";
377
378	reg = <0x9000 0x0 0x0 0x0 0x0>;
379	interrupts = <43 IRQ_TYPE_LEVEL_HIGH>;
380	interrupt-parent = <&pic>;
381
382	#interrupt-cells = <1>;
383	interrupt-map-mask = <0 0 0 0>;
384	interrupt-map = <0 0 0 0 &pic 43 IRQ_TYPE_LEVEL_HIGH>;
385	};
386
387	pci_bridge@13,0 {
388	compatible = "pci0014,7a29.1",
389	"pci0014,7a29",
390	"pciclass060400",
391	"pciclass0604";
392
393	reg = <0x9800 0x0 0x0 0x0 0x0>;
394	interrupts = <38 IRQ_TYPE_LEVEL_HIGH>;
395	interrupt-parent = <&pic>;
396
397	#interrupt-cells = <1>;
398	interrupt-map-mask = <0 0 0 0>;
399	interrupt-map = <0 0 0 0 &pic 38 IRQ_TYPE_LEVEL_HIGH>;
400	};
401
402	pci_bridge@14,0 {
403	compatible = "pci0014,7a19.1",
404	"pci0014,7a19",
405	"pciclass060400",
406	"pciclass0604";
407
408	reg = <0xa000 0x0 0x0 0x0 0x0>;
409	interrupts = <39 IRQ_TYPE_LEVEL_HIGH>;
410	interrupt-parent = <&pic>;
411
412	#interrupt-cells = <1>;
413	interrupt-map-mask = <0 0 0 0>;
414	interrupt-map = <0 0 0 0 &pic 39 IRQ_TYPE_LEVEL_HIGH>;
415	};
416	};
b91aff3b	417
15b32eb2	418	isa@18000000 {
b91aff3b JY	419	compatible = "isa";
	420	#address-cells = <2>;
	421	#size-cells = <1>;
	422	ranges = <1 0 0 0x18000000 0x20000>;
	423	};
24af1059 JY	424	};
24af1059 JY	425	};