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6471a225 ÁFR |
1 | /* |
2 | * Copyright (C) 2017 Álvaro Fernández Rojas <noltari@gmail.com> | |
3 | * | |
4 | * SPDX-License-Identifier: GPL-2.0+ | |
5 | */ | |
6 | ||
5b14e13c | 7 | #include <dt-bindings/clock/bcm6328-clock.h> |
6471a225 ÁFR |
8 | #include <dt-bindings/gpio/gpio.h> |
9 | #include "skeleton.dtsi" | |
10 | ||
11 | / { | |
12 | compatible = "brcm,bcm6328"; | |
13 | ||
14 | cpus { | |
15 | reg = <0x10000000 0x4>; | |
16 | #address-cells = <1>; | |
17 | #size-cells = <0>; | |
18 | u-boot,dm-pre-reloc; | |
19 | ||
20 | cpu@0 { | |
21 | compatible = "brcm,bcm6328-cpu", "mips,mips4Kc"; | |
22 | device_type = "cpu"; | |
23 | reg = <0>; | |
24 | u-boot,dm-pre-reloc; | |
25 | }; | |
26 | ||
27 | cpu@1 { | |
28 | compatible = "brcm,bcm6328-cpu", "mips,mips4Kc"; | |
29 | device_type = "cpu"; | |
30 | reg = <1>; | |
31 | u-boot,dm-pre-reloc; | |
32 | }; | |
33 | }; | |
34 | ||
35 | clocks { | |
36 | compatible = "simple-bus"; | |
37 | #address-cells = <1>; | |
38 | #size-cells = <1>; | |
39 | u-boot,dm-pre-reloc; | |
40 | ||
41 | periph_osc: periph-osc { | |
42 | compatible = "fixed-clock"; | |
43 | #clock-cells = <0>; | |
44 | clock-frequency = <50000000>; | |
45 | u-boot,dm-pre-reloc; | |
46 | }; | |
5b14e13c ÁFR |
47 | |
48 | periph_clk: periph-clk { | |
49 | compatible = "brcm,bcm6345-clk"; | |
50 | reg = <0x10000004 0x4>; | |
51 | #clock-cells = <1>; | |
52 | }; | |
6471a225 ÁFR |
53 | }; |
54 | ||
55 | ubus { | |
56 | compatible = "simple-bus"; | |
57 | #address-cells = <1>; | |
58 | #size-cells = <1>; | |
59 | u-boot,dm-pre-reloc; | |
60 | ||
61 | pll_cntl: syscon@10000068 { | |
62 | compatible = "syscon"; | |
63 | reg = <0x10000068 0x4>; | |
64 | }; | |
65 | ||
66 | syscon-reboot { | |
67 | compatible = "syscon-reboot"; | |
68 | regmap = <&pll_cntl>; | |
69 | offset = <0x0>; | |
70 | mask = <0x1>; | |
71 | }; | |
72 | ||
320186f4 ÁFR |
73 | gpio: gpio-controller@10000084 { |
74 | compatible = "brcm,bcm6345-gpio"; | |
75 | reg = <0x10000084 0x4>, <0x1000008c 0x4>; | |
76 | gpio-controller; | |
77 | #gpio-cells = <2>; | |
78 | ||
79 | status = "disabled"; | |
80 | }; | |
81 | ||
6471a225 ÁFR |
82 | uart0: serial@10000100 { |
83 | compatible = "brcm,bcm6345-uart"; | |
84 | reg = <0x10000100 0x18>; | |
85 | clocks = <&periph_osc>; | |
86 | ||
87 | status = "disabled"; | |
88 | }; | |
89 | ||
90 | uart1: serial@10000120 { | |
91 | compatible = "brcm,bcm6345-uart"; | |
92 | reg = <0x10000120 0x18>; | |
93 | clocks = <&periph_osc>; | |
94 | ||
95 | status = "disabled"; | |
96 | }; | |
97 | ||
e0f1fd2b ÁFR |
98 | leds: led-controller@10000800 { |
99 | compatible = "brcm,bcm6328-leds"; | |
100 | reg = <0x10000800 0x24>; | |
101 | #address-cells = <1>; | |
102 | #size-cells = <0>; | |
103 | ||
104 | status = "disabled"; | |
105 | }; | |
106 | ||
6471a225 ÁFR |
107 | memory-controller@10003000 { |
108 | compatible = "brcm,bcm6328-mc"; | |
109 | reg = <0x10003000 0x1000>; | |
110 | u-boot,dm-pre-reloc; | |
111 | }; | |
112 | }; | |
113 | }; |