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1da177e4 | 1 | /* |
25985edc | 2 | * Alchemy Semi Pb1000 Reference Board |
1da177e4 | 3 | * |
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4 | * Copyright 2001, 2008 MontaVista Software Inc. |
5 | * Author: MontaVista Software, Inc. <source@mvista.com> | |
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6 | * |
7 | * ######################################################################## | |
8 | * | |
9 | * This program is free software; you can distribute it and/or modify it | |
10 | * under the terms of the GNU General Public License (Version 2) as | |
11 | * published by the Free Software Foundation. | |
12 | * | |
13 | * This program is distributed in the hope it will be useful, but WITHOUT | |
14 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | |
15 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License | |
16 | * for more details. | |
17 | * | |
18 | * You should have received a copy of the GNU General Public License along | |
19 | * with this program; if not, write to the Free Software Foundation, Inc., | |
20 | * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA. | |
21 | * | |
22 | * ######################################################################## | |
23 | * | |
24 | * | |
25 | */ | |
26 | #ifndef __ASM_PB1000_H | |
27 | #define __ASM_PB1000_H | |
28 | ||
29 | /* PCMCIA PB1000 specific defines */ | |
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30 | #define PCMCIA_MAX_SOCK 1 |
31 | #define PCMCIA_NUM_SOCKS (PCMCIA_MAX_SOCK + 1) | |
32 | ||
33 | #define PB1000_PCR 0xBE000000 | |
34 | # define PCR_SLOT_0_VPP0 (1 << 0) | |
35 | # define PCR_SLOT_0_VPP1 (1 << 1) | |
36 | # define PCR_SLOT_0_VCC0 (1 << 2) | |
37 | # define PCR_SLOT_0_VCC1 (1 << 3) | |
38 | # define PCR_SLOT_0_RST (1 << 4) | |
39 | # define PCR_SLOT_1_VPP0 (1 << 8) | |
40 | # define PCR_SLOT_1_VPP1 (1 << 9) | |
41 | # define PCR_SLOT_1_VCC0 (1 << 10) | |
42 | # define PCR_SLOT_1_VCC1 (1 << 11) | |
43 | # define PCR_SLOT_1_RST (1 << 12) | |
44 | ||
45 | #define PB1000_MDR 0xBE000004 | |
46 | # define MDR_PI (1 << 5) /* PCMCIA int latch */ | |
47 | # define MDR_EPI (1 << 14) /* enable PCMCIA int */ | |
48 | # define MDR_CPI (1 << 15) /* clear PCMCIA int */ | |
49 | ||
50 | #define PB1000_ACR1 0xBE000008 | |
51 | # define ACR1_SLOT_0_CD1 (1 << 0) /* card detect 1 */ | |
52 | # define ACR1_SLOT_0_CD2 (1 << 1) /* card detect 2 */ | |
53 | # define ACR1_SLOT_0_READY (1 << 2) /* ready */ | |
54 | # define ACR1_SLOT_0_STATUS (1 << 3) /* status change */ | |
55 | # define ACR1_SLOT_0_VS1 (1 << 4) /* voltage sense 1 */ | |
56 | # define ACR1_SLOT_0_VS2 (1 << 5) /* voltage sense 2 */ | |
57 | # define ACR1_SLOT_0_INPACK (1 << 6) /* inpack pin status */ | |
58 | # define ACR1_SLOT_1_CD1 (1 << 8) /* card detect 1 */ | |
59 | # define ACR1_SLOT_1_CD2 (1 << 9) /* card detect 2 */ | |
60 | # define ACR1_SLOT_1_READY (1 << 10) /* ready */ | |
61 | # define ACR1_SLOT_1_STATUS (1 << 11) /* status change */ | |
62 | # define ACR1_SLOT_1_VS1 (1 << 12) /* voltage sense 1 */ | |
63 | # define ACR1_SLOT_1_VS2 (1 << 13) /* voltage sense 2 */ | |
64 | # define ACR1_SLOT_1_INPACK (1 << 14) /* inpack pin status */ | |
65 | ||
66 | #define CPLD_AUX0 0xBE00000C | |
67 | #define CPLD_AUX1 0xBE000010 | |
68 | #define CPLD_AUX2 0xBE000014 | |
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69 | |
70 | /* Voltage levels */ | |
71 | ||
72 | /* VPPEN1 - VPPEN0 */ | |
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73 | #define VPP_GND ((0 << 1) | (0 << 0)) |
74 | #define VPP_5V ((1 << 1) | (0 << 0)) | |
75 | #define VPP_3V ((0 << 1) | (1 << 0)) | |
76 | #define VPP_12V ((0 << 1) | (1 << 0)) | |
77 | #define VPP_HIZ ((1 << 1) | (1 << 0)) | |
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78 | |
79 | /* VCCEN1 - VCCEN0 */ | |
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80 | #define VCC_3V ((0 << 1) | (1 << 0)) |
81 | #define VCC_5V ((1 << 1) | (0 << 0)) | |
82 | #define VCC_HIZ ((0 << 1) | (0 << 0)) | |
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83 | |
84 | /* VPP/VCC */ | |
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85 | #define SET_VCC_VPP(VCC, VPP, SLOT) \ |
86 | ((((VCC) << 2) | ((VPP) << 0)) << ((SLOT) * 8)) | |
1da177e4 | 87 | #endif /* __ASM_PB1000_H */ |