projects / thirdparty / kernel / stable.git / blame
| Commit | Line | Data |
|---|---|---|
| 215ed200 JC |
1 | /* |
| 2 | * This program is free software; you can redistribute it and/or modify it | |
| 3 | * under the terms of the GNU General Public License version 2 as published | |
| 4 | * by the Free Software Foundation. | |
| 5 | * | |
| 6 | * Copyright (C) 2010 John Crispin <blogic@openwrt.org> | |
| a5c1aad8 | 7 | * Copyright (C) 2013-2015 Lantiq Beteiligungs-GmbH & Co.KG |
| 215ed200 JC |
8 | */ |
| 9 | ||
| 10 | #include <linux/export.h> | |
| 11 | #include <linux/clk.h> | |
| 12 | #include <asm/bootinfo.h> | |
| 13 | #include <asm/time.h> | |
| 14 | ||
| 15 | #include <lantiq_soc.h> | |
| 16 | ||
| 17 | #include "../prom.h" | |
| 18 | ||
| 19 | #define SOC_DANUBE "Danube" | |
| 20 | #define SOC_TWINPASS "Twinpass" | |
| 21 | #define SOC_AMAZON_SE "Amazon_SE" | |
| 22 | #define SOC_AR9 "AR9" | |
| a5c1aad8 HM |
23 | #define SOC_GR9 "GRX200" |
| 24 | #define SOC_VR9 "xRX200" | |
| 25 | #define SOC_AR10 "xRX300" | |
| 26 | #define SOC_GRX390 "xRX330" | |
| 215ed200 JC |
27 | |
| 28 | #define COMP_DANUBE "lantiq,danube" | |
| 29 | #define COMP_TWINPASS "lantiq,twinpass" | |
| 30 | #define COMP_AMAZON_SE "lantiq,ase" | |
| 31 | #define COMP_AR9 "lantiq,ar9" | |
| 32 | #define COMP_GR9 "lantiq,gr9" | |
| 33 | #define COMP_VR9 "lantiq,vr9" | |
| a5c1aad8 HM |
34 | #define COMP_AR10 "lantiq,ar10" |
| 35 | #define COMP_GRX390 "lantiq,grx390" | |
| 215ed200 JC |
36 | |
| 37 | #define PART_SHIFT 12 | |
| 38 | #define PART_MASK 0x0FFFFFFF | |
| 39 | #define REV_SHIFT 28 | |
| 40 | #define REV_MASK 0xF0000000 | |
| 41 | ||
| 42 | void __init ltq_soc_detect(struct ltq_soc_info *i) | |
| 43 | { | |
| 44 | i->partnum = (ltq_r32(LTQ_MPS_CHIPID) & PART_MASK) >> PART_SHIFT; | |
| 45 | i->rev = (ltq_r32(LTQ_MPS_CHIPID) & REV_MASK) >> REV_SHIFT; | |
| 46 | sprintf(i->rev_type, "1.%d", i->rev); | |
| 47 | switch (i->partnum) { | |
| 48 | case SOC_ID_DANUBE1: | |
| 49 | case SOC_ID_DANUBE2: | |
| 50 | i->name = SOC_DANUBE; | |
| 51 | i->type = SOC_TYPE_DANUBE; | |
| 52 | i->compatible = COMP_DANUBE; | |
| 53 | break; | |
| 54 | ||
| 55 | case SOC_ID_TWINPASS: | |
| 56 | i->name = SOC_TWINPASS; | |
| 57 | i->type = SOC_TYPE_DANUBE; | |
| 58 | i->compatible = COMP_TWINPASS; | |
| 59 | break; | |
| 60 | ||
| 61 | case SOC_ID_ARX188: | |
| 62 | case SOC_ID_ARX168_1: | |
| 63 | case SOC_ID_ARX168_2: | |
| 64 | case SOC_ID_ARX182: | |
| 65 | i->name = SOC_AR9; | |
| 66 | i->type = SOC_TYPE_AR9; | |
| 67 | i->compatible = COMP_AR9; | |
| 68 | break; | |
| 69 | ||
| 70 | case SOC_ID_GRX188: | |
| 71 | case SOC_ID_GRX168: | |
| 72 | i->name = SOC_GR9; | |
| 73 | i->type = SOC_TYPE_AR9; | |
| 74 | i->compatible = COMP_GR9; | |
| 75 | break; | |
| 76 | ||
| 77 | case SOC_ID_AMAZON_SE_1: | |
| 78 | case SOC_ID_AMAZON_SE_2: | |
| 79 | #ifdef CONFIG_PCI | |
| 80 | panic("ase is only supported for non pci kernels"); | |
| 81 | #endif | |
| 82 | i->name = SOC_AMAZON_SE; | |
| 83 | i->type = SOC_TYPE_AMAZON_SE; | |
| 84 | i->compatible = COMP_AMAZON_SE; | |
| 85 | break; | |
| 86 | ||
| 87 | case SOC_ID_VRX282: | |
| 88 | case SOC_ID_VRX268: | |
| 89 | case SOC_ID_VRX288: | |
| 90 | i->name = SOC_VR9; | |
| 91 | i->type = SOC_TYPE_VR9; | |
| 92 | i->compatible = COMP_VR9; | |
| 93 | break; | |
| 94 | ||
| 95 | case SOC_ID_GRX268: | |
| 96 | case SOC_ID_GRX288: | |
| 97 | i->name = SOC_GR9; | |
| 98 | i->type = SOC_TYPE_VR9; | |
| 99 | i->compatible = COMP_GR9; | |
| 100 | break; | |
| 101 | ||
| 102 | case SOC_ID_VRX268_2: | |
| 103 | case SOC_ID_VRX288_2: | |
| 104 | i->name = SOC_VR9; | |
| 105 | i->type = SOC_TYPE_VR9_2; | |
| 106 | i->compatible = COMP_VR9; | |
| 107 | break; | |
| 108 | ||
| 109 | case SOC_ID_GRX282_2: | |
| 110 | case SOC_ID_GRX288_2: | |
| 111 | i->name = SOC_GR9; | |
| 112 | i->type = SOC_TYPE_VR9_2; | |
| 113 | i->compatible = COMP_GR9; | |
| 114 | break; | |
| 115 | ||
| a5c1aad8 HM |
116 | case SOC_ID_ARX362: |
| 117 | case SOC_ID_ARX368: | |
| 118 | case SOC_ID_ARX382: | |
| 119 | case SOC_ID_ARX388: | |
| 120 | case SOC_ID_URX388: | |
| 121 | i->name = SOC_AR10; | |
| 122 | i->type = SOC_TYPE_AR10; | |
| 123 | i->compatible = COMP_AR10; | |
| 124 | break; | |
| 125 | ||
| 126 | case SOC_ID_GRX383: | |
| 127 | case SOC_ID_GRX369: | |
| 128 | case SOC_ID_GRX387: | |
| 129 | case SOC_ID_GRX389: | |
| 130 | i->name = SOC_GRX390; | |
| 131 | i->type = SOC_TYPE_GRX390; | |
| 132 | i->compatible = COMP_GRX390; | |
| 133 | break; | |
| 134 | ||
| 215ed200 JC |
135 | default: |
| 136 | unreachable(); | |
| 137 | break; | |
| 138 | } | |
| 139 | } |