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Commit | Line | Data |
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4a9cbbe8 WD |
1 | /* |
2 | * (C) Copyright 2000-2002 | |
3 | * Wolfgang Denk, DENX Software Engineering, wd@denx.de. | |
4 | * | |
3765b3e7 | 5 | * SPDX-License-Identifier: GPL-2.0+ |
4a9cbbe8 WD |
6 | */ |
7 | ||
8 | #include <common.h> | |
9 | #include <74xx_7xx.h> | |
10 | #include <asm/processor.h> | |
11 | ||
d87080b7 WD |
12 | DECLARE_GLOBAL_DATA_PTR; |
13 | ||
ee311214 | 14 | extern unsigned long get_board_bus_clk (void); |
4c52783b | 15 | |
4a9cbbe8 WD |
16 | static const int hid1_multipliers_x_10[] = { |
17 | 25, /* 0000 - 2.5x */ | |
18 | 75, /* 0001 - 7.5x */ | |
19 | 70, /* 0010 - 7x */ | |
20 | 10, /* 0011 - bypass */ | |
21 | 20, /* 0100 - 2x */ | |
22 | 65, /* 0101 - 6.5x */ | |
23 | 100, /* 0110 - 10x */ | |
24 | 45, /* 0111 - 4.5x */ | |
25 | 30, /* 1000 - 3x */ | |
26 | 55, /* 1001 - 5.5x */ | |
27 | 40, /* 1010 - 4x */ | |
28 | 50, /* 1011 - 5x */ | |
29 | 80, /* 1100 - 8x */ | |
30 | 60, /* 1101 - 6x */ | |
31 | 35, /* 1110 - 3.5x */ | |
32 | 0 /* 1111 - off */ | |
33 | }; | |
34 | ||
4dbcd69e | 35 | /* PLL_CFG[0:4] table for cpu 7448/7447A/7455/7457 */ |
36 | static const int hid1_74xx_multipliers_x_10[] = { | |
ee311214 | 37 | 115, /* 00000 - 11.5x */ |
38 | 170, /* 00001 - 17x */ | |
39 | 75, /* 00010 - 7.5x */ | |
40 | 150, /* 00011 - 15x */ | |
41 | 70, /* 00100 - 7x */ | |
42 | 180, /* 00101 - 18x */ | |
43 | 10, /* 00110 - bypass */ | |
44 | 200, /* 00111 - 20x */ | |
45 | 20, /* 01000 - 2x */ | |
46 | 210, /* 01001 - 21x */ | |
47 | 65, /* 01010 - 6.5x */ | |
48 | 130, /* 01011 - 13x */ | |
49 | 85, /* 01100 - 8.5x */ | |
4dbcd69e | 50 | 240, /* 01101 - 24x */ |
ee311214 | 51 | 95, /* 01110 - 9.5x */ |
52 | 90, /* 01111 - 9x */ | |
53 | 30, /* 10000 - 3x */ | |
54 | 105, /* 10001 - 10.5x */ | |
55 | 55, /* 10010 - 5.5x */ | |
56 | 110, /* 10011 - 11x */ | |
57 | 40, /* 10100 - 4x */ | |
58 | 100, /* 10101 - 10x */ | |
59 | 50, /* 10110 - 5x */ | |
60 | 120, /* 10111 - 12x */ | |
61 | 80, /* 11000 - 8x */ | |
62 | 140, /* 11001 - 14x */ | |
63 | 60, /* 11010 - 6x */ | |
64 | 160, /* 11011 - 16x */ | |
65 | 135, /* 11100 - 13.5x */ | |
66 | 280, /* 11101 - 28x */ | |
67 | 0, /* 11110 - off */ | |
68 | 125 /* 11111 - 12.5x */ | |
4c52783b | 69 | }; |
70 | ||
72755c71 | 71 | static const int hid1_fx_multipliers_x_10[] = { |
3a473b2a WD |
72 | 00, /* 0000 - off */ |
73 | 00, /* 0001 - off */ | |
74 | 10, /* 0010 - bypass */ | |
75 | 10, /* 0011 - bypass */ | |
76 | 20, /* 0100 - 2x */ | |
77 | 25, /* 0101 - 2.5x */ | |
78 | 30, /* 0110 - 3x */ | |
79 | 35, /* 0111 - 3.5x */ | |
80 | 40, /* 1000 - 4x */ | |
81 | 45, /* 1001 - 4.5x */ | |
82 | 50, /* 1010 - 5x */ | |
83 | 55, /* 1011 - 5.5x */ | |
84 | 60, /* 1100 - 6x */ | |
85 | 65, /* 1101 - 6.5x */ | |
86 | 70, /* 1110 - 7x */ | |
87 | 75, /* 1111 - 7.5 */ | |
88 | 80, /* 10000 - 8x */ | |
89 | 85, /* 10001 - 8.5x */ | |
90 | 90, /* 10010 - 9x */ | |
91 | 95, /* 10011 - 9.5x */ | |
92 | 100, /* 10100 - 10x */ | |
93 | 110, /* 10101 - 11x */ | |
94 | 120, /* 10110 - 12x */ | |
72755c71 WD |
95 | }; |
96 | ||
97 | ||
4a9cbbe8 WD |
98 | /* ------------------------------------------------------------------------- */ |
99 | ||
100 | /* | |
101 | * Measure CPU clock speed (core clock GCLK1, GCLK2) | |
102 | * | |
103 | * (Approx. GCLK frequency in Hz) | |
104 | */ | |
105 | ||
106 | int get_clocks (void) | |
107 | { | |
3a473b2a WD |
108 | ulong clock = 0; |
109 | ||
6d0f6bcf JCPV |
110 | #ifdef CONFIG_SYS_BUS_CLK |
111 | gd->bus_clk = CONFIG_SYS_BUS_CLK; /* bus clock is a fixed frequency */ | |
4dbcd69e | 112 | #else |
113 | gd->bus_clk = get_board_bus_clk (); /* bus clock is configurable */ | |
4c52783b | 114 | #endif |
115 | ||
3a473b2a WD |
116 | /* calculate the clock frequency based upon the CPU type */ |
117 | switch (get_cpu_type()) { | |
4c52783b | 118 | case CPU_7447A: |
119 | case CPU_7448: | |
3a473b2a WD |
120 | case CPU_7455: |
121 | case CPU_7457: | |
122 | /* | |
3a473b2a WD |
123 | * Make sure division is done before multiplication to prevent 32-bit |
124 | * arithmetic overflows which will cause a negative number | |
125 | */ | |
ee311214 | 126 | clock = (gd->bus_clk / 10) * |
4dbcd69e | 127 | hid1_74xx_multipliers_x_10[(get_hid1 () >> 12) & 0x1F]; |
3a473b2a WD |
128 | break; |
129 | ||
130 | case CPU_750GX: | |
131 | case CPU_750FX: | |
c21f62d8 SR |
132 | clock = (gd->bus_clk / 10) * |
133 | hid1_fx_multipliers_x_10[get_hid1 () >> 27]; | |
3a473b2a WD |
134 | break; |
135 | ||
136 | case CPU_7450: | |
137 | case CPU_740: | |
138 | case CPU_740P: | |
139 | case CPU_745: | |
140 | case CPU_750CX: | |
141 | case CPU_750: | |
142 | case CPU_750P: | |
143 | case CPU_755: | |
144 | case CPU_7400: | |
145 | case CPU_7410: | |
146 | /* | |
147 | * Make sure division is done before multiplication to prevent 32-bit | |
148 | * arithmetic overflows which will cause a negative number | |
149 | */ | |
ee311214 | 150 | clock = (gd->bus_clk / 10) * |
151 | hid1_multipliers_x_10[get_hid1 () >> 28]; | |
3a473b2a WD |
152 | break; |
153 | ||
154 | case CPU_UNKNOWN: | |
155 | printf ("get_gclk_freq(): unknown CPU type\n"); | |
156 | clock = 0; | |
157 | return (1); | |
158 | } | |
159 | ||
4a9cbbe8 | 160 | gd->cpu_clk = clock; |
4a9cbbe8 WD |
161 | |
162 | return (0); | |
163 | } | |
164 | ||
165 | /* ------------------------------------------------------------------------- */ |