projects / thirdparty / u-boot.git / blame
| Commit | Line | Data |
|---|---|---|
| 132ba5fd WD |
1 | /* |
| 2 | * (C) Copyright 2004 | |
| 3 | * Pierre AUBERT, Staubli Faverges, <p.aubert@staubli.com> | |
| 4 | * | |
| 1a459660 | 5 | * SPDX-License-Identifier: GPL-2.0+ |
| 132ba5fd WD |
6 | * |
| 7 | * Init is derived from Linux code. | |
| 8 | */ | |
| 9 | #include <common.h> | |
| 10 | ||
| fc843a02 | 11 | #if defined(CONFIG_IDE) |
| 132ba5fd WD |
12 | #include <mpc5xxx.h> |
| 13 | ||
| d87080b7 WD |
14 | DECLARE_GLOBAL_DATA_PTR; |
| 15 | ||
| 132ba5fd WD |
16 | #define CALC_TIMING(t) (t + period - 1) / period |
| 17 | ||
| c3f9d493 WD |
18 | #ifdef CONFIG_IDE_RESET |
| 19 | extern void init_ide_reset (void); | |
| 20 | #endif | |
| 132ba5fd WD |
21 | |
| 22 | int ide_preinit (void) | |
| 23 | { | |
| 132ba5fd WD |
24 | long period, t0, t1, t2_8, t2_16, t4, ta; |
| 25 | vu_long reg; | |
| 26 | struct mpc5xxx_sdma *psdma = (struct mpc5xxx_sdma *) MPC5XXX_SDMA; | |
| 27 | ||
| 28 | reg = *(vu_long *) MPC5XXX_GPS_PORT_CONFIG; | |
| 6a397ef0 | 29 | #if defined(CONFIG_SYS_ATA_CS_ON_I2C2) |
| 6c7a1408 WD |
30 | /* ATA cs0/1 on i2c2 clk/io */ |
| 31 | reg = (reg & ~0x03000000ul) | 0x02000000ul; | |
| c9969947 JS |
32 | #elif defined(CONFIG_SYS_ATA_CS_ON_TIMER01) |
| 33 | /* ATA cs0/1 on Timer 0/1 */ | |
| 34 | reg = (reg & ~0x03000000ul) | 0x03000000ul; | |
| 6c7a1408 WD |
35 | #else |
| 36 | /* ATA cs0/1 on Local Plus cs4/5 */ | |
| 132ba5fd | 37 | reg = (reg & ~0x03000000ul) | 0x01000000ul; |
| 6c7a1408 | 38 | #endif /* CONFIG_TOTAL5200 */ |
| 132ba5fd WD |
39 | *(vu_long *) MPC5XXX_GPS_PORT_CONFIG = reg; |
| 40 | ||
| 41 | /* All sample codes do that... */ | |
| 42 | *(vu_long *) MPC5XXX_ATA_SHARE_COUNT = 0; | |
| 43 | ||
| 44 | /* Configure and reset host */ | |
| 45 | *(vu_long *) MPC5XXX_ATA_HOST_CONFIG = MPC5xxx_ATA_HOSTCONF_IORDY | | |
| 46 | MPC5xxx_ATA_HOSTCONF_SMR | MPC5xxx_ATA_HOSTCONF_FR; | |
| 47 | udelay (10); | |
| 48 | *(vu_long *) MPC5XXX_ATA_HOST_CONFIG = MPC5xxx_ATA_HOSTCONF_IORDY; | |
| 49 | ||
| 50 | /* Disable prefetch on Commbus */ | |
| 51 | psdma->PtdCntrl |= 1; | |
| 52 | ||
| 53 | /* Init timings : we use PIO mode 0 timings */ | |
| b2877496 | 54 | period = 1000000000 / gd->arch.ipb_clk; /* period in ns */ |
| 132ba5fd WD |
55 | |
| 56 | t0 = CALC_TIMING (600); | |
| 57 | t2_8 = CALC_TIMING (290); | |
| 58 | t2_16 = CALC_TIMING (165); | |
| 59 | reg = (t0 << 24) | (t2_8 << 16) | (t2_16 << 8); | |
| 60 | *(vu_long *) MPC5XXX_ATA_PIO1 = reg; | |
| 61 | ||
| 62 | t4 = CALC_TIMING (30); | |
| 63 | t1 = CALC_TIMING (70); | |
| 64 | ta = CALC_TIMING (35); | |
| 65 | reg = (t4 << 24) | (t1 << 16) | (ta << 8); | |
| 66 | ||
| 67 | *(vu_long *) MPC5XXX_ATA_PIO2 = reg; | |
| 68 | ||
| c3f9d493 | 69 | #ifdef CONFIG_IDE_RESET |
| 42dfe7a1 | 70 | init_ide_reset (); |
| c3f9d493 | 71 | #endif /* CONFIG_IDE_RESET */ |
| 132ba5fd WD |
72 | |
| 73 | return (0); | |
| 74 | } | |
| 068b60a0 | 75 | #endif |