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983fda83 WD |
1 | /* |
2 | * (C) Copyright 2004, Freescale, Inc | |
3 | * TsiChung Liew, Tsi-Chung.Liew@freescale.com. | |
4 | * | |
5 | * See file CREDITS for list of people who contributed to this | |
6 | * project. | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or | |
9 | * modify it under the terms of the GNU General Public License as | |
10 | * published by the Free Software Foundation; either version 2 of | |
11 | * the License, or (at your option) any later version. | |
12 | * | |
13 | * This program is distributed in the hope that it will be useful, | |
14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | * GNU General Public License for more details. | |
17 | * | |
18 | * You should have received a copy of the GNU General Public License | |
19 | * along with this program; if not, write to the Free Software | |
20 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, | |
21 | * MA 02111-1307 USA | |
22 | */ | |
23 | ||
24 | #include <common.h> | |
25 | ||
d87080b7 WD |
26 | DECLARE_GLOBAL_DATA_PTR; |
27 | ||
983fda83 WD |
28 | #ifdef CONFIG_HARD_I2C |
29 | ||
30 | #include <mpc8220.h> | |
31 | #include <i2c.h> | |
32 | ||
33 | typedef struct mpc8220_i2c { | |
34 | volatile u32 adr; /* I2Cn + 0x00 */ | |
35 | volatile u32 fdr; /* I2Cn + 0x04 */ | |
36 | volatile u32 cr; /* I2Cn + 0x08 */ | |
37 | volatile u32 sr; /* I2Cn + 0x0C */ | |
38 | volatile u32 dr; /* I2Cn + 0x10 */ | |
39 | } i2c_t; | |
40 | ||
41 | /* I2Cn control register bits */ | |
42 | #define I2C_EN 0x80 | |
43 | #define I2C_IEN 0x40 | |
44 | #define I2C_STA 0x20 | |
45 | #define I2C_TX 0x10 | |
46 | #define I2C_TXAK 0x08 | |
47 | #define I2C_RSTA 0x04 | |
48 | #define I2C_INIT_MASK (I2C_EN | I2C_STA | I2C_TX | I2C_RSTA) | |
49 | ||
50 | /* I2Cn status register bits */ | |
51 | #define I2C_CF 0x80 | |
52 | #define I2C_AAS 0x40 | |
53 | #define I2C_BB 0x20 | |
54 | #define I2C_AL 0x10 | |
55 | #define I2C_SRW 0x04 | |
56 | #define I2C_IF 0x02 | |
57 | #define I2C_RXAK 0x01 | |
58 | ||
59 | #define I2C_TIMEOUT 100 | |
60 | #define I2C_RETRIES 1 | |
61 | ||
62 | struct mpc8220_i2c_tap { | |
63 | int scl2tap; | |
64 | int tap2tap; | |
65 | }; | |
66 | ||
67 | static int mpc_reg_in (volatile u32 * reg); | |
68 | static void mpc_reg_out (volatile u32 * reg, int val, int mask); | |
69 | static int wait_for_bb (void); | |
70 | static int wait_for_pin (int *status); | |
71 | static int do_address (uchar chip, char rdwr_flag); | |
72 | static int send_bytes (uchar chip, char *buf, int len); | |
73 | static int receive_bytes (uchar chip, char *buf, int len); | |
74 | static int mpc_get_fdr (int); | |
75 | ||
76 | static int mpc_reg_in (volatile u32 * reg) | |
77 | { | |
77ddac94 WD |
78 | int ret; |
79 | ret = *reg >> 24; | |
983fda83 | 80 | __asm__ __volatile__ ("eieio"); |
77ddac94 | 81 | return ret; |
983fda83 WD |
82 | } |
83 | ||
84 | static void mpc_reg_out (volatile u32 * reg, int val, int mask) | |
85 | { | |
86 | int tmp; | |
87 | ||
88 | if (!mask) { | |
89 | *reg = val << 24; | |
90 | } else { | |
91 | tmp = mpc_reg_in (reg); | |
92 | *reg = ((tmp & ~mask) | (val & mask)) << 24; | |
93 | } | |
94 | __asm__ __volatile__ ("eieio"); | |
95 | ||
96 | return; | |
97 | } | |
98 | ||
99 | static int wait_for_bb (void) | |
100 | { | |
101 | i2c_t *regs = (i2c_t *) MMAP_I2C; | |
102 | int timeout = I2C_TIMEOUT; | |
103 | int status; | |
104 | ||
105 | status = mpc_reg_in (®s->sr); | |
106 | ||
107 | while (timeout-- && (status & I2C_BB)) { | |
108 | #if 1 | |
109 | volatile int temp; | |
110 | ||
111 | mpc_reg_out (®s->cr, I2C_STA, I2C_STA); | |
112 | temp = mpc_reg_in (®s->dr); | |
113 | mpc_reg_out (®s->cr, 0, I2C_STA); | |
114 | mpc_reg_out (®s->cr, 0, 0); | |
115 | mpc_reg_out (®s->cr, I2C_EN, 0); | |
116 | #endif | |
117 | udelay (1000); | |
118 | status = mpc_reg_in (®s->sr); | |
119 | } | |
120 | ||
121 | return (status & I2C_BB); | |
122 | } | |
123 | ||
124 | static int wait_for_pin (int *status) | |
125 | { | |
126 | i2c_t *regs = (i2c_t *) MMAP_I2C; | |
127 | int timeout = I2C_TIMEOUT; | |
128 | ||
129 | *status = mpc_reg_in (®s->sr); | |
130 | ||
131 | while (timeout-- && !(*status & I2C_IF)) { | |
132 | udelay (1000); | |
133 | *status = mpc_reg_in (®s->sr); | |
134 | } | |
135 | ||
136 | if (!(*status & I2C_IF)) { | |
137 | return -1; | |
138 | } | |
139 | ||
140 | mpc_reg_out (®s->sr, 0, I2C_IF); | |
141 | return 0; | |
142 | } | |
143 | ||
144 | static int do_address (uchar chip, char rdwr_flag) | |
145 | { | |
146 | i2c_t *regs = (i2c_t *) MMAP_I2C; | |
147 | int status; | |
148 | ||
149 | chip <<= 1; | |
150 | ||
151 | if (rdwr_flag) | |
152 | chip |= 1; | |
153 | ||
154 | mpc_reg_out (®s->cr, I2C_TX, I2C_TX); | |
155 | mpc_reg_out (®s->dr, chip, 0); | |
156 | ||
157 | if (wait_for_pin (&status)) | |
158 | return -2; | |
159 | if (status & I2C_RXAK) | |
160 | return -3; | |
161 | return 0; | |
162 | } | |
163 | ||
164 | static int send_bytes (uchar chip, char *buf, int len) | |
165 | { | |
166 | i2c_t *regs = (i2c_t *) MMAP_I2C; | |
167 | int wrcount; | |
168 | int status; | |
169 | ||
170 | for (wrcount = 0; wrcount < len; ++wrcount) { | |
171 | ||
172 | mpc_reg_out (®s->dr, buf[wrcount], 0); | |
173 | ||
174 | if (wait_for_pin (&status)) | |
175 | break; | |
176 | ||
177 | if (status & I2C_RXAK) | |
178 | break; | |
179 | ||
180 | } | |
181 | ||
182 | return !(wrcount == len); | |
183 | return 0; | |
184 | } | |
185 | ||
186 | static int receive_bytes (uchar chip, char *buf, int len) | |
187 | { | |
188 | i2c_t *regs = (i2c_t *) MMAP_I2C; | |
189 | int dummy = 1; | |
190 | int rdcount = 0; | |
191 | int status; | |
192 | int i; | |
193 | ||
194 | mpc_reg_out (®s->cr, 0, I2C_TX); | |
195 | ||
196 | for (i = 0; i < len; ++i) { | |
197 | buf[rdcount] = mpc_reg_in (®s->dr); | |
198 | ||
199 | if (dummy) | |
200 | dummy = 0; | |
201 | else | |
202 | rdcount++; | |
203 | ||
204 | if (wait_for_pin (&status)) | |
205 | return -4; | |
206 | } | |
207 | ||
208 | mpc_reg_out (®s->cr, I2C_TXAK, I2C_TXAK); | |
209 | buf[rdcount++] = mpc_reg_in (®s->dr); | |
210 | ||
211 | if (wait_for_pin (&status)) | |
212 | return -5; | |
213 | ||
214 | mpc_reg_out (®s->cr, 0, I2C_TXAK); | |
215 | return 0; | |
216 | } | |
217 | ||
218 | /**************** I2C API ****************/ | |
219 | ||
220 | void i2c_init (int speed, int saddr) | |
221 | { | |
222 | i2c_t *regs = (i2c_t *) MMAP_I2C; | |
223 | ||
224 | mpc_reg_out (®s->cr, 0, 0); | |
225 | mpc_reg_out (®s->adr, saddr << 1, 0); | |
226 | ||
227 | /* Set clock | |
228 | */ | |
229 | mpc_reg_out (®s->fdr, mpc_get_fdr (speed), 0); | |
230 | ||
231 | /* Enable module | |
232 | */ | |
233 | mpc_reg_out (®s->cr, I2C_EN, I2C_INIT_MASK); | |
234 | mpc_reg_out (®s->sr, 0, I2C_IF); | |
235 | return; | |
236 | } | |
237 | ||
238 | static int mpc_get_fdr (int speed) | |
239 | { | |
983fda83 WD |
240 | static int fdr = -1; |
241 | ||
242 | if (fdr == -1) { | |
243 | ulong best_speed = 0; | |
244 | ulong divider; | |
245 | ulong ipb, scl; | |
246 | ulong bestmatch = 0xffffffffUL; | |
247 | int best_i = 0, best_j = 0, i, j; | |
248 | int SCL_Tap[] = { 9, 10, 12, 15, 5, 6, 7, 8 }; | |
249 | struct mpc8220_i2c_tap scltap[] = { | |
250 | {4, 1}, | |
251 | {4, 2}, | |
252 | {6, 4}, | |
253 | {6, 8}, | |
254 | {14, 16}, | |
255 | {30, 32}, | |
256 | {62, 64}, | |
257 | {126, 128} | |
258 | }; | |
259 | ||
260 | ipb = gd->bus_clk; | |
261 | for (i = 7; i >= 0; i--) { | |
262 | for (j = 7; j >= 0; j--) { | |
263 | scl = 2 * (scltap[j].scl2tap + | |
264 | (SCL_Tap[i] - | |
265 | 1) * scltap[j].tap2tap + 2); | |
266 | if (ipb <= speed * scl) { | |
267 | if ((speed * scl - ipb) < bestmatch) { | |
268 | bestmatch = speed * scl - ipb; | |
269 | best_i = i; | |
270 | best_j = j; | |
271 | best_speed = ipb / scl; | |
272 | } | |
273 | } | |
274 | } | |
275 | } | |
276 | divider = (best_i & 3) | ((best_i & 4) << 3) | (best_j << 2); | |
277 | if (gd->flags & GD_FLG_RELOC) { | |
278 | fdr = divider; | |
279 | } else { | |
280 | printf ("%ld kHz, ", best_speed / 1000); | |
281 | return divider; | |
282 | } | |
283 | } | |
284 | ||
285 | return fdr; | |
286 | } | |
287 | ||
288 | int i2c_probe (uchar chip) | |
289 | { | |
290 | i2c_t *regs = (i2c_t *) MMAP_I2C; | |
291 | int i; | |
292 | ||
293 | for (i = 0; i < I2C_RETRIES; i++) { | |
294 | mpc_reg_out (®s->cr, I2C_STA, I2C_STA); | |
295 | ||
296 | if (!do_address (chip, 0)) { | |
297 | mpc_reg_out (®s->cr, 0, I2C_STA); | |
298 | break; | |
299 | } | |
300 | ||
301 | mpc_reg_out (®s->cr, 0, I2C_STA); | |
302 | udelay (50); | |
303 | } | |
304 | ||
305 | return (i == I2C_RETRIES); | |
306 | } | |
307 | ||
308 | int i2c_read (uchar chip, uint addr, int alen, uchar * buf, int len) | |
309 | { | |
310 | uchar xaddr[4]; | |
311 | i2c_t *regs = (i2c_t *) MMAP_I2C; | |
312 | int ret = -1; | |
313 | ||
314 | xaddr[0] = (addr >> 24) & 0xFF; | |
315 | xaddr[1] = (addr >> 16) & 0xFF; | |
316 | xaddr[2] = (addr >> 8) & 0xFF; | |
317 | xaddr[3] = addr & 0xFF; | |
318 | ||
319 | if (wait_for_bb ()) { | |
320 | printf ("i2c_read: bus is busy\n"); | |
321 | goto Done; | |
322 | } | |
323 | ||
324 | mpc_reg_out (®s->cr, I2C_STA, I2C_STA); | |
325 | if (do_address (chip, 0)) { | |
326 | printf ("i2c_read: failed to address chip\n"); | |
327 | goto Done; | |
328 | } | |
329 | ||
77ddac94 | 330 | if (send_bytes (chip, (char *)&xaddr[4 - alen], alen)) { |
983fda83 WD |
331 | printf ("i2c_read: send_bytes failed\n"); |
332 | goto Done; | |
333 | } | |
334 | ||
335 | mpc_reg_out (®s->cr, I2C_RSTA, I2C_RSTA); | |
336 | if (do_address (chip, 1)) { | |
337 | printf ("i2c_read: failed to address chip\n"); | |
338 | goto Done; | |
339 | } | |
340 | ||
77ddac94 | 341 | if (receive_bytes (chip, (char *)buf, len)) { |
983fda83 WD |
342 | printf ("i2c_read: receive_bytes failed\n"); |
343 | goto Done; | |
344 | } | |
345 | ||
346 | ret = 0; | |
347 | Done: | |
348 | mpc_reg_out (®s->cr, 0, I2C_STA); | |
349 | return ret; | |
350 | } | |
351 | ||
352 | int i2c_write (uchar chip, uint addr, int alen, uchar * buf, int len) | |
353 | { | |
354 | uchar xaddr[4]; | |
355 | i2c_t *regs = (i2c_t *) MMAP_I2C; | |
356 | int ret = -1; | |
357 | ||
358 | xaddr[0] = (addr >> 24) & 0xFF; | |
359 | xaddr[1] = (addr >> 16) & 0xFF; | |
360 | xaddr[2] = (addr >> 8) & 0xFF; | |
361 | xaddr[3] = addr & 0xFF; | |
362 | ||
363 | if (wait_for_bb ()) { | |
364 | printf ("i2c_write: bus is busy\n"); | |
365 | goto Done; | |
366 | } | |
367 | ||
368 | mpc_reg_out (®s->cr, I2C_STA, I2C_STA); | |
369 | if (do_address (chip, 0)) { | |
370 | printf ("i2c_write: failed to address chip\n"); | |
371 | goto Done; | |
372 | } | |
373 | ||
77ddac94 | 374 | if (send_bytes (chip, (char *)&xaddr[4 - alen], alen)) { |
983fda83 WD |
375 | printf ("i2c_write: send_bytes failed\n"); |
376 | goto Done; | |
377 | } | |
378 | ||
77ddac94 | 379 | if (send_bytes (chip, (char *)buf, len)) { |
983fda83 WD |
380 | printf ("i2c_write: send_bytes failed\n"); |
381 | goto Done; | |
382 | } | |
383 | ||
384 | ret = 0; | |
385 | Done: | |
386 | mpc_reg_out (®s->cr, 0, I2C_STA); | |
387 | return ret; | |
388 | } | |
389 | ||
983fda83 | 390 | #endif /* CONFIG_HARD_I2C */ |