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121cb96d | 1 | /* |
a47a12be | 2 | * This file is based on "arch/powerpc/8260_io/commproc.c" - here is it's |
121cb96d WD |
3 | * copyright notice: |
4 | * | |
5 | * General Purpose functions for the global management of the | |
6 | * 8260 Communication Processor Module. | |
7 | * Copyright (c) 1999 Dan Malek (dmalek@jlc.net) | |
8 | * Copyright (c) 2000 MontaVista Software, Inc (source@mvista.com) | |
9 | * 2.3.99 Updates | |
10 | * | |
11 | * In addition to the individual control of the communication | |
12 | * channels, there are a few functions that globally affect the | |
13 | * communication processor. | |
14 | * | |
15 | * Buffer descriptors must be allocated from the dual ported memory | |
16 | * space. The allocator for that is here. When the communication | |
17 | * process is reset, we reclaim the memory available. There is | |
18 | * currently no deallocator for this memory. | |
19 | */ | |
20 | #include <common.h> | |
21 | #include <asm/cpm_8260.h> | |
22 | ||
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23 | DECLARE_GLOBAL_DATA_PTR; |
24 | ||
121cb96d WD |
25 | void |
26 | m8260_cpm_reset(void) | |
27 | { | |
6d0f6bcf | 28 | volatile immap_t *immr = (immap_t *)CONFIG_SYS_IMMR; |
121cb96d WD |
29 | volatile ulong count; |
30 | ||
31 | /* Reclaim the DP memory for our use. | |
32 | */ | |
33 | gd->dp_alloc_base = CPM_DATAONLY_BASE; | |
34 | gd->dp_alloc_top = gd->dp_alloc_base + CPM_DATAONLY_SIZE; | |
35 | ||
36 | /* | |
37 | * Reset CPM | |
38 | */ | |
39 | immr->im_cpm.cp_cpcr = CPM_CR_RST; | |
40 | count = 0; | |
41 | do { /* Spin until command processed */ | |
42 | __asm__ __volatile__ ("eieio"); | |
43 | } while ((immr->im_cpm.cp_cpcr & CPM_CR_FLG) && ++count < 1000000); | |
44 | ||
45 | #ifdef CONFIG_HARD_I2C | |
46 | *((unsigned short*)(&immr->im_dprambase[PROFF_I2C_BASE])) = 0; | |
47 | #endif | |
48 | } | |
49 | ||
50 | /* Allocate some memory from the dual ported ram. | |
51 | * To help protocols with object alignment restrictions, we do that | |
52 | * if they ask. | |
53 | */ | |
54 | uint | |
55 | m8260_cpm_dpalloc(uint size, uint align) | |
56 | { | |
6d0f6bcf | 57 | volatile immap_t *immr = (immap_t *)CONFIG_SYS_IMMR; |
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58 | uint retloc; |
59 | uint align_mask, off; | |
60 | uint savebase; | |
61 | ||
62 | align_mask = align - 1; | |
63 | savebase = gd->dp_alloc_base; | |
64 | ||
65 | if ((off = (gd->dp_alloc_base & align_mask)) != 0) | |
66 | gd->dp_alloc_base += (align - off); | |
67 | ||
68 | if ((off = size & align_mask) != 0) | |
69 | size += align - off; | |
70 | ||
71 | if ((gd->dp_alloc_base + size) >= gd->dp_alloc_top) { | |
72 | gd->dp_alloc_base = savebase; | |
73 | panic("m8260_cpm_dpalloc: ran out of dual port ram!"); | |
74 | } | |
75 | ||
76 | retloc = gd->dp_alloc_base; | |
77 | gd->dp_alloc_base += size; | |
78 | ||
79 | memset((void *)&immr->im_dprambase[retloc], 0, size); | |
80 | ||
81 | return(retloc); | |
82 | } | |
83 | ||
84 | /* We also own one page of host buffer space for the allocation of | |
85 | * UART "fifos" and the like. | |
86 | */ | |
87 | uint | |
88 | m8260_cpm_hostalloc(uint size, uint align) | |
89 | { | |
90 | /* the host might not even have RAM yet - just use dual port RAM */ | |
91 | return (m8260_cpm_dpalloc(size, align)); | |
92 | } | |
93 | ||
94 | /* Set a baud rate generator. This needs lots of work. There are | |
95 | * eight BRGs, which can be connected to the CPM channels or output | |
96 | * as clocks. The BRGs are in two different block of internal | |
97 | * memory mapped space. | |
98 | * The baud rate clock is the system clock divided by something. | |
99 | * It was set up long ago during the initial boot phase and is | |
100 | * is given to us. | |
101 | * Baud rate clocks are zero-based in the driver code (as that maps | |
102 | * to port numbers). Documentation uses 1-based numbering. | |
103 | */ | |
104 | #define BRG_INT_CLK gd->brg_clk | |
8564acf9 | 105 | #define BRG_UART_CLK (BRG_INT_CLK / 16) |
121cb96d | 106 | |
8564acf9 | 107 | /* This function is used by UARTs, or anything else that uses a 16x |
121cb96d WD |
108 | * oversampled clock. |
109 | */ | |
110 | void | |
111 | m8260_cpm_setbrg(uint brg, uint rate) | |
112 | { | |
6d0f6bcf | 113 | volatile immap_t *immr = (immap_t *)CONFIG_SYS_IMMR; |
121cb96d | 114 | volatile uint *bp; |
8564acf9 | 115 | uint cd = BRG_UART_CLK / rate; |
121cb96d | 116 | |
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117 | if ((BRG_UART_CLK % rate) < (rate / 2)) |
118 | cd--; | |
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119 | if (brg < 4) { |
120 | bp = (uint *)&immr->im_brgc1; | |
121 | } | |
122 | else { | |
123 | bp = (uint *)&immr->im_brgc5; | |
124 | brg -= 4; | |
125 | } | |
126 | bp += brg; | |
8564acf9 | 127 | *bp = (cd << 1) | CPM_BRG_EN; |
121cb96d WD |
128 | } |
129 | ||
130 | /* This function is used to set high speed synchronous baud rate | |
131 | * clocks. | |
132 | */ | |
133 | void | |
134 | m8260_cpm_fastbrg(uint brg, uint rate, int div16) | |
135 | { | |
6d0f6bcf | 136 | volatile immap_t *immr = (immap_t *)CONFIG_SYS_IMMR; |
121cb96d WD |
137 | volatile uint *bp; |
138 | ||
139 | /* This is good enough to get SMCs running..... | |
140 | */ | |
141 | if (brg < 4) { | |
142 | bp = (uint *)&immr->im_brgc1; | |
143 | } | |
144 | else { | |
145 | bp = (uint *)&immr->im_brgc5; | |
146 | brg -= 4; | |
147 | } | |
148 | bp += brg; | |
149 | *bp = (((((BRG_INT_CLK+rate-1)/rate)-1)&0xfff)<<1)|CPM_BRG_EN; | |
150 | if (div16) | |
151 | *bp |= CPM_BRG_DIV16; | |
152 | } | |
153 | ||
154 | /* This function is used to set baud rate generators using an external | |
155 | * clock source and 16x oversampling. | |
156 | */ | |
157 | ||
158 | void | |
159 | m8260_cpm_extcbrg(uint brg, uint rate, uint extclk, int pinsel) | |
160 | { | |
6d0f6bcf | 161 | volatile immap_t *immr = (immap_t *)CONFIG_SYS_IMMR; |
121cb96d WD |
162 | volatile uint *bp; |
163 | ||
164 | if (brg < 4) { | |
165 | bp = (uint *)&immr->im_brgc1; | |
166 | } | |
167 | else { | |
168 | bp = (uint *)&immr->im_brgc5; | |
169 | brg -= 4; | |
170 | } | |
171 | bp += brg; | |
172 | *bp = ((((((extclk/16)+rate-1)/rate)-1)&0xfff)<<1)|CPM_BRG_EN; | |
173 | if (pinsel == 0) | |
174 | *bp |= CPM_BRG_EXTC_CLK3_9; | |
175 | else | |
176 | *bp |= CPM_BRG_EXTC_CLK5_15; | |
177 | } | |
178 | ||
d1cbe85b | 179 | #if defined(CONFIG_POST) || defined(CONFIG_LOGBUFFER) |
121cb96d WD |
180 | |
181 | void post_word_store (ulong a) | |
182 | { | |
183 | volatile ulong *save_addr = | |
6d0f6bcf | 184 | (volatile ulong *)(CONFIG_SYS_IMMR + CPM_POST_WORD_ADDR); |
121cb96d WD |
185 | |
186 | *save_addr = a; | |
187 | } | |
188 | ||
189 | ulong post_word_load (void) | |
190 | { | |
191 | volatile ulong *save_addr = | |
6d0f6bcf | 192 | (volatile ulong *)(CONFIG_SYS_IMMR + CPM_POST_WORD_ADDR); |
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193 | |
194 | return *save_addr; | |
195 | } | |
196 | ||
d1cbe85b | 197 | #endif /* CONFIG_POST || CONFIG_LOGBUFFER*/ |
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198 | |
199 | #ifdef CONFIG_BOOTCOUNT_LIMIT | |
200 | ||
201 | void bootcount_store (ulong a) | |
202 | { | |
203 | volatile ulong *save_addr = | |
6d0f6bcf | 204 | (volatile ulong *)(CONFIG_SYS_IMMR + CPM_BOOTCOUNT_ADDR); |
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205 | |
206 | save_addr[0] = a; | |
207 | save_addr[1] = BOOTCOUNT_MAGIC; | |
208 | } | |
209 | ||
210 | ulong bootcount_load (void) | |
211 | { | |
212 | volatile ulong *save_addr = | |
6d0f6bcf | 213 | (volatile ulong *)(CONFIG_SYS_IMMR + CPM_BOOTCOUNT_ADDR); |
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214 | |
215 | if (save_addr[1] != BOOTCOUNT_MAGIC) | |
216 | return 0; | |
217 | else | |
218 | return save_addr[0]; | |
219 | } | |
220 | ||
221 | #endif /* CONFIG_BOOTCOUNT_LIMIT */ |