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42d1f039 | 1 | # |
f9328639 MB |
2 | # (C) Copyright 2006 |
3 | # Wolfgang Denk, DENX Software Engineering, wd@denx.de. | |
4 | # | |
42d1f039 WD |
5 | # (C) Copyright 2002,2003 Motorola Inc. |
6 | # Xianghua Xiao,X.Xiao@motorola.com | |
7 | # | |
1a459660 | 8 | # SPDX-License-Identifier: GPL-2.0+ |
42d1f039 WD |
9 | # |
10 | ||
11 | include $(TOPDIR)/config.mk | |
12 | ||
6d8962e8 | 13 | LIB = $(obj)lib$(CPU).o |
42d1f039 | 14 | |
4b919725 SW |
15 | MINIMAL= |
16 | ||
17 | ifdef CONFIG_SPL_BUILD | |
18 | ifdef CONFIG_SPL_INIT_MINIMAL | |
19 | MINIMAL=y | |
20 | endif | |
21 | endif | |
22 | ||
23 | START = start.o resetvec.o | |
24 | ||
25 | ifdef MINIMAL | |
26 | ||
27 | COBJS-y += cpu_init_early.o tlb.o spl_minimal.o | |
28 | ||
29 | else | |
30 | ||
5052a771 | 31 | SOBJS-$(CONFIG_MP) += release.o |
ec2b74ff | 32 | SOBJS = $(SOBJS-y) |
5052a771 | 33 | |
79ee3448 | 34 | COBJS-$(CONFIG_CMD_ERRATA) += cmd_errata.o |
5052a771 | 35 | COBJS-$(CONFIG_CPM2) += commproc.o |
58e5e9af | 36 | |
2a6c2d7a | 37 | # supports ddr1 |
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38 | COBJS-$(CONFIG_MPC8540) += ddr-gen1.o |
39 | COBJS-$(CONFIG_MPC8560) += ddr-gen1.o | |
40 | COBJS-$(CONFIG_MPC8541) += ddr-gen1.o | |
41 | COBJS-$(CONFIG_MPC8555) += ddr-gen1.o | |
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42 | |
43 | # supports ddr1/2 | |
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44 | COBJS-$(CONFIG_MPC8548) += ddr-gen2.o |
45 | COBJS-$(CONFIG_MPC8568) += ddr-gen2.o | |
46 | COBJS-$(CONFIG_MPC8544) += ddr-gen2.o | |
47 | ||
48 | # supports ddr1/2/3 | |
49 | COBJS-$(CONFIG_MPC8572) += ddr-gen3.o | |
50 | COBJS-$(CONFIG_MPC8536) += ddr-gen3.o | |
22b6dbc1 | 51 | COBJS-$(CONFIG_MPC8569) += ddr-gen3.o |
b8cdd014 | 52 | COBJS-$(CONFIG_P1010) += ddr-gen3.o |
a713ba92 | 53 | COBJS-$(CONFIG_P1011) += ddr-gen3.o |
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54 | COBJS-$(CONFIG_P1012) += ddr-gen3.o |
55 | COBJS-$(CONFIG_P1013) += ddr-gen3.o | |
b5debec5 | 56 | COBJS-$(CONFIG_P1014) += ddr-gen3.o |
87c7661b | 57 | COBJS-$(CONFIG_P1020) += ddr-gen3.o |
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58 | COBJS-$(CONFIG_P1021) += ddr-gen3.o |
59 | COBJS-$(CONFIG_P1022) += ddr-gen3.o | |
57072338 | 60 | COBJS-$(CONFIG_P1023) += ddr-gen3.o |
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61 | COBJS-$(CONFIG_P1024) += ddr-gen3.o |
62 | COBJS-$(CONFIG_P1025) += ddr-gen3.o | |
a713ba92 PA |
63 | COBJS-$(CONFIG_P2010) += ddr-gen3.o |
64 | COBJS-$(CONFIG_P2020) += ddr-gen3.o | |
1f97987a | 65 | COBJS-$(CONFIG_PPC_P2041) += ddr-gen3.o |
c26de2d8 | 66 | COBJS-$(CONFIG_PPC_P3041) += ddr-gen3.o |
7e4259bb | 67 | COBJS-$(CONFIG_PPC_P4080) += ddr-gen3.o |
19dbcc96 | 68 | COBJS-$(CONFIG_PPC_P5020) += ddr-gen3.o |
4905443f | 69 | COBJS-$(CONFIG_PPC_P5040) += ddr-gen3.o |
9e758758 | 70 | COBJS-$(CONFIG_PPC_T4240) += ddr-gen3.o |
b6240846 | 71 | COBJS-$(CONFIG_PPC_T4160) += ddr-gen3.o |
e1dbdd81 | 72 | COBJS-$(CONFIG_PPC_B4420) += ddr-gen3.o |
d2404141 | 73 | COBJS-$(CONFIG_PPC_B4860) += ddr-gen3.o |
19a8dbdc | 74 | COBJS-$(CONFIG_BSC9131) += ddr-gen3.o |
35fe948e | 75 | COBJS-$(CONFIG_BSC9132) += ddr-gen3.o |
5f208d11 | 76 | COBJS-$(CONFIG_PPC_T1040) += ddr-gen3.o |
58e5e9af | 77 | |
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78 | COBJS-$(CONFIG_CPM2) += ether_fcc.o |
79 | COBJS-$(CONFIG_OF_LIBFDT) += fdt.o | |
db977abf | 80 | COBJS-$(CONFIG_FSL_CORENET) += liodn.o |
5052a771 | 81 | COBJS-$(CONFIG_MP) += mp.o |
5052a771 | 82 | COBJS-$(CONFIG_PCI) += pci.o |
24995d82 | 83 | COBJS-$(CONFIG_SYS_DPAA_QBMAN) += portals.o |
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84 | |
85 | # various SoC specific assignments | |
88b91f2d | 86 | COBJS-$(CONFIG_PPC_P2041) += p2041_ids.o |
d5d2cd43 | 87 | COBJS-$(CONFIG_PPC_P3041) += p3041_ids.o |
db977abf | 88 | COBJS-$(CONFIG_PPC_P4080) += p4080_ids.o |
1eda59ff | 89 | COBJS-$(CONFIG_PPC_P5020) += p5020_ids.o |
4905443f | 90 | COBJS-$(CONFIG_PPC_P5040) += p5040_ids.o |
9e758758 | 91 | COBJS-$(CONFIG_PPC_T4240) += t4240_ids.o |
b6240846 | 92 | COBJS-$(CONFIG_PPC_T4160) += t4240_ids.o |
e1dbdd81 | 93 | COBJS-$(CONFIG_PPC_B4420) += b4860_ids.o |
d2404141 | 94 | COBJS-$(CONFIG_PPC_B4860) += b4860_ids.o |
5f208d11 | 95 | COBJS-$(CONFIG_PPC_T1040) += t1040_ids.o |
db977abf | 96 | |
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97 | COBJS-$(CONFIG_QE) += qe_io.o |
98 | COBJS-$(CONFIG_CPM2) += serial_scc.o | |
d1001e3f YS |
99 | COBJS-$(CONFIG_SYS_FSL_QORIQ_CHASSIS1) += fsl_corenet_serdes.o |
100 | COBJS-$(CONFIG_SYS_FSL_QORIQ_CHASSIS2) += fsl_corenet2_serdes.o | |
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101 | |
102 | # SoC specific SERDES support | |
103 | COBJS-$(CONFIG_MPC8536) += mpc8536_serdes.o | |
877a2611 | 104 | COBJS-$(CONFIG_MPC8544) += mpc8544_serdes.o |
bc48d0d5 | 105 | COBJS-$(CONFIG_MPC8548) += mpc8548_serdes.o |
5ba40eec | 106 | COBJS-$(CONFIG_MPC8568) += mpc8568_serdes.o |
47567c26 | 107 | COBJS-$(CONFIG_MPC8569) += mpc8569_serdes.o |
af87cab6 | 108 | COBJS-$(CONFIG_MPC8572) += mpc8572_serdes.o |
28747f9b | 109 | COBJS-$(CONFIG_P1010) += p1010_serdes.o |
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110 | COBJS-$(CONFIG_P1011) += p1021_serdes.o |
111 | COBJS-$(CONFIG_P1012) += p1021_serdes.o | |
04a641df | 112 | COBJS-$(CONFIG_P1013) += p1022_serdes.o |
28747f9b | 113 | COBJS-$(CONFIG_P1014) += p1010_serdes.o |
67a719da | 114 | COBJS-$(CONFIG_P1017) += p1023_serdes.o |
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115 | COBJS-$(CONFIG_P1020) += p1021_serdes.o |
116 | COBJS-$(CONFIG_P1021) += p1021_serdes.o | |
c5780a6f | 117 | COBJS-$(CONFIG_P1022) += p1022_serdes.o |
67a719da | 118 | COBJS-$(CONFIG_P1023) += p1023_serdes.o |
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119 | COBJS-$(CONFIG_P1024) += p1021_serdes.o |
120 | COBJS-$(CONFIG_P1025) += p1021_serdes.o | |
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121 | COBJS-$(CONFIG_P2010) += p2020_serdes.o |
122 | COBJS-$(CONFIG_P2020) += p2020_serdes.o | |
1f97987a | 123 | COBJS-$(CONFIG_PPC_P2041) += p2041_serdes.o |
d5d2cd43 | 124 | COBJS-$(CONFIG_PPC_P3041) += p3041_serdes.o |
34a8258f | 125 | COBJS-$(CONFIG_PPC_P4080) += p4080_serdes.o |
1eda59ff | 126 | COBJS-$(CONFIG_PPC_P5020) += p5020_serdes.o |
4905443f | 127 | COBJS-$(CONFIG_PPC_P5040) += p5040_serdes.o |
9e758758 | 128 | COBJS-$(CONFIG_PPC_T4240) += t4240_serdes.o |
b6240846 | 129 | COBJS-$(CONFIG_PPC_T4160) += t4240_serdes.o |
e1dbdd81 | 130 | COBJS-$(CONFIG_PPC_B4420) += b4860_serdes.o |
d2404141 | 131 | COBJS-$(CONFIG_PPC_B4860) += b4860_serdes.o |
35fe948e | 132 | COBJS-$(CONFIG_BSC9132) += bsc9132_serdes.o |
5f208d11 | 133 | COBJS-$(CONFIG_PPC_T1040) += t1040_serdes.o |
5052a771 | 134 | |
a179eb0a SW |
135 | COBJS-y += cpu.o |
136 | COBJS-y += cpu_init.o | |
137 | COBJS-y += cpu_init_early.o | |
138 | COBJS-y += interrupts.o | |
139 | COBJS-y += speed.o | |
140 | COBJS-y += tlb.o | |
141 | COBJS-y += traps.o | |
42d1f039 | 142 | |
25315683 | 143 | # Stub implementations of cache management functions for USB |
a179eb0a SW |
144 | COBJS-y += cache.o |
145 | ||
4b919725 SW |
146 | endif # not minimal |
147 | ||
a179eb0a | 148 | COBJS = $(COBJS-y) |
25315683 | 149 | |
f9328639 MB |
150 | SRCS := $(START:.o=.S) $(SOBJS:.o=.S) $(COBJS:.o=.c) |
151 | OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS)) | |
152 | START := $(addprefix $(obj),$(START)) | |
153 | ||
154 | all: $(obj).depend $(START) $(LIB) | |
42d1f039 WD |
155 | |
156 | $(LIB): $(OBJS) | |
6d8962e8 | 157 | $(call cmd_link_o_target, $(OBJS)) |
42d1f039 WD |
158 | |
159 | ######################################################################### | |
160 | ||
f9328639 MB |
161 | # defines $(obj).depend target |
162 | include $(SRCTREE)/rules.mk | |
42d1f039 | 163 | |
f9328639 | 164 | sinclude $(obj).depend |
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165 | |
166 | ######################################################################### |