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2# (C) Copyright 2006
3# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4#
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5# (C) Copyright 2002,2003 Motorola Inc.
6# Xianghua Xiao,X.Xiao@motorola.com
7#
8# See file CREDITS for list of people who contributed to this
9# project.
10#
11# This program is free software; you can redistribute it and/or
12# modify it under the terms of the GNU General Public License as
13# published by the Free Software Foundation; either version 2 of
14# the License, or (at your option) any later version.
15#
16# This program is distributed in the hope that it will be useful,
17# but WITHOUT ANY WARRANTY; without even the implied warranty of
18# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19# GNU General Public License for more details.
20#
21# You should have received a copy of the GNU General Public License
22# along with this program; if not, write to the Free Software
23# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
24# MA 02111-1307 USA
25#
26
27include $(TOPDIR)/config.mk
28
6d8962e8 29LIB = $(obj)lib$(CPU).o
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30
31START = start.o resetvec.o
5052a771 32SOBJS-$(CONFIG_MP) += release.o
ec2b74ff 33SOBJS = $(SOBJS-y)
5052a771 34
79ee3448 35COBJS-$(CONFIG_CMD_ERRATA) += cmd_errata.o
5052a771 36COBJS-$(CONFIG_CPM2) += commproc.o
58e5e9af 37
2a6c2d7a 38# supports ddr1
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39COBJS-$(CONFIG_MPC8540) += ddr-gen1.o
40COBJS-$(CONFIG_MPC8560) += ddr-gen1.o
41COBJS-$(CONFIG_MPC8541) += ddr-gen1.o
42COBJS-$(CONFIG_MPC8555) += ddr-gen1.o
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43
44# supports ddr1/2
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45COBJS-$(CONFIG_MPC8548) += ddr-gen2.o
46COBJS-$(CONFIG_MPC8568) += ddr-gen2.o
47COBJS-$(CONFIG_MPC8544) += ddr-gen2.o
48
49# supports ddr1/2/3
50COBJS-$(CONFIG_MPC8572) += ddr-gen3.o
51COBJS-$(CONFIG_MPC8536) += ddr-gen3.o
22b6dbc1 52COBJS-$(CONFIG_MPC8569) += ddr-gen3.o
a713ba92 53COBJS-$(CONFIG_P1011) += ddr-gen3.o
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54COBJS-$(CONFIG_P1012) += ddr-gen3.o
55COBJS-$(CONFIG_P1013) += ddr-gen3.o
87c7661b 56COBJS-$(CONFIG_P1020) += ddr-gen3.o
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57COBJS-$(CONFIG_P1021) += ddr-gen3.o
58COBJS-$(CONFIG_P1022) += ddr-gen3.o
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59COBJS-$(CONFIG_P2010) += ddr-gen3.o
60COBJS-$(CONFIG_P2020) += ddr-gen3.o
c26de2d8 61COBJS-$(CONFIG_PPC_P3041) += ddr-gen3.o
7e4259bb 62COBJS-$(CONFIG_PPC_P4080) += ddr-gen3.o
19dbcc96 63COBJS-$(CONFIG_PPC_P5020) += ddr-gen3.o
58e5e9af 64
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65COBJS-$(CONFIG_CPM2) += ether_fcc.o
66COBJS-$(CONFIG_OF_LIBFDT) += fdt.o
db977abf 67COBJS-$(CONFIG_FSL_CORENET) += liodn.o
5052a771 68COBJS-$(CONFIG_MP) += mp.o
ef50d6c0 69COBJS-$(CONFIG_MPC8536) += mpc8536_serdes.o
c59e1b4d 70COBJS-$(CONFIG_P1022) += p1022_serdes.o
5052a771 71COBJS-$(CONFIG_PCI) += pci.o
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72COBJS-$(CONFIG_FSL_CORENET) += portals.o
73
74# various SoC specific assignments
75COBJS-$(CONFIG_PPC_P4080) += p4080_ids.o
76
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77COBJS-$(CONFIG_QE) += qe_io.o
78COBJS-$(CONFIG_CPM2) += serial_scc.o
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79COBJS-$(CONFIG_FSL_CORENET) += fsl_corenet_serdes.o
80COBJS-$(CONFIG_PPC_P4080) += p4080_serdes.o
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81
82COBJS = $(COBJS-y)
83COBJS += cpu.o
84COBJS += cpu_init.o
9f00409a 85COBJS += cpu_init_early.o
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86COBJS += interrupts.o
87COBJS += speed.o
88COBJS += tlb.o
89COBJS += traps.o
42d1f039 90
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91SRCS := $(START:.o=.S) $(SOBJS:.o=.S) $(COBJS:.o=.c)
92OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS))
93START := $(addprefix $(obj),$(START))
94
95all: $(obj).depend $(START) $(LIB)
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96
97$(LIB): $(OBJS)
6d8962e8 98 $(call cmd_link_o_target, $(OBJS))
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99
100#########################################################################
101
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102# defines $(obj).depend target
103include $(SRCTREE)/rules.mk
42d1f039 104
f9328639 105sinclude $(obj).depend
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106
107#########################################################################