[people/ms/u-boot.git] / arch / powerpc / cpu / mpc85xx / Makefile

#
# (C) Copyright 2006
# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
#
# (C) Copyright 2002,2003 Motorola Inc.
# Xianghua Xiao,X.Xiao@motorola.com
#
# SPDX-License-Identifier:	GPL-2.0+
#

MINIMAL=

ifdef CONFIG_SPL_BUILD
ifdef CONFIG_SPL_INIT_MINIMAL
MINIMAL=y
endif
endif

extra-y = start.o resetvec.o

ifdef MINIMAL

obj-y	+= cpu_init_early.o tlb.o spl_minimal.o

else

obj-$(CONFIG_MP)	+= release.o

ifndef CONFIG_SPL_BUILD
obj-$(CONFIG_CMD_ERRATA) += cmd_errata.o
endif
obj-$(CONFIG_CPM2)	+= commproc.o

obj-$(CONFIG_CPM2)	+= ether_fcc.o
obj-$(CONFIG_OF_LIBFDT) += fdt.o
obj-$(CONFIG_FSL_CORENET) += liodn.o
obj-$(CONFIG_MP)	+= mp.o
obj-$(CONFIG_PCI)	+= pci.o
obj-$(CONFIG_SYS_DPAA_QBMAN) += portals.o

# various SoC specific assignments
obj-$(CONFIG_ARCH_P2041) += p2041_ids.o
obj-$(CONFIG_ARCH_P3041) += p3041_ids.o
obj-$(CONFIG_ARCH_P4080) += p4080_ids.o
obj-$(CONFIG_PPC_P5020) += p5020_ids.o
obj-$(CONFIG_PPC_P5040) += p5040_ids.o
obj-$(CONFIG_PPC_T4240) += t4240_ids.o
obj-$(CONFIG_PPC_T4160) += t4240_ids.o
obj-$(CONFIG_PPC_T4080) += t4240_ids.o
obj-$(CONFIG_PPC_B4420) += b4860_ids.o
obj-$(CONFIG_PPC_B4860) += b4860_ids.o
obj-$(CONFIG_PPC_T1040) += t1040_ids.o
obj-$(CONFIG_PPC_T1042)	+= t1040_ids.o
obj-$(CONFIG_PPC_T1020)	+= t1040_ids.o
obj-$(CONFIG_PPC_T1022)	+= t1040_ids.o
obj-$(CONFIG_PPC_T1023) += t1024_ids.o
obj-$(CONFIG_PPC_T1024) += t1024_ids.o
obj-$(CONFIG_PPC_T2080) += t2080_ids.o
obj-$(CONFIG_PPC_T2081) += t2080_ids.o


obj-$(CONFIG_QE)	+= qe_io.o
obj-$(CONFIG_CPM2)	+= serial_scc.o
obj-$(CONFIG_SYS_FSL_QORIQ_CHASSIS1) += fsl_corenet_serdes.o
obj-$(CONFIG_SYS_FSL_QORIQ_CHASSIS2) += fsl_corenet2_serdes.o

# SoC specific SERDES support
obj-$(CONFIG_ARCH_C29X)	+= c29x_serdes.o
obj-$(CONFIG_ARCH_MPC8536) += mpc8536_serdes.o
obj-$(CONFIG_ARCH_MPC8544) += mpc8544_serdes.o
obj-$(CONFIG_ARCH_MPC8548) += mpc8548_serdes.o
obj-$(CONFIG_ARCH_MPC8568) += mpc8568_serdes.o
obj-$(CONFIG_ARCH_MPC8569) += mpc8569_serdes.o
obj-$(CONFIG_ARCH_MPC8572) += mpc8572_serdes.o
obj-$(CONFIG_ARCH_P1010)	+= p1010_serdes.o
obj-$(CONFIG_ARCH_P1011)	+= p1021_serdes.o
obj-$(CONFIG_ARCH_P1020)	+= p1021_serdes.o
obj-$(CONFIG_ARCH_P1021)	+= p1021_serdes.o
obj-$(CONFIG_ARCH_P1022)	+= p1022_serdes.o
obj-$(CONFIG_ARCH_P1023)	+= p1023_serdes.o
obj-$(CONFIG_ARCH_P1024)	+= p1021_serdes.o
obj-$(CONFIG_ARCH_P1025)	+= p1021_serdes.o
obj-$(CONFIG_ARCH_P2020)	+= p2020_serdes.o
obj-$(CONFIG_ARCH_P2041) += p2041_serdes.o
obj-$(CONFIG_ARCH_P3041) += p3041_serdes.o
obj-$(CONFIG_ARCH_P4080) += p4080_serdes.o
obj-$(CONFIG_PPC_P5020) += p5020_serdes.o
obj-$(CONFIG_PPC_P5040) += p5040_serdes.o
obj-$(CONFIG_PPC_T4240) += t4240_serdes.o
obj-$(CONFIG_PPC_T4160) += t4240_serdes.o
obj-$(CONFIG_PPC_T4080) += t4240_serdes.o
obj-$(CONFIG_PPC_B4420) += b4860_serdes.o
obj-$(CONFIG_PPC_B4860) += b4860_serdes.o
obj-$(CONFIG_ARCH_BSC9132) += bsc9132_serdes.o
obj-$(CONFIG_PPC_T1040) += t1040_serdes.o
obj-$(CONFIG_PPC_T1042)	+= t1040_serdes.o
obj-$(CONFIG_PPC_T1020)	+= t1040_serdes.o
obj-$(CONFIG_PPC_T1022)	+= t1040_serdes.o
obj-$(CONFIG_PPC_T1023) += t1024_serdes.o
obj-$(CONFIG_PPC_T1024) += t1024_serdes.o
obj-$(CONFIG_PPC_T2080) += t2080_serdes.o
obj-$(CONFIG_PPC_T2081) += t2080_serdes.o

obj-y	+= cpu.o
obj-y	+= cpu_init.o
obj-y	+= cpu_init_early.o
obj-y	+= interrupts.o
ifneq ($(CONFIG_QEMU_E500),y)
obj-y	+= speed.o
endif
obj-y	+= tlb.o
obj-y	+= traps.o

endif # not minimal
Commit	Line	Data
42d1f039	1	#
f9328639 MB	2	# (C) Copyright 2006
	3	# Wolfgang Denk, DENX Software Engineering, wd@denx.de.
	4	#
42d1f039 WD	5	# (C) Copyright 2002,2003 Motorola Inc.
	6	# Xianghua Xiao,X.Xiao@motorola.com
	7	#
1a459660	8	# SPDX-License-Identifier: GPL-2.0+
42d1f039 WD	9	#
42d1f039 WD	10
4b919725 SW	11	MINIMAL=
	12
	13	ifdef CONFIG_SPL_BUILD
	14	ifdef CONFIG_SPL_INIT_MINIMAL
	15	MINIMAL=y
	16	endif
	17	endif
	18
06c14117	19	extra-y = start.o resetvec.o
4b919725 SW	20
	21	ifdef MINIMAL
	22
06c14117	23	obj-y += cpu_init_early.o tlb.o spl_minimal.o
4b919725 SW	24
	25	else
	26
06c14117	27	obj-$(CONFIG_MP) += release.o
5052a771	28
12c67d75	29	ifndef CONFIG_SPL_BUILD
06c14117	30	obj-$(CONFIG_CMD_ERRATA) += cmd_errata.o
12c67d75	31	endif
06c14117	32	obj-$(CONFIG_CPM2) += commproc.o
58e5e9af	33
06c14117 MY	34	obj-$(CONFIG_CPM2) += ether_fcc.o
	35	obj-$(CONFIG_OF_LIBFDT) += fdt.o
	36	obj-$(CONFIG_FSL_CORENET) += liodn.o
	37	obj-$(CONFIG_MP) += mp.o
	38	obj-$(CONFIG_PCI) += pci.o
	39	obj-$(CONFIG_SYS_DPAA_QBMAN) += portals.o
db977abf KG	40
db977abf KG	41	# various SoC specific assignments
ce040c83	42	obj-$(CONFIG_ARCH_P2041) += p2041_ids.o
5e5fdd2d	43	obj-$(CONFIG_ARCH_P3041) += p3041_ids.o
e71372cb	44	obj-$(CONFIG_ARCH_P4080) += p4080_ids.o
06c14117 MY	45	obj-$(CONFIG_PPC_P5020) += p5020_ids.o
	46	obj-$(CONFIG_PPC_P5040) += p5040_ids.o
	47	obj-$(CONFIG_PPC_T4240) += t4240_ids.o
	48	obj-$(CONFIG_PPC_T4160) += t4240_ids.o
5122dfae	49	obj-$(CONFIG_PPC_T4080) += t4240_ids.o
06c14117 MY	50	obj-$(CONFIG_PPC_B4420) += b4860_ids.o
	51	obj-$(CONFIG_PPC_B4860) += b4860_ids.o
	52	obj-$(CONFIG_PPC_T1040) += t1040_ids.o
2967af68 PJ	53	obj-$(CONFIG_PPC_T1042) += t1040_ids.o
	54	obj-$(CONFIG_PPC_T1020) += t1040_ids.o
	55	obj-$(CONFIG_PPC_T1022) += t1040_ids.o
f6050790 SL	56	obj-$(CONFIG_PPC_T1023) += t1024_ids.o
f6050790 SL	57	obj-$(CONFIG_PPC_T1024) += t1024_ids.o
629d6b32 SL	58	obj-$(CONFIG_PPC_T2080) += t2080_ids.o
629d6b32 SL	59	obj-$(CONFIG_PPC_T2081) += t2080_ids.o
2967af68	60
06c14117 MY	61
	62	obj-$(CONFIG_QE) += qe_io.o
	63	obj-$(CONFIG_CPM2) += serial_scc.o
	64	obj-$(CONFIG_SYS_FSL_QORIQ_CHASSIS1) += fsl_corenet_serdes.o
	65	obj-$(CONFIG_SYS_FSL_QORIQ_CHASSIS2) += fsl_corenet2_serdes.o
c5780a6f KG	66
c5780a6f KG	67	# SoC specific SERDES support
4fd64746	68	obj-$(CONFIG_ARCH_C29X) += c29x_serdes.o
24ad75ae	69	obj-$(CONFIG_ARCH_MPC8536) += mpc8536_serdes.o
25cb74b3	70	obj-$(CONFIG_ARCH_MPC8544) += mpc8544_serdes.o
281ed4c7	71	obj-$(CONFIG_ARCH_MPC8548) += mpc8548_serdes.o
d07c3843	72	obj-$(CONFIG_ARCH_MPC8568) += mpc8568_serdes.o
23b36a7d	73	obj-$(CONFIG_ARCH_MPC8569) += mpc8569_serdes.o
c8f48474	74	obj-$(CONFIG_ARCH_MPC8572) += mpc8572_serdes.o
7d5f9f84	75	obj-$(CONFIG_ARCH_P1010) += p1010_serdes.o
1cdd96f3	76	obj-$(CONFIG_ARCH_P1011) += p1021_serdes.o
484fff64	77	obj-$(CONFIG_ARCH_P1020) += p1021_serdes.o
a990799d	78	obj-$(CONFIG_ARCH_P1021) += p1021_serdes.o
feb9e25b	79	obj-$(CONFIG_ARCH_P1022) += p1022_serdes.o
9bb1d6bc	80	obj-$(CONFIG_ARCH_P1023) += p1023_serdes.o
52b6f13d	81	obj-$(CONFIG_ARCH_P1024) += p1021_serdes.o
4167a67d	82	obj-$(CONFIG_ARCH_P1025) += p1021_serdes.o
4593637b	83	obj-$(CONFIG_ARCH_P2020) += p2020_serdes.o
ce040c83	84	obj-$(CONFIG_ARCH_P2041) += p2041_serdes.o
5e5fdd2d	85	obj-$(CONFIG_ARCH_P3041) += p3041_serdes.o
e71372cb	86	obj-$(CONFIG_ARCH_P4080) += p4080_serdes.o
06c14117 MY	87	obj-$(CONFIG_PPC_P5020) += p5020_serdes.o
	88	obj-$(CONFIG_PPC_P5040) += p5040_serdes.o
	89	obj-$(CONFIG_PPC_T4240) += t4240_serdes.o
	90	obj-$(CONFIG_PPC_T4160) += t4240_serdes.o
5122dfae	91	obj-$(CONFIG_PPC_T4080) += t4240_serdes.o
06c14117 MY	92	obj-$(CONFIG_PPC_B4420) += b4860_serdes.o
06c14117 MY	93	obj-$(CONFIG_PPC_B4860) += b4860_serdes.o
115d60c0	94	obj-$(CONFIG_ARCH_BSC9132) += bsc9132_serdes.o
06c14117	95	obj-$(CONFIG_PPC_T1040) += t1040_serdes.o
2967af68 PJ	96	obj-$(CONFIG_PPC_T1042) += t1040_serdes.o
	97	obj-$(CONFIG_PPC_T1020) += t1040_serdes.o
	98	obj-$(CONFIG_PPC_T1022) += t1040_serdes.o
f6050790 SL	99	obj-$(CONFIG_PPC_T1023) += t1024_serdes.o
f6050790 SL	100	obj-$(CONFIG_PPC_T1024) += t1024_serdes.o
629d6b32 SL	101	obj-$(CONFIG_PPC_T2080) += t2080_serdes.o
629d6b32 SL	102	obj-$(CONFIG_PPC_T2081) += t2080_serdes.o
06c14117 MY	103
	104	obj-y += cpu.o
	105	obj-y += cpu_init.o
	106	obj-y += cpu_init_early.o
	107	obj-y += interrupts.o
fa08d395	108	ifneq ($(CONFIG_QEMU_E500),y)
06c14117	109	obj-y += speed.o
fa08d395	110	endif
06c14117 MY	111	obj-y += tlb.o
06c14117 MY	112	obj-y += traps.o
42d1f039	113
4b919725	114	endif # not minimal