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powerpc: P4080: Remove macro CONFIG_PPC_P4080
[people/ms/u-boot.git] / arch / powerpc / cpu / mpc85xx / cmd_errata.c
CommitLineData
79ee3448 1/*
d621da00 2 * Copyright 2010-2011 Freescale Semiconductor, Inc.
79ee3448 3 *
1a459660 4 * SPDX-License-Identifier: GPL-2.0+
79ee3448
KG		 5 */
6
7#include <common.h>
8#include <command.h>
9#include <linux/compiler.h>
a07bdad7 10#include <fsl_errata.h>
79ee3448 11#include <asm/processor.h>
c26c80a1 12#include <fsl_usb.h>
d607b968 13#include "fsl_corenet_serdes.h"
79ee3448 14
0118033b
TT		 15#ifdef CONFIG_SYS_FSL_ERRATUM_A004849
16/*
17 * This work-around is implemented in PBI, so just check to see if the
18 * work-around was actually applied. To do this, we check for specific data
19 * at specific addresses in DCSR.
20 *
21 * Array offsets[] contains a list of offsets within DCSR. According to the
22 * erratum document, the value at each offset should be 2.
23 */
24static void check_erratum_a4849(uint32_t svr)
25{
26 void __iomem *dcsr = (void *)CONFIG_SYS_DCSRBAR + 0xb0000;
27 unsigned int i;
28
5e5fdd2d 29#if defined(CONFIG_ARCH_P2041) || defined(CONFIG_ARCH_P3041)
0118033b
TT		 30 static const uint8_t offsets[] = {
31 0x50, 0x54, 0x58, 0x90, 0x94, 0x98
32 };
33#endif
e71372cb 34#ifdef CONFIG_ARCH_P4080
0118033b
TT		 35 static const uint8_t offsets[] = {
36 0x60, 0x64, 0x68, 0x6c, 0xa0, 0xa4, 0xa8, 0xac
37 };
38#endif
39 uint32_t x108; /* The value that should be at offset 0x108 */
40
41 for (i = 0; i < ARRAY_SIZE(offsets); i++) {
42 if (in_be32(dcsr + offsets[i]) != 2) {
43 printf("Work-around for Erratum A004849 is not enabled\n");
44 return;
45 }
46 }
47
5e5fdd2d 48#if defined(CONFIG_ARCH_P2041) || defined(CONFIG_ARCH_P3041)
0118033b
TT		 49 x108 = 0x12;
50#endif
51
e71372cb 52#ifdef CONFIG_ARCH_P4080
0118033b
TT		 53 /*
54 * For P4080, the erratum document says that the value at offset 0x108
55 * should be 0x12 on rev2, or 0x1c on rev3.
56 */
57 if (SVR_MAJ(svr) == 2)
58 x108 = 0x12;
59 if (SVR_MAJ(svr) == 3)
60 x108 = 0x1c;
61#endif
62
63 if (in_be32(dcsr + 0x108) != x108) {
64 printf("Work-around for Erratum A004849 is not enabled\n");
65 return;
66 }
67
68 /* Everything matches, so the erratum work-around was applied */
69
70 printf("Work-around for Erratum A004849 enabled\n");
71}
72#endif
73
d607b968
TT		 74#ifdef CONFIG_SYS_FSL_ERRATUM_A004580
75/*
76 * This work-around is implemented in PBI, so just check to see if the
77 * work-around was actually applied. To do this, we check for specific data
78 * at specific addresses in the SerDes register block.
79 *
80 * The work-around says that for each SerDes lane, write BnTTLCRy0 =
81 * 0x1B00_0001, Register 2 = 0x0088_0000, and Register 3 = 0x4000_0000.
82
83 */
84static void check_erratum_a4580(uint32_t svr)
85{
86 const serdes_corenet_t __iomem *srds_regs =
87 (void *)CONFIG_SYS_FSL_CORENET_SERDES_ADDR;
88 unsigned int lane;
89
90 for (lane = 0; lane < SRDS_MAX_LANES; lane++) {
91 if (serdes_lane_enabled(lane)) {
92 const struct serdes_lane __iomem *srds_lane =
93 &srds_regs->lane[serdes_get_lane_idx(lane)];
94
95 /*
96 * Verify that the values we were supposed to write in
97 * the PBI are actually there. Also, the lower 15
98 * bits of res4[3] should be the same as the upper 15
99 * bits of res4[1].
100 */
101 if ((in_be32(&srds_lane->ttlcr0) != 0x1b000001) ||
102 (in_be32(&srds_lane->res4[1]) != 0x880000) ||
103 (in_be32(&srds_lane->res4[3]) != 0x40000044)) {
104 printf("Work-around for Erratum A004580 is "
105 "not enabled\n");
106 return;
107 }
108 }
109 }
110
111 /* Everything matches, so the erratum work-around was applied */
112
113 printf("Work-around for Erratum A004580 enabled\n");
114}
115#endif
116
c3678b09
YS		 117#ifdef CONFIG_SYS_FSL_ERRATUM_A007212
118/*
119 * This workaround can be implemented in PBI, or by u-boot.
120 */
121static void check_erratum_a007212(void)
122{
123 u32 __iomem *plldgdcr = (void *)(CONFIG_SYS_DCSRBAR + 0x21c20);
124
125 if (in_be32(plldgdcr) & 0x1fe) {
126 /* check if PLL ratio is set by workaround */
127 puts("Work-around for Erratum A007212 enabled\n");
128 }
129}
130#endif
131
79ee3448
KG		 132static int do_errata(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
133{
57125f22
YS		 134#ifdef CONFIG_SYS_FSL_ERRATUM_NMG_CPU_A011
135 extern int enable_cpu_a011_workaround;
136#endif
79ee3448
KG		 137 __maybe_unused u32 svr = get_svr();
138
139#if defined(CONFIG_FSL_SATA_V2) && defined(CONFIG_FSL_SATA_ERRATUM_A001)
140 if (IS_SVR_REV(svr, 1, 0)) {
141 switch (SVR_SOC_VER(svr)) {
142 case SVR_P1013:
79ee3448 143 case SVR_P1022:
79ee3448
KG		 144 puts("Work-around for Erratum SATA A001 enabled\n");
145 }
146 }
147#endif
148
61054ffa
KG		 149#if defined(CONFIG_SYS_P4080_ERRATUM_SERDES8)
150 puts("Work-around for Erratum SERDES8 enabled\n");
151#endif
df8af0b4
EM		 152#if defined(CONFIG_SYS_P4080_ERRATUM_SERDES9)
153 puts("Work-around for Erratum SERDES9 enabled\n");
154#endif
da30b9fd
TT		 155#if defined(CONFIG_SYS_P4080_ERRATUM_SERDES_A005)
156 puts("Work-around for Erratum SERDES-A005 enabled\n");
157#endif
fd3c9bef 158#if defined(CONFIG_SYS_P4080_ERRATUM_CPU22)
1e9ea85f
YS		 159 if (SVR_MAJ(svr) < 3)
160 puts("Work-around for Erratum CPU22 enabled\n");
810c4427 161#endif
5e23ab0a
YS		 162#ifdef CONFIG_SYS_FSL_ERRATUM_NMG_CPU_A011
163 /*
164 * NMG_CPU_A011 applies to P4080 rev 1.0, 2.0, fixed in 3.0
165 * also applies to P3041 rev 1.0, 1.1, P2041 rev 1.0, 1.1
57125f22 166 * The SVR has been checked by cpu_init_r().
5e23ab0a 167 */
57125f22 168 if (enable_cpu_a011_workaround)
5e23ab0a
YS		 169 puts("Work-around for Erratum CPU-A011 enabled\n");
170#endif
43f082bb
KG		 171#if defined(CONFIG_SYS_FSL_ERRATUM_CPU_A003999)
172 puts("Work-around for Erratum CPU-A003999 enabled\n");
173#endif
4108508a 174#if defined(CONFIG_SYS_FSL_ERRATUM_DDR_A003474)
b5188164 175 puts("Work-around for Erratum DDR-A003474 enabled\n");
4108508a 176#endif
810c4427
BB		 177#if defined(CONFIG_SYS_FSL_ERRATUM_DDR_MSYNC_IN)
178 puts("Work-around for DDR MSYNC_IN Erratum enabled\n");
d621da00
JH		 179#endif
180#if defined(CONFIG_SYS_FSL_ERRATUM_ESDHC111)
181 puts("Work-around for Erratum ESDHC111 enabled\n");
3b4456ec 182#endif
eb539412
YS		 183#ifdef CONFIG_SYS_FSL_ERRATUM_A004468
184 puts("Work-around for Erratum A004468 enabled\n");
185#endif
3b4456ec
RZ		 186#if defined(CONFIG_SYS_FSL_ERRATUM_ESDHC135)
187 puts("Work-around for Erratum ESDHC135 enabled\n");
ae026ffd 188#endif
4e0be34a
ZRR		 189#if defined(CONFIG_SYS_FSL_ERRATUM_ESDHC13)
190 if (SVR_MAJ(svr) < 3)
191 puts("Work-around for Erratum ESDHC13 enabled\n");
fd3c9bef 192#endif
5103a03a
KG		 193#if defined(CONFIG_SYS_FSL_ERRATUM_ESDHC_A001)
194 puts("Work-around for Erratum ESDHC-A001 enabled\n");
195#endif
1d2c2a62
KG		 196#ifdef CONFIG_SYS_FSL_ERRATUM_CPC_A002
197 puts("Work-around for Erratum CPC-A002 enabled\n");
198#endif
868da593
KG		 199#ifdef CONFIG_SYS_FSL_ERRATUM_CPC_A003
200 puts("Work-around for Erratum CPC-A003 enabled\n");
201#endif
f133796d
KG		 202#ifdef CONFIG_SYS_FSL_ERRATUM_ELBC_A001
203 puts("Work-around for Erratum ELBC-A001 enabled\n");
204#endif
fa8d23c0
YS		 205#ifdef CONFIG_SYS_FSL_ERRATUM_DDR_A003
206 puts("Work-around for Erratum DDR-A003 enabled\n");
207#endif
eb0aff77
YS		 208#ifdef CONFIG_SYS_FSL_ERRATUM_DDR_115
209 puts("Work-around for Erratum DDR115 enabled\n");
91671913
YS		 210#endif
211#ifdef CONFIG_SYS_FSL_ERRATUM_DDR111_DDR134
212 puts("Work-around for Erratum DDR111 enabled\n");
213 puts("Work-around for Erratum DDR134 enabled\n");
42aee64b
PA		 214#endif
215#ifdef CONFIG_SYS_FSL_ERRATUM_IFC_A002769
216 puts("Work-around for Erratum IFC-A002769 enabled\n");
fb855f43
PA		 217#endif
218#ifdef CONFIG_SYS_FSL_ERRATUM_P1010_A003549
219 puts("Work-around for Erratum P1010-A003549 enabled\n");
bc6bbd6b
PA		 220#endif
221#ifdef CONFIG_SYS_FSL_ERRATUM_IFC_A003399
222 puts("Work-around for Erratum IFC A-003399 enabled\n");
5ace2992
KG		 223#endif
224#ifdef CONFIG_SYS_FSL_ERRATUM_NMG_DDR120
225 if ((SVR_MAJ(svr) == 1) || IS_SVR_REV(svr, 2, 0))
226 puts("Work-around for Erratum NMG DDR120 enabled\n");
2b3a1cdd
KG		 227#endif
228#ifdef CONFIG_SYS_FSL_ERRATUM_NMG_LBC103
229 puts("Work-around for Erratum NMG_LBC103 enabled\n");
aada81de 230#endif
231#ifdef CONFIG_SYS_FSL_ERRATUM_NMG_ETSEC129
232 if ((SVR_MAJ(svr) == 1) || IS_SVR_REV(svr, 2, 0))
233 puts("Work-around for Erratum NMG ETSEC129 enabled\n");
33eee330 234#endif
9855b3be
YS		 235#ifdef CONFIG_SYS_FSL_ERRATUM_A004508
236 puts("Work-around for Erratum A004508 enabled\n");
237#endif
33eee330
SW		 238#ifdef CONFIG_SYS_FSL_ERRATUM_A004510
239 puts("Work-around for Erratum A004510 enabled\n");
d59c5570
LG		 240#endif
241#ifdef CONFIG_SYS_FSL_ERRATUM_SRIO_A004034
242 puts("Work-around for Erratum SRIO-A004034 enabled\n");
a1d558a2
YS		 243#endif
244#ifdef CONFIG_SYS_FSL_ERRATUM_A_004934
245 puts("Work-around for Erratum A004934 enabled\n");
0118033b 246#endif
72bd83cd
SL		 247#ifdef CONFIG_SYS_FSL_ERRATUM_A005871
248 if (IS_SVR_REV(svr, 1, 0))
249 puts("Work-around for Erratum A005871 enabled\n");
250#endif
7af9a074
SL		 251#ifdef CONFIG_SYS_FSL_ERRATUM_A006475
252 if (SVR_MAJ(get_svr()) == 1)
253 puts("Work-around for Erratum A006475 enabled\n");
254#endif
255#ifdef CONFIG_SYS_FSL_ERRATUM_A006384
256 if (SVR_MAJ(get_svr()) == 1)
257 puts("Work-around for Erratum A006384 enabled\n");
258#endif
0118033b
TT		 259#ifdef CONFIG_SYS_FSL_ERRATUM_A004849
260 /* This work-around is implemented in PBI, so just check for it */
261 check_erratum_a4849(svr);
d607b968
TT		 262#endif
263#ifdef CONFIG_SYS_FSL_ERRATUM_A004580
264 /* This work-around is implemented in PBI, so just check for it */
265 check_erratum_a4580(svr);
c0a4e6b8
YC		 266#endif
267#ifdef CONFIG_SYS_P4080_ERRATUM_PCIE_A003
268 puts("Work-around for Erratum PCIe-A003 enabled\n");
99d7b0a4
X		 269#endif
270#ifdef CONFIG_SYS_FSL_ERRATUM_USB14
271 puts("Work-around for Erratum USB14 enabled\n");
82125192 272#endif
b6808cd8 273#ifdef CONFIG_SYS_FSL_ERRATUM_A007186
e7f533cd
ZQ		 274 if (has_erratum_a007186())
275 puts("Work-around for Erratum A007186 enabled\n");
b6808cd8 276#endif
82125192
SW		 277#ifdef CONFIG_SYS_FSL_ERRATUM_A006593
278 puts("Work-around for Erratum A006593 enabled\n");
d217a9ad 279#endif
133fbfa9
YS		 280#ifdef CONFIG_SYS_FSL_ERRATUM_A006379
281 if (has_erratum_a006379())
282 puts("Work-around for Erratum A006379 enabled\n");
283#endif
424bf942
SL		 284#ifdef CONFIG_SYS_FSL_ERRATUM_SEC_A003571
285 if (IS_SVR_REV(svr, 1, 0))
286 puts("Work-around for Erratum A003571 enabled\n");
287#endif
d217a9ad
YS		 288#ifdef CONFIG_SYS_FSL_ERRATUM_A005812
289 puts("Work-around for Erratum A-005812 enabled\n");
9c3f77eb 290#endif
954a1a47
YS		 291#ifdef CONFIG_SYS_FSL_ERRATUM_A005125
292 puts("Work-around for Erratum A005125 enabled\n");
293#endif
11856919
NB		 294#ifdef CONFIG_SYS_FSL_ERRATUM_A007075
295 if (has_erratum_a007075())
296 puts("Work-around for Erratum A007075 enabled\n");
297#endif
f3dff695
NB		 298#ifdef CONFIG_SYS_FSL_ERRATUM_A007798
299 if (has_erratum_a007798())
300 puts("Work-around for Erratum A007798 enabled\n");
301#endif
0dc78ff8
NB		 302#ifdef CONFIG_SYS_FSL_ERRATUM_A004477
303 if (has_erratum_a004477())
304 puts("Work-around for Erratum A004477 enabled\n");
305#endif
9c3f77eb
CL		 306#ifdef CONFIG_SYS_FSL_ERRATUM_I2C_A004447
307 if ((SVR_SOC_VER(svr) == SVR_8548 && IS_SVR_REV(svr, 3, 1)) ||
308 (SVR_REV(svr) <= CONFIG_SYS_FSL_A004447_SVR_REV))
309 puts("Work-around for Erratum I2C-A004447 enabled\n");
9c641a87
SG		 310#endif
311#ifdef CONFIG_SYS_FSL_ERRATUM_A006261
312 if (has_erratum_a006261())
313 puts("Work-around for Erratum A006261 enabled\n");
eb0aff77 314#endif
c3678b09
YS		 315#ifdef CONFIG_SYS_FSL_ERRATUM_A007212
316 check_erratum_a007212();
317#endif
f1a96ec1
CL		 318#ifdef CONFIG_SYS_FSL_ERRATUM_A005434
319 puts("Work-around for Erratum A-005434 enabled\n");
320#endif
9f074e67
PK		 321#if defined(CONFIG_SYS_FSL_ERRATUM_A008044) && \
322 defined(CONFIG_A008044_WORKAROUND)
31530e0b
PK		 323 if (IS_SVR_REV(svr, 1, 0))
324 puts("Work-around for Erratum A-008044 enabled\n");
9f074e67 325#endif
b24f6d40
SX		 326#if defined(CONFIG_SYS_FSL_B4860QDS_XFI_ERR) && defined(CONFIG_B4860QDS)
327 puts("Work-around for Erratum XFI on B4860QDS enabled\n");
328#endif
a994b3de
SL		 329#ifdef CONFIG_SYS_FSL_ERRATUM_A009663
330 puts("Work-around for Erratum A009663 enabled\n");
331#endif
b24f6d40 332
79ee3448
KG		 333 return 0;
334}
335
336U_BOOT_CMD(
337 errata, 1, 0, do_errata,
338 "Report errata workarounds",
339 ""
340);
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