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[thirdparty/u-boot.git] / arch / powerpc / cpu / mpc85xx / spl_minimal.c
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1/*
2 * Copyright 2009 Freescale Semiconductor, Inc.
3 *
1a459660 4 * SPDX-License-Identifier: GPL-2.0+
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5 */
6
7#include <common.h>
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8#include <asm/processor.h>
9#include <asm/global_data.h>
52f90dad 10#include <asm/fsl_ifc.h>
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11#include <asm/io.h>
12
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13DECLARE_GLOBAL_DATA_PTR;
14
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15void cpu_init_f(void)
16{
c97cd1ba 17#ifdef CONFIG_SYS_INIT_L2_ADDR
234a89d9 18 ccsr_l2cache_t *l2cache = (void *)CONFIG_SYS_MPC85xx_L2_ADDR;
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19
20 out_be32(&l2cache->l2srbar0, CONFIG_SYS_INIT_L2_ADDR);
21
22 /* set MBECCDIS=1, SBECCDIS=1 */
23 out_be32(&l2cache->l2errdis,
24 (MPC85xx_L2ERRDIS_MBECC | MPC85xx_L2ERRDIS_SBECC));
25
26 /* set L2E=1 & L2SRAM=001 */
27 out_be32(&l2cache->l2ctl,
28 (MPC85xx_L2CTL_L2E | MPC85xx_L2CTL_L2SRAM_ENTIRE));
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29#endif
30}
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31
32#ifndef CONFIG_SYS_FSL_TBCLK_DIV
33#define CONFIG_SYS_FSL_TBCLK_DIV 8
34#endif
35
36void udelay(unsigned long usec)
37{
38 u32 ticks_per_usec = gd->bus_clk / (CONFIG_SYS_FSL_TBCLK_DIV * 1000000);
39 u32 ticks = ticks_per_usec * usec;
40 u32 s = mfspr(SPRN_TBRL);
41
42 while ((mfspr(SPRN_TBRL) - s) < ticks);
43}