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4649913e SR |
1 | /* |
2 | * Copyright 2007-2009 Freescale Semiconductor, Inc. | |
3 | * | |
4 | * See file CREDITS for list of people who contributed to this | |
5 | * project. | |
6 | * | |
7 | * This program is free software; you can redistribute it and/or | |
8 | * modify it under the terms of the GNU General Public License as | |
9 | * published by the Free Software Foundation; either version 2 of | |
10 | * the License, or (at your option) any later version. | |
11 | * | |
12 | * This program is distributed in the hope that it will be useful, | |
13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
15 | * GNU General Public License for more details. | |
16 | * | |
17 | * You should have received a copy of the GNU General Public License | |
18 | * along with this program; if not, write to the Free Software | |
19 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, | |
20 | * MA 02111-1307 USA | |
21 | */ | |
22 | ||
23 | #include "config.h" /* CONFIG_BOARDDIR */ | |
24 | ||
25 | #ifndef RESET_VECTOR_ADDRESS | |
d20b9991 RR |
26 | #ifdef CONFIG_RESET_VECTOR_ADDRESS |
27 | #define RESET_VECTOR_ADDRESS CONFIG_RESET_VECTOR_ADDRESS | |
28 | #else | |
4649913e SR |
29 | #define RESET_VECTOR_ADDRESS 0xfffffffc |
30 | #endif | |
d20b9991 | 31 | #endif |
4649913e SR |
32 | |
33 | OUTPUT_ARCH(powerpc) | |
ee8028b7 | 34 | |
4649913e SR |
35 | PHDRS |
36 | { | |
37 | text PT_LOAD; | |
38 | bss PT_LOAD; | |
39 | } | |
40 | ||
41 | SECTIONS | |
42 | { | |
43 | /* Read-only sections, merged into text segment: */ | |
44 | . = + SIZEOF_HEADERS; | |
4649913e SR |
45 | .text : |
46 | { | |
ee8028b7 | 47 | *(.text*) |
4649913e SR |
48 | } :text |
49 | _etext = .; | |
50 | PROVIDE (etext = .); | |
51 | .rodata : | |
52 | { | |
4649913e SR |
53 | *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) |
54 | } :text | |
4649913e SR |
55 | |
56 | /* Read-write section, merged into data segment: */ | |
57 | . = (. + 0x00FF) & 0xFFFFFF00; | |
58 | _erotext = .; | |
59 | PROVIDE (erotext = .); | |
60 | .reloc : | |
61 | { | |
4649913e | 62 | _GOT2_TABLE_ = .; |
ee8028b7 | 63 | KEEP(*(.got2)) |
337f5f50 JT |
64 | KEEP(*(.got)) |
65 | PROVIDE(_GLOBAL_OFFSET_TABLE_ = . + 4); | |
4649913e | 66 | _FIXUP_TABLE_ = .; |
ee8028b7 | 67 | KEEP(*(.fixup)) |
4649913e | 68 | } |
337f5f50 | 69 | __got2_entries = ((_GLOBAL_OFFSET_TABLE_ - _GOT2_TABLE_) >> 2) - 1; |
4649913e SR |
70 | __fixup_entries = (. - _FIXUP_TABLE_) >> 2; |
71 | ||
72 | .data : | |
73 | { | |
ee8028b7 WD |
74 | *(.data*) |
75 | *(.sdata*) | |
4649913e SR |
76 | } |
77 | _edata = .; | |
78 | PROVIDE (edata = .); | |
79 | ||
80 | . = .; | |
4649913e | 81 | |
55675142 MV |
82 | . = ALIGN(4); |
83 | .u_boot_list : { | |
ef123c52 | 84 | KEEP(*(SORT(.u_boot_list*))); |
55675142 MV |
85 | } |
86 | ||
4649913e SR |
87 | . = .; |
88 | __start___ex_table = .; | |
89 | __ex_table : { *(__ex_table) } | |
90 | __stop___ex_table = .; | |
91 | ||
92 | . = ALIGN(256); | |
93 | __init_begin = .; | |
94 | .text.init : { *(.text.init) } | |
95 | .data.init : { *(.data.init) } | |
96 | . = ALIGN(256); | |
97 | __init_end = .; | |
98 | ||
99 | #ifdef CONFIG_440 | |
100 | .bootpg RESET_VECTOR_ADDRESS - 0xffc : | |
101 | { | |
a47a12be | 102 | arch/powerpc/cpu/ppc4xx/start.o (.bootpg) |
4649913e SR |
103 | |
104 | /* | |
105 | * PPC440 board need a board specific object with the | |
106 | * TLB definitions. This needs to get included right after | |
107 | * start.o, since the first shadow TLB only covers 4k | |
108 | * of address space. | |
109 | */ | |
d20b9991 RR |
110 | #ifdef CONFIG_INIT_TLB |
111 | CONFIG_INIT_TLB (.bootpg) | |
112 | #else | |
4649913e | 113 | CONFIG_BOARDDIR/init.o (.bootpg) |
d20b9991 | 114 | #endif |
4649913e SR |
115 | } :text = 0xffff |
116 | #endif | |
117 | ||
118 | .resetvec RESET_VECTOR_ADDRESS : | |
119 | { | |
ee8028b7 | 120 | KEEP(*(.resetvec)) |
4649913e SR |
121 | } :text = 0xffff |
122 | ||
123 | . = RESET_VECTOR_ADDRESS + 0x4; | |
124 | ||
125 | /* | |
126 | * Make sure that the bss segment isn't linked at 0x0, otherwise its | |
127 | * address won't be updated during relocation fixups. Note that | |
128 | * this is a temporary fix. Code to dynamically the fixup the bss | |
129 | * location will be added in the future. When the bss relocation | |
130 | * fixup code is present this workaround should be removed. | |
131 | */ | |
132 | #if (RESET_VECTOR_ADDRESS == 0xfffffffc) | |
133 | . |= 0x10; | |
134 | #endif | |
135 | ||
136 | __bss_start = .; | |
137 | .bss (NOLOAD) : | |
138 | { | |
ee8028b7 WD |
139 | *(.bss*) |
140 | *(.sbss*) | |
4649913e SR |
141 | *(COMMON) |
142 | } :bss | |
143 | ||
144 | . = ALIGN(4); | |
44c6e659 | 145 | __bss_end__ = . ; |
4649913e SR |
146 | PROVIDE (end = .); |
147 | } |