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powerpc: P4080: Remove macro CONFIG_PPC_P4080
[people/ms/u-boot.git] / arch / powerpc / include / asm / config_mpc85xx.h
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243be8e2 1/*
19a8dbdc 2 * Copyright 2011-2012 Freescale Semiconductor, Inc.
243be8e2 3 *
1a459660 4 * SPDX-License-Identifier: GPL-2.0+
243be8e2
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5 */
6
7#ifndef _ASM_MPC85xx_CONFIG_H_
8#define _ASM_MPC85xx_CONFIG_H_
9
10/* SoC specific defines for Freescale MPC85xx (PQ3) and QorIQ processors */
11
e46fedfe
TT
12#ifdef CONFIG_SYS_CCSRBAR_DEFAULT
13#error "Do not define CONFIG_SYS_CCSRBAR_DEFAULT in the board header file."
14#endif
15
2a5fcb83
YS
16/*
17 * This macro should be removed when we no longer care about backwards
18 * compatibility with older operating systems.
19 */
20#define CONFIG_PPC_SPINTABLE_COMPATIBLE
21
34e026f9
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22#include <fsl_ddrc_version.h>
23#define CONFIG_SYS_FSL_DDR_BE
57495e4e 24
1b4175d6
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25/* IP endianness */
26#define CONFIG_SYS_FSL_IFC_BE
028dbb8d 27#define CONFIG_SYS_FSL_SEC_BE
a2e225e6 28#define CONFIG_SYS_FSL_SFP_BE
e04916a7 29#define CONFIG_SYS_FSL_SEC_MON_BE
1b4175d6 30
243be8e2
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31/* Number of TLB CAM entries we have on FSL Book-E chips */
32#if defined(CONFIG_E500MC)
33#define CONFIG_SYS_NUM_TLBCAMS 64
34#elif defined(CONFIG_E500)
35#define CONFIG_SYS_NUM_TLBCAMS 16
36#endif
37
24ad75ae 38#if defined(CONFIG_ARCH_MPC8536)
243be8e2
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39#define CONFIG_MAX_CPUS 1
40#define CONFIG_SYS_FSL_NUM_LAWS 12
e4879afb 41#define CONFIG_SYS_PPC_E500_DEBUG_TLB 1
243be8e2 42#define CONFIG_SYS_FSL_SEC_COMPAT 2
e46fedfe 43#define CONFIG_SYS_CCSRBAR_DEFAULT 0xff700000
9855b3be 44#define CONFIG_SYS_FSL_ERRATUM_A004508
954a1a47 45#define CONFIG_SYS_FSL_ERRATUM_A005125
243be8e2 46
7f825218 47#elif defined(CONFIG_ARCH_MPC8540)
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48#define CONFIG_MAX_CPUS 1
49#define CONFIG_SYS_FSL_NUM_LAWS 8
5614e71b 50#define CONFIG_SYS_FSL_DDRC_GEN1
e46fedfe 51#define CONFIG_SYS_CCSRBAR_DEFAULT 0xff700000
243be8e2 52
3aff3082 53#elif defined(CONFIG_ARCH_MPC8541)
243be8e2
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54#define CONFIG_MAX_CPUS 1
55#define CONFIG_SYS_FSL_NUM_LAWS 8
5614e71b 56#define CONFIG_SYS_FSL_DDRC_GEN1
243be8e2 57#define CONFIG_SYS_FSL_SEC_COMPAT 2
e46fedfe 58#define CONFIG_SYS_CCSRBAR_DEFAULT 0xff700000
243be8e2 59
25cb74b3 60#elif defined(CONFIG_ARCH_MPC8544)
243be8e2
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61#define CONFIG_MAX_CPUS 1
62#define CONFIG_SYS_FSL_NUM_LAWS 10
5614e71b 63#define CONFIG_SYS_FSL_DDRC_GEN2
e4879afb 64#define CONFIG_SYS_PPC_E500_DEBUG_TLB 0
243be8e2 65#define CONFIG_SYS_FSL_SEC_COMPAT 2
e46fedfe 66#define CONFIG_SYS_CCSRBAR_DEFAULT 0xff700000
954a1a47 67#define CONFIG_SYS_FSL_ERRATUM_A005125
243be8e2 68
281ed4c7 69#elif defined(CONFIG_ARCH_MPC8548)
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70#define CONFIG_MAX_CPUS 1
71#define CONFIG_SYS_FSL_NUM_LAWS 10
5614e71b 72#define CONFIG_SYS_FSL_DDRC_GEN2
e4879afb 73#define CONFIG_SYS_PPC_E500_DEBUG_TLB 0
243be8e2 74#define CONFIG_SYS_FSL_SEC_COMPAT 2
e46fedfe 75#define CONFIG_SYS_CCSRBAR_DEFAULT 0xff700000
5ace2992 76#define CONFIG_SYS_FSL_ERRATUM_NMG_DDR120
2b3a1cdd 77#define CONFIG_SYS_FSL_ERRATUM_NMG_LBC103
aada81de 78#define CONFIG_SYS_FSL_ERRATUM_NMG_ETSEC129
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79#define CONFIG_SYS_FSL_SRIO_MAX_PORTS 1
80#define CONFIG_SYS_FSL_SRIO_OB_WIN_NUM 9
81#define CONFIG_SYS_FSL_SRIO_IB_WIN_NUM 5
82#define CONFIG_SYS_FSL_RMU
83#define CONFIG_SYS_FSL_SRIO_MSG_UNIT_NUM 2
954a1a47 84#define CONFIG_SYS_FSL_ERRATUM_A005125
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85#define CONFIG_SYS_FSL_ERRATUM_I2C_A004447
86#define CONFIG_SYS_FSL_A004447_SVR_REV 0x00
243be8e2 87
3c3d8ab5 88#elif defined(CONFIG_ARCH_MPC8555)
243be8e2
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89#define CONFIG_MAX_CPUS 1
90#define CONFIG_SYS_FSL_NUM_LAWS 8
5614e71b 91#define CONFIG_SYS_FSL_DDRC_GEN1
243be8e2 92#define CONFIG_SYS_FSL_SEC_COMPAT 2
e46fedfe 93#define CONFIG_SYS_CCSRBAR_DEFAULT 0xff700000
243be8e2 94
99d0a312 95#elif defined(CONFIG_ARCH_MPC8560)
243be8e2
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96#define CONFIG_MAX_CPUS 1
97#define CONFIG_SYS_FSL_NUM_LAWS 8
5614e71b 98#define CONFIG_SYS_FSL_DDRC_GEN1
e46fedfe 99#define CONFIG_SYS_CCSRBAR_DEFAULT 0xff700000
243be8e2 100
d07c3843 101#elif defined(CONFIG_ARCH_MPC8568)
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102#define CONFIG_MAX_CPUS 1
103#define CONFIG_SYS_FSL_NUM_LAWS 10
5614e71b 104#define CONFIG_SYS_FSL_DDRC_GEN2
243be8e2 105#define CONFIG_SYS_FSL_SEC_COMPAT 2
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106#define QE_MURAM_SIZE 0x10000UL
107#define MAX_QE_RISC 2
108#define QE_NUM_OF_SNUM 28
e46fedfe 109#define CONFIG_SYS_CCSRBAR_DEFAULT 0xff700000
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110#define CONFIG_SYS_FSL_SRIO_MAX_PORTS 1
111#define CONFIG_SYS_FSL_SRIO_OB_WIN_NUM 9
112#define CONFIG_SYS_FSL_SRIO_IB_WIN_NUM 5
113#define CONFIG_SYS_FSL_RMU
114#define CONFIG_SYS_FSL_SRIO_MSG_UNIT_NUM 2
243be8e2 115
23b36a7d 116#elif defined(CONFIG_ARCH_MPC8569)
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117#define CONFIG_MAX_CPUS 1
118#define CONFIG_SYS_FSL_NUM_LAWS 10
119#define CONFIG_SYS_FSL_SEC_COMPAT 2
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120#define QE_MURAM_SIZE 0x20000UL
121#define MAX_QE_RISC 4
122#define QE_NUM_OF_SNUM 46
e46fedfe 123#define CONFIG_SYS_CCSRBAR_DEFAULT 0xff700000
7d67ed58
LG
124#define CONFIG_SYS_FSL_SRIO_MAX_PORTS 1
125#define CONFIG_SYS_FSL_SRIO_OB_WIN_NUM 9
126#define CONFIG_SYS_FSL_SRIO_IB_WIN_NUM 5
127#define CONFIG_SYS_FSL_RMU
128#define CONFIG_SYS_FSL_SRIO_MSG_UNIT_NUM 2
9855b3be 129#define CONFIG_SYS_FSL_ERRATUM_A004508
954a1a47 130#define CONFIG_SYS_FSL_ERRATUM_A005125
243be8e2 131
c8f48474 132#elif defined(CONFIG_ARCH_MPC8572)
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133#define CONFIG_MAX_CPUS 2
134#define CONFIG_SYS_FSL_NUM_LAWS 12
e4879afb 135#define CONFIG_SYS_PPC_E500_DEBUG_TLB 2
243be8e2 136#define CONFIG_SYS_FSL_SEC_COMPAT 2
e46fedfe 137#define CONFIG_SYS_CCSRBAR_DEFAULT 0xff700000
eb0aff77 138#define CONFIG_SYS_FSL_ERRATUM_DDR_115
91671913 139#define CONFIG_SYS_FSL_ERRATUM_DDR111_DDR134
9855b3be 140#define CONFIG_SYS_FSL_ERRATUM_A004508
954a1a47 141#define CONFIG_SYS_FSL_ERRATUM_A005125
243be8e2 142
7d5f9f84 143#elif defined(CONFIG_ARCH_P1010)
243be8e2 144#define CONFIG_MAX_CPUS 1
32c8cfb2 145#define CONFIG_FSL_SDHC_V2_3
243be8e2 146#define CONFIG_SYS_FSL_NUM_LAWS 12
ad75d442 147#define CONFIG_SYS_PPC_E500_DEBUG_TLB 3
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148#define CONFIG_TSECV2
149#define CONFIG_SYS_FSL_SEC_COMPAT 4
1fbf3483
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150#define CONFIG_SYS_FSL_ERRATUM_ESDHC111
151#define CONFIG_NUM_DDR_CONTROLLERS 1
f1810d85 152#define CONFIG_USB_MAX_CONTROLLER_COUNT 1
362ee04b 153#define CONFIG_SYS_FSL_IFC_BANK_COUNT 4
1fbf3483 154#define CONFIG_SYS_CCSRBAR_DEFAULT 0xff700000
8f29084a 155#define CONFIG_SYS_FSL_PCIE_COMPAT "fsl,qoriq-pcie-v2.2"
1b719e66 156#define CONFIG_SYS_FSL_USB_INTERNAL_UTMI_PHY
42aee64b 157#define CONFIG_SYS_FSL_ERRATUM_IFC_A002769
fb855f43 158#define CONFIG_SYS_FSL_ERRATUM_P1010_A003549
424bf942 159#define CONFIG_SYS_FSL_ERRATUM_SEC_A003571
bc6bbd6b 160#define CONFIG_SYS_FSL_ERRATUM_IFC_A003399
954a1a47 161#define CONFIG_SYS_FSL_ERRATUM_A005125
9c3f77eb 162#define CONFIG_SYS_FSL_ERRATUM_I2C_A004447
9855b3be 163#define CONFIG_SYS_FSL_ERRATUM_A004508
11856919 164#define CONFIG_SYS_FSL_ERRATUM_A007075
15a6d496 165#define CONFIG_SYS_FSL_USB1_PHY_ENABLE
9c641a87 166#define CONFIG_SYS_FSL_ERRATUM_A006261
0dc78ff8 167#define CONFIG_SYS_FSL_ERRATUM_A004477
9c3f77eb 168#define CONFIG_SYS_FSL_A004447_SVR_REV 0x10
f28bea00 169#define CONFIG_ESDHC_HC_BLK_ADDR
243be8e2 170
093cffbe 171/* P1011 is single core version of P1020 */
1cdd96f3 172#elif defined(CONFIG_ARCH_P1011)
243be8e2
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173#define CONFIG_MAX_CPUS 1
174#define CONFIG_SYS_FSL_NUM_LAWS 12
ad75d442 175#define CONFIG_SYS_PPC_E500_DEBUG_TLB 2
243be8e2 176#define CONFIG_TSECV2
b03a466d 177#define CONFIG_FSL_PCIE_DISABLE_ASPM
243be8e2 178#define CONFIG_SYS_FSL_SEC_COMPAT 2
f1810d85 179#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
e46fedfe 180#define CONFIG_SYS_CCSRBAR_DEFAULT 0xff700000
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181#define CONFIG_SYS_FSL_ERRATUM_ELBC_A001
182#define CONFIG_SYS_FSL_ERRATUM_ESDHC111
9855b3be 183#define CONFIG_SYS_FSL_ERRATUM_A004508
954a1a47 184#define CONFIG_SYS_FSL_ERRATUM_A005125
67a719da 185
484fff64 186#elif defined(CONFIG_ARCH_P1020)
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187#define CONFIG_MAX_CPUS 2
188#define CONFIG_SYS_FSL_NUM_LAWS 12
ad75d442 189#define CONFIG_SYS_PPC_E500_DEBUG_TLB 2
243be8e2 190#define CONFIG_TSECV2
b03a466d 191#define CONFIG_FSL_PCIE_DISABLE_ASPM
243be8e2 192#define CONFIG_SYS_FSL_SEC_COMPAT 2
e46fedfe 193#define CONFIG_SYS_CCSRBAR_DEFAULT 0xff700000
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194#define CONFIG_SYS_FSL_ERRATUM_ELBC_A001
195#define CONFIG_SYS_FSL_ERRATUM_ESDHC111
9855b3be 196#define CONFIG_SYS_FSL_ERRATUM_A004508
954a1a47 197#define CONFIG_SYS_FSL_ERRATUM_A005125
80ba6a6f 198#ifndef CONFIG_USB_MAX_CONTROLLER_COUNT
f1810d85 199#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
80ba6a6f 200#endif
243be8e2 201
a990799d 202#elif defined(CONFIG_ARCH_P1021)
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203#define CONFIG_MAX_CPUS 2
204#define CONFIG_SYS_FSL_NUM_LAWS 12
ad75d442 205#define CONFIG_SYS_PPC_E500_DEBUG_TLB 2
243be8e2 206#define CONFIG_TSECV2
b03a466d 207#define CONFIG_FSL_PCIE_DISABLE_ASPM
243be8e2 208#define CONFIG_SYS_FSL_SEC_COMPAT 2
e46fedfe 209#define CONFIG_SYS_CCSRBAR_DEFAULT 0xff700000
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210#define CONFIG_SYS_FSL_ERRATUM_ELBC_A001
211#define CONFIG_SYS_FSL_ERRATUM_ESDHC111
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212#define QE_MURAM_SIZE 0x6000UL
213#define MAX_QE_RISC 1
214#define QE_NUM_OF_SNUM 28
9855b3be 215#define CONFIG_SYS_FSL_ERRATUM_A004508
954a1a47 216#define CONFIG_SYS_FSL_ERRATUM_A005125
f1810d85 217#define CONFIG_USB_MAX_CONTROLLER_COUNT 1
243be8e2 218
feb9e25b 219#elif defined(CONFIG_ARCH_P1022)
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220#define CONFIG_MAX_CPUS 2
221#define CONFIG_SYS_FSL_NUM_LAWS 12
ad75d442 222#define CONFIG_SYS_PPC_E500_DEBUG_TLB 2
243be8e2
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223#define CONFIG_TSECV2
224#define CONFIG_SYS_FSL_SEC_COMPAT 2
703f5681 225#define CONFIG_USB_MAX_CONTROLLER_COUNT 1
e46fedfe 226#define CONFIG_SYS_CCSRBAR_DEFAULT 0xff700000
2d7534a3
JY
227#define CONFIG_SYS_FSL_ERRATUM_ELBC_A001
228#define CONFIG_SYS_FSL_ERRATUM_ESDHC111
229#define CONFIG_FSL_SATA_ERRATUM_A001
9855b3be 230#define CONFIG_SYS_FSL_ERRATUM_A004508
954a1a47 231#define CONFIG_SYS_FSL_ERRATUM_A005125
0dc78ff8 232#define CONFIG_SYS_FSL_ERRATUM_A004477
243be8e2 233
9bb1d6bc 234#elif defined(CONFIG_ARCH_P1023)
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235#define CONFIG_MAX_CPUS 2
236#define CONFIG_SYS_FSL_NUM_LAWS 12
237#define CONFIG_SYS_FSL_SEC_COMPAT 4
238#define CONFIG_SYS_NUM_FMAN 1
239#define CONFIG_SYS_NUM_FM1_DTSEC 2
240#define CONFIG_NUM_DDR_CONTROLLERS 1
f1810d85 241#define CONFIG_USB_MAX_CONTROLLER_COUNT 1
67a719da
RZ
242#define CONFIG_SYS_QMAN_NUM_PORTALS 3
243#define CONFIG_SYS_BMAN_NUM_PORTALS 3
c657d898 244#define CONFIG_SYS_FM_MURAM_SIZE 0x10000
8f29084a 245#define CONFIG_SYS_FSL_PCIE_COMPAT "fsl,qoriq-pcie-v2.2"
e46fedfe 246#define CONFIG_SYS_CCSRBAR_DEFAULT 0xff600000
9855b3be 247#define CONFIG_SYS_FSL_ERRATUM_A004508
954a1a47 248#define CONFIG_SYS_FSL_ERRATUM_A005125
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CL
249#define CONFIG_SYS_FSL_ERRATUM_I2C_A004447
250#define CONFIG_SYS_FSL_A004447_SVR_REV 0x11
67a719da 251
093cffbe 252/* P1024 is lower end variant of P1020 */
52b6f13d 253#elif defined(CONFIG_ARCH_P1024)
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254#define CONFIG_MAX_CPUS 2
255#define CONFIG_SYS_FSL_NUM_LAWS 12
ad75d442 256#define CONFIG_SYS_PPC_E500_DEBUG_TLB 2
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257#define CONFIG_TSECV2
258#define CONFIG_FSL_PCIE_DISABLE_ASPM
259#define CONFIG_SYS_FSL_SEC_COMPAT 2
f1810d85 260#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
e46fedfe 261#define CONFIG_SYS_CCSRBAR_DEFAULT 0xff700000
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262#define CONFIG_SYS_FSL_ERRATUM_ELBC_A001
263#define CONFIG_SYS_FSL_ERRATUM_ESDHC111
9855b3be 264#define CONFIG_SYS_FSL_ERRATUM_A004508
954a1a47 265#define CONFIG_SYS_FSL_ERRATUM_A005125
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266
267/* P1025 is lower end variant of P1021 */
4167a67d 268#elif defined(CONFIG_ARCH_P1025)
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269#define CONFIG_MAX_CPUS 2
270#define CONFIG_SYS_FSL_NUM_LAWS 12
1ff10a87 271#define CONFIG_USB_MAX_CONTROLLER_COUNT 1
ad75d442 272#define CONFIG_SYS_PPC_E500_DEBUG_TLB 2
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273#define CONFIG_TSECV2
274#define CONFIG_FSL_PCIE_DISABLE_ASPM
275#define CONFIG_SYS_FSL_SEC_COMPAT 2
e46fedfe 276#define CONFIG_SYS_CCSRBAR_DEFAULT 0xff700000
093cffbe
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277#define CONFIG_SYS_FSL_ERRATUM_ELBC_A001
278#define CONFIG_SYS_FSL_ERRATUM_ESDHC111
a52d2f81
HW
279#define QE_MURAM_SIZE 0x6000UL
280#define MAX_QE_RISC 1
281#define QE_NUM_OF_SNUM 28
9855b3be 282#define CONFIG_SYS_FSL_ERRATUM_A004508
954a1a47 283#define CONFIG_SYS_FSL_ERRATUM_A005125
093cffbe 284
4593637b 285#elif defined(CONFIG_ARCH_P2020)
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286#define CONFIG_MAX_CPUS 2
287#define CONFIG_SYS_FSL_NUM_LAWS 12
ad75d442 288#define CONFIG_SYS_PPC_E500_DEBUG_TLB 2
243be8e2 289#define CONFIG_SYS_FSL_SEC_COMPAT 2
e46fedfe 290#define CONFIG_SYS_CCSRBAR_DEFAULT 0xff700000
6e7f0bc0 291#define CONFIG_SYS_FSL_ERRATUM_ESDHC111
5103a03a 292#define CONFIG_SYS_FSL_ERRATUM_ESDHC_A001
7d67ed58
LG
293#define CONFIG_SYS_FSL_SRIO_MAX_PORTS 2
294#define CONFIG_SYS_FSL_SRIO_OB_WIN_NUM 9
295#define CONFIG_SYS_FSL_SRIO_IB_WIN_NUM 5
296#define CONFIG_SYS_FSL_RMU
297#define CONFIG_SYS_FSL_SRIO_MSG_UNIT_NUM 2
9855b3be 298#define CONFIG_SYS_FSL_ERRATUM_A004508
954a1a47 299#define CONFIG_SYS_FSL_ERRATUM_A005125
0dc78ff8 300#define CONFIG_SYS_FSL_ERRATUM_A004477
f1810d85 301#define CONFIG_USB_MAX_CONTROLLER_COUNT 1
9855b3be 302
ce040c83 303#elif defined(CONFIG_ARCH_P2041) /* also supports P2040 */
d1001e3f 304#define CONFIG_SYS_FSL_QORIQ_CHASSIS1
d2ab4bbc 305#define CONFIG_FSL_CORENET /* Freescale CoreNet platform */
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306#define CONFIG_MAX_CPUS 4
307#define CONFIG_SYS_FSL_NUM_CC_PLLS 2
308#define CONFIG_SYS_FSL_NUM_LAWS 32
309#define CONFIG_SYS_FSL_SEC_COMPAT 4
310#define CONFIG_SYS_NUM_FMAN 1
311#define CONFIG_SYS_NUM_FM1_DTSEC 5
312#define CONFIG_SYS_NUM_FM1_10GEC 1
313#define CONFIG_NUM_DDR_CONTROLLERS 1
f1810d85 314#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
1f97987a
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315#define CONFIG_SYS_FM_MURAM_SIZE 0x28000
316#define CONFIG_SYS_FSL_TBCLK_DIV 32
317#define CONFIG_SYS_FSL_PCIE_COMPAT "fsl,qoriq-pcie-v2.2"
e46fedfe 318#define CONFIG_SYS_CCSRBAR_DEFAULT 0xfe000000
1f97987a
KG
319#define CONFIG_SYS_FSL_USB1_PHY_ENABLE
320#define CONFIG_SYS_FSL_USB2_PHY_ENABLE
b6c3722d 321#define CONFIG_SYS_FSL_USB_INTERNAL_UTMI_PHY
1f97987a 322#define CONFIG_SYS_FSL_ERRATUM_ESDHC111
5e23ab0a 323#define CONFIG_SYS_FSL_ERRATUM_NMG_CPU_A011
99d7b0a4 324#define CONFIG_SYS_FSL_ERRATUM_USB14
43f082bb 325#define CONFIG_SYS_FSL_ERRATUM_CPU_A003999
e22be77a 326#define CONFIG_SYS_FSL_ERRATUM_DDR_A003
4108508a 327#define CONFIG_SYS_FSL_ERRATUM_DDR_A003474
7d67ed58
LG
328#define CONFIG_SYS_FSL_SRIO_MAX_PORTS 2
329#define CONFIG_SYS_FSL_SRIO_OB_WIN_NUM 9
330#define CONFIG_SYS_FSL_SRIO_IB_WIN_NUM 5
33eee330
SW
331#define CONFIG_SYS_FSL_ERRATUM_A004510
332#define CONFIG_SYS_FSL_ERRATUM_A004510_SVR_REV 0x10
333#define CONFIG_SYS_FSL_ERRATUM_A004510_SVR_REV2 0x11
334#define CONFIG_SYS_FSL_CORENET_SNOOPVEC_COREONLY 0xf0000000
d59c5570 335#define CONFIG_SYS_FSL_ERRATUM_SRIO_A004034
0118033b 336#define CONFIG_SYS_FSL_ERRATUM_A004849
9c3f77eb 337#define CONFIG_SYS_FSL_ERRATUM_I2C_A004447
9c641a87 338#define CONFIG_SYS_FSL_ERRATUM_A006261
9c3f77eb 339#define CONFIG_SYS_FSL_A004447_SVR_REV 0x11
1f97987a 340
5e5fdd2d 341#elif defined(CONFIG_ARCH_P3041)
d1001e3f 342#define CONFIG_SYS_FSL_QORIQ_CHASSIS1
d2ab4bbc 343#define CONFIG_FSL_CORENET /* Freescale CoreNet platform */
243be8e2 344#define CONFIG_MAX_CPUS 4
b5c8753f 345#define CONFIG_SYS_FSL_NUM_CC_PLLS 2
243be8e2
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346#define CONFIG_SYS_FSL_NUM_LAWS 32
347#define CONFIG_SYS_FSL_SEC_COMPAT 4
fbee0f7f
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348#define CONFIG_SYS_NUM_FMAN 1
349#define CONFIG_SYS_NUM_FM1_DTSEC 5
350#define CONFIG_SYS_NUM_FM1_10GEC 1
351#define CONFIG_NUM_DDR_CONTROLLERS 1
34e026f9 352#define CONFIG_SYS_FSL_DDR_VER FSL_DDR_VER_4_5
c657d898 353#define CONFIG_SYS_FM_MURAM_SIZE 0x28000
66412c63 354#define CONFIG_SYS_FSL_TBCLK_DIV 32
8f29084a 355#define CONFIG_SYS_FSL_PCIE_COMPAT "fsl,qoriq-pcie-v2.2"
e46fedfe 356#define CONFIG_SYS_CCSRBAR_DEFAULT 0xfe000000
86221f09
RZ
357#define CONFIG_SYS_FSL_USB1_PHY_ENABLE
358#define CONFIG_SYS_FSL_USB2_PHY_ENABLE
b6c3722d 359#define CONFIG_SYS_FSL_USB_INTERNAL_UTMI_PHY
f1810d85 360#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
30009766 361#define CONFIG_SYS_FSL_ERRATUM_ESDHC111
57125f22 362#define CONFIG_SYS_FSL_ERRATUM_NMG_CPU_A011
99d7b0a4 363#define CONFIG_SYS_FSL_ERRATUM_USB14
43f082bb 364#define CONFIG_SYS_FSL_ERRATUM_CPU_A003999
e22be77a 365#define CONFIG_SYS_FSL_ERRATUM_DDR_A003
4108508a 366#define CONFIG_SYS_FSL_ERRATUM_DDR_A003474
7d67ed58
LG
367#define CONFIG_SYS_FSL_SRIO_MAX_PORTS 2
368#define CONFIG_SYS_FSL_SRIO_OB_WIN_NUM 9
369#define CONFIG_SYS_FSL_SRIO_IB_WIN_NUM 5
33eee330
SW
370#define CONFIG_SYS_FSL_ERRATUM_A004510
371#define CONFIG_SYS_FSL_ERRATUM_A004510_SVR_REV 0x10
372#define CONFIG_SYS_FSL_ERRATUM_A004510_SVR_REV2 0x11
373#define CONFIG_SYS_FSL_CORENET_SNOOPVEC_COREONLY 0xf0000000
d59c5570 374#define CONFIG_SYS_FSL_ERRATUM_SRIO_A004034
0118033b 375#define CONFIG_SYS_FSL_ERRATUM_A004849
d217a9ad 376#define CONFIG_SYS_FSL_ERRATUM_A005812
9c3f77eb 377#define CONFIG_SYS_FSL_ERRATUM_I2C_A004447
9c641a87 378#define CONFIG_SYS_FSL_ERRATUM_A006261
9c3f77eb 379#define CONFIG_SYS_FSL_A004447_SVR_REV 0x20
243be8e2 380
e71372cb 381#elif defined(CONFIG_ARCH_P4080) /* also supports P4040 */
d1001e3f 382#define CONFIG_SYS_FSL_QORIQ_CHASSIS1
d2ab4bbc 383#define CONFIG_FSL_CORENET /* Freescale CoreNet platform */
243be8e2 384#define CONFIG_MAX_CPUS 8
b5c8753f 385#define CONFIG_SYS_FSL_NUM_CC_PLLS 4
243be8e2
KG
386#define CONFIG_SYS_FSL_NUM_LAWS 32
387#define CONFIG_SYS_FSL_SEC_COMPAT 4
388#define CONFIG_SYS_NUM_FMAN 2
389#define CONFIG_SYS_NUM_FM1_DTSEC 4
390#define CONFIG_SYS_NUM_FM2_DTSEC 4
391#define CONFIG_SYS_NUM_FM1_10GEC 1
392#define CONFIG_SYS_NUM_FM2_10GEC 1
393#define CONFIG_NUM_DDR_CONTROLLERS 2
34e026f9 394#define CONFIG_SYS_FSL_DDR_VER FSL_DDR_VER_4_4
f1810d85 395#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
c657d898 396#define CONFIG_SYS_FM_MURAM_SIZE 0x28000
66412c63 397#define CONFIG_SYS_FSL_TBCLK_DIV 16
8f29084a 398#define CONFIG_SYS_FSL_PCIE_COMPAT "fsl,p4080-pcie"
e46fedfe 399#define CONFIG_SYS_CCSRBAR_DEFAULT 0xfe000000
243be8e2
KG
400#define CONFIG_SYS_FSL_ERRATUM_CPC_A002
401#define CONFIG_SYS_FSL_ERRATUM_CPC_A003
fa8d23c0 402#define CONFIG_SYS_FSL_ERRATUM_DDR_A003
243be8e2
KG
403#define CONFIG_SYS_FSL_ERRATUM_ELBC_A001
404#define CONFIG_SYS_FSL_ERRATUM_ESDHC111
405#define CONFIG_SYS_FSL_ERRATUM_ESDHC135
4e0be34a 406#define CONFIG_SYS_FSL_ERRATUM_ESDHC13
243be8e2 407#define CONFIG_SYS_P4080_ERRATUM_CPU22
5e23ab0a 408#define CONFIG_SYS_FSL_ERRATUM_NMG_CPU_A011
243be8e2 409#define CONFIG_SYS_P4080_ERRATUM_SERDES8
df8af0b4 410#define CONFIG_SYS_P4080_ERRATUM_SERDES9
d90fdba6 411#define CONFIG_SYS_P4080_ERRATUM_SERDES_A001
da30b9fd 412#define CONFIG_SYS_P4080_ERRATUM_SERDES_A005
43f082bb 413#define CONFIG_SYS_FSL_ERRATUM_CPU_A003999
4108508a 414#define CONFIG_SYS_FSL_ERRATUM_DDR_A003474
7d67ed58
LG
415#define CONFIG_SYS_FSL_SRIO_MAX_PORTS 2
416#define CONFIG_SYS_FSL_SRIO_OB_WIN_NUM 9
417#define CONFIG_SYS_FSL_SRIO_IB_WIN_NUM 5
418#define CONFIG_SYS_FSL_RMU
419#define CONFIG_SYS_FSL_SRIO_MSG_UNIT_NUM 2
33eee330
SW
420#define CONFIG_SYS_FSL_ERRATUM_A004510
421#define CONFIG_SYS_FSL_ERRATUM_A004510_SVR_REV 0x20
422#define CONFIG_SYS_FSL_CORENET_SNOOPVEC_COREONLY 0xff000000
d59c5570 423#define CONFIG_SYS_FSL_ERRATUM_SRIO_A004034
0118033b 424#define CONFIG_SYS_FSL_ERRATUM_A004849
d607b968 425#define CONFIG_SYS_FSL_ERRATUM_A004580
c0a4e6b8 426#define CONFIG_SYS_P4080_ERRATUM_PCIE_A003
d217a9ad 427#define CONFIG_SYS_FSL_ERRATUM_A005812
9c3f77eb 428#define CONFIG_SYS_FSL_ERRATUM_I2C_A004447
11856919 429#define CONFIG_SYS_FSL_ERRATUM_A007075
9c3f77eb 430#define CONFIG_SYS_FSL_A004447_SVR_REV 0x20
243be8e2 431
3e978f5d 432#elif defined(CONFIG_PPC_P5020) /* also supports P5010 */
ffd06e02 433#define CONFIG_SYS_PPC64 /* 64-bit core */
d1001e3f 434#define CONFIG_SYS_FSL_QORIQ_CHASSIS1
d2ab4bbc 435#define CONFIG_FSL_CORENET /* Freescale CoreNet platform */
243be8e2 436#define CONFIG_MAX_CPUS 2
b5c8753f 437#define CONFIG_SYS_FSL_NUM_CC_PLLS 2
243be8e2
KG
438#define CONFIG_SYS_FSL_NUM_LAWS 32
439#define CONFIG_SYS_FSL_SEC_COMPAT 4
fbee0f7f
KG
440#define CONFIG_SYS_NUM_FMAN 1
441#define CONFIG_SYS_NUM_FM1_DTSEC 5
442#define CONFIG_SYS_NUM_FM1_10GEC 1
443#define CONFIG_NUM_DDR_CONTROLLERS 2
34e026f9 444#define CONFIG_SYS_FSL_DDR_VER FSL_DDR_VER_4_4
f1810d85 445#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
c657d898 446#define CONFIG_SYS_FM_MURAM_SIZE 0x28000
66412c63 447#define CONFIG_SYS_FSL_TBCLK_DIV 32
8f29084a 448#define CONFIG_SYS_FSL_PCIE_COMPAT "fsl,qoriq-pcie-v2.2"
e46fedfe 449#define CONFIG_SYS_CCSRBAR_DEFAULT 0xfe000000
86221f09
RZ
450#define CONFIG_SYS_FSL_USB1_PHY_ENABLE
451#define CONFIG_SYS_FSL_USB2_PHY_ENABLE
b6c3722d 452#define CONFIG_SYS_FSL_USB_INTERNAL_UTMI_PHY
30009766 453#define CONFIG_SYS_FSL_ERRATUM_ESDHC111
99d7b0a4 454#define CONFIG_SYS_FSL_ERRATUM_USB14
e22be77a 455#define CONFIG_SYS_FSL_ERRATUM_DDR_A003
4108508a 456#define CONFIG_SYS_FSL_ERRATUM_DDR_A003474
7d67ed58
LG
457#define CONFIG_SYS_FSL_SRIO_MAX_PORTS 2
458#define CONFIG_SYS_FSL_SRIO_OB_WIN_NUM 9
459#define CONFIG_SYS_FSL_SRIO_IB_WIN_NUM 5
33eee330
SW
460#define CONFIG_SYS_FSL_ERRATUM_A004510
461#define CONFIG_SYS_FSL_ERRATUM_A004510_SVR_REV 0x10
462#define CONFIG_SYS_FSL_CORENET_SNOOPVEC_COREONLY 0xc0000000
d59c5570 463#define CONFIG_SYS_FSL_ERRATUM_SRIO_A004034
9c3f77eb 464#define CONFIG_SYS_FSL_ERRATUM_I2C_A004447
9c641a87 465#define CONFIG_SYS_FSL_ERRATUM_A006261
9c3f77eb 466#define CONFIG_SYS_FSL_A004447_SVR_REV 0x20
243be8e2 467
4905443f 468#elif defined(CONFIG_PPC_P5040)
1956e431 469#define CONFIG_SYS_PPC64
4905443f 470#define CONFIG_SYS_FSL_QORIQ_CHASSIS1
d2ab4bbc 471#define CONFIG_FSL_CORENET /* Freescale CoreNet platform */
4905443f
TT
472#define CONFIG_MAX_CPUS 4
473#define CONFIG_SYS_FSL_NUM_CC_PLLS 3
474#define CONFIG_SYS_FSL_NUM_LAWS 32
475#define CONFIG_SYS_FSL_SEC_COMPAT 4
476#define CONFIG_SYS_NUM_FMAN 2
477#define CONFIG_SYS_NUM_FM1_DTSEC 5
478#define CONFIG_SYS_NUM_FM1_10GEC 1
479#define CONFIG_SYS_NUM_FM2_DTSEC 5
480#define CONFIG_SYS_NUM_FM2_10GEC 1
481#define CONFIG_NUM_DDR_CONTROLLERS 2
34e026f9 482#define CONFIG_SYS_FSL_DDR_VER FSL_DDR_VER_4_4
f1810d85 483#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
4905443f
TT
484#define CONFIG_SYS_FM_MURAM_SIZE 0x28000
485#define CONFIG_SYS_FSL_TBCLK_DIV 16
486#define CONFIG_SYS_FSL_PCIE_COMPAT "fsl,qoriq-pcie-v2.4"
487#define CONFIG_SYS_CCSRBAR_DEFAULT 0xfe000000
488#define CONFIG_SYS_FSL_USB1_PHY_ENABLE
489#define CONFIG_SYS_FSL_USB2_PHY_ENABLE
490#define CONFIG_SYS_FSL_USB_INTERNAL_UTMI_PHY
491#define CONFIG_SYS_FSL_ERRATUM_ESDHC111
99d7b0a4 492#define CONFIG_SYS_FSL_ERRATUM_USB14
4905443f
TT
493#define CONFIG_SYS_FSL_ERRATUM_DDR_A003
494#define CONFIG_SYS_FSL_ERRATUM_DDR_A003474
495#define CONFIG_SYS_FSL_ERRATUM_A004699
4905443f
TT
496#define CONFIG_SYS_FSL_ERRATUM_A004510
497#define CONFIG_SYS_FSL_ERRATUM_A004510_SVR_REV 0x10
9c641a87 498#define CONFIG_SYS_FSL_ERRATUM_A006261
4905443f 499#define CONFIG_SYS_FSL_CORENET_SNOOPVEC_COREONLY 0xf0000000
d217a9ad 500#define CONFIG_SYS_FSL_ERRATUM_A005812
4905443f 501
115d60c0 502#elif defined(CONFIG_ARCH_BSC9131)
19a8dbdc
PK
503#define CONFIG_MAX_CPUS 1
504#define CONFIG_FSL_SDHC_V2_3
505#define CONFIG_SYS_FSL_NUM_LAWS 12
506#define CONFIG_TSECV2
507#define CONFIG_SYS_FSL_SEC_COMPAT 4
508#define CONFIG_NUM_DDR_CONTROLLERS 1
34e026f9 509#define CONFIG_SYS_FSL_DDR_VER FSL_DDR_VER_4_4
f1810d85 510#define CONFIG_USB_MAX_CONTROLLER_COUNT 1
765b0bdb
PJ
511#define CONFIG_SYS_FSL_DSP_M2_RAM_ADDR 0xb0000000
512#define CONFIG_SYS_FSL_DSP_CCSRBAR_DEFAULT 0xff600000
362ee04b 513#define CONFIG_SYS_FSL_IFC_BANK_COUNT 3
19a8dbdc
PK
514#define CONFIG_SYS_CCSRBAR_DEFAULT 0xff700000
515#define CONFIG_NAND_FSL_IFC
19a8dbdc 516#define CONFIG_SYS_FSL_ERRATUM_ESDHC111
954a1a47 517#define CONFIG_SYS_FSL_ERRATUM_A005125
0dc78ff8 518#define CONFIG_SYS_FSL_ERRATUM_A004477
f28bea00 519#define CONFIG_ESDHC_HC_BLK_ADDR
19a8dbdc 520
115d60c0 521#elif defined(CONFIG_ARCH_BSC9132)
35fe948e
PK
522#define CONFIG_MAX_CPUS 2
523#define CONFIG_SYS_PPC_E500_DEBUG_TLB 3
524#define CONFIG_FSL_SDHC_V2_3
525#define CONFIG_SYS_FSL_NUM_LAWS 12
526#define CONFIG_TSECV2
527#define CONFIG_SYS_FSL_SEC_COMPAT 4
528#define CONFIG_NUM_DDR_CONTROLLERS 2
34e026f9 529#define CONFIG_SYS_FSL_DDR_VER FSL_DDR_VER_4_6
f1810d85 530#define CONFIG_USB_MAX_CONTROLLER_COUNT 1
64501c66
PJ
531#define CONFIG_SYS_FSL_DSP_DDR_ADDR 0x40000000
532#define CONFIG_SYS_FSL_DSP_M2_RAM_ADDR 0xb0000000
533#define CONFIG_SYS_FSL_DSP_M3_RAM_ADDR 0xc0000000
534#define CONFIG_SYS_FSL_DSP_CCSRBAR_DEFAULT 0xff600000
061ffeda 535#define CONFIG_SYS_FSL_IFC_BANK_COUNT 3
35fe948e
PK
536#define CONFIG_SYS_CCSRBAR_DEFAULT 0xff700000
537#define CONFIG_NAND_FSL_IFC
35fe948e
PK
538#define CONFIG_SYS_FSL_ERRATUM_ESDHC111
539#define CONFIG_SYS_FSL_ESDHC_P1010_BROKEN_SDCLK
540#define CONFIG_SYS_FSL_PCIE_COMPAT "fsl,qoriq-pcie-v2.2"
954a1a47 541#define CONFIG_SYS_FSL_ERRATUM_A005125
f1a96ec1 542#define CONFIG_SYS_FSL_ERRATUM_A005434
0dc78ff8 543#define CONFIG_SYS_FSL_ERRATUM_A004477
9c3f77eb
CL
544#define CONFIG_SYS_FSL_ERRATUM_I2C_A004447
545#define CONFIG_SYS_FSL_A004447_SVR_REV 0x11
f28bea00 546#define CONFIG_ESDHC_HC_BLK_ADDR
35fe948e 547
5122dfae
SL
548#elif defined(CONFIG_PPC_T4240) || defined(CONFIG_PPC_T4160) || \
549 defined(CONFIG_PPC_T4080)
3d2972fe 550#define CONFIG_E6500
ffd06e02 551#define CONFIG_SYS_PPC64 /* 64-bit core */
9e758758
YS
552#define CONFIG_FSL_CORENET /* Freescale CoreNet platform */
553#define CONFIG_SYS_FSL_QORIQ_CHASSIS2 /* Freescale Chassis generation 2 */
f6981439 554#define CONFIG_SYS_FSL_CORES_PER_CLUSTER 4
9e758758 555#define CONFIG_SYS_FSL_QMAN_V3 /* QMAN version 3 */
3d2972fe 556#ifdef CONFIG_PPC_T4240
9e758758 557#define CONFIG_MAX_CPUS 12
ce746fe0 558#define CONFIG_SYS_FSL_CLUSTER_CLOCKS { 1, 1, 4 }
9e758758
YS
559#define CONFIG_SYS_NUM_FM1_DTSEC 8
560#define CONFIG_SYS_NUM_FM1_10GEC 2
561#define CONFIG_SYS_NUM_FM2_DTSEC 8
562#define CONFIG_SYS_NUM_FM2_10GEC 2
563#define CONFIG_NUM_DDR_CONTROLLERS 3
f413d1ca 564#define CONFIG_SYS_FSL_ERRATUM_A006261
3d2972fe 565#else
5122dfae 566#define CONFIG_SYS_NUM_FM1_DTSEC 6
3d2972fe 567#define CONFIG_SYS_NUM_FM1_10GEC 1
5122dfae 568#define CONFIG_SYS_NUM_FM2_DTSEC 8
3d2972fe
YS
569#define CONFIG_SYS_NUM_FM2_10GEC 1
570#define CONFIG_NUM_DDR_CONTROLLERS 2
5122dfae
SL
571#if defined(CONFIG_PPC_T4160)
572#define CONFIG_MAX_CPUS 8
573#define CONFIG_SYS_FSL_CLUSTER_CLOCKS { 1, 1 }
574#elif defined(CONFIG_PPC_T4080)
575#define CONFIG_MAX_CPUS 4
576#define CONFIG_SYS_FSL_CLUSTER_CLOCKS { 1 }
577#endif
3d2972fe 578#endif
b6240846
YS
579#define CONFIG_SYS_FSL_NUM_CC_PLLS 5
580#define CONFIG_SYS_FSL_NUM_LAWS 32
a4c955bc
PK
581#define CONFIG_SYS_FSL_SRDS_1
582#define CONFIG_SYS_FSL_SRDS_2
b6240846
YS
583#define CONFIG_SYS_FSL_SRDS_3
584#define CONFIG_SYS_FSL_SRDS_4
585#define CONFIG_SYS_FSL_SEC_COMPAT 4
586#define CONFIG_SYS_NUM_FMAN 2
f1810d85 587#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
ce746fe0 588#define CONFIG_SYS_PME_CLK 0
b6240846 589#define CONFIG_SYS_FSL_DDR_VER FSL_DDR_VER_4_7
362ee04b 590#define CONFIG_SYS_FSL_IFC_BANK_COUNT 8
b6240846 591#define CONFIG_SYS_FMAN_V3
ce746fe0
PK
592#define CONFIG_SYS_FM1_CLK 3
593#define CONFIG_SYS_FM2_CLK 3
b6240846
YS
594#define CONFIG_SYS_FM_MURAM_SIZE 0x60000
595#define CONFIG_SYS_FSL_TBCLK_DIV 16
596#define CONFIG_SYS_FSL_PCIE_COMPAT "fsl,qoriq-pcie-v3.0"
597#define CONFIG_SYS_FSL_SRIO_MAX_PORTS 2
598#define CONFIG_SYS_FSL_SRIO_OB_WIN_NUM 9
599#define CONFIG_SYS_FSL_SRIO_IB_WIN_NUM 5
08047937 600#define CONFIG_SYS_FSL_SRIO_LIODN
b6240846
YS
601#define CONFIG_SYS_FSL_USB_DUAL_PHY_ENABLE
602#define CONFIG_SYS_FSL_USB_INTERNAL_UTMI_PHY
603#define CONFIG_SYS_FSL_ERRATUM_A004468
604#define CONFIG_SYS_FSL_ERRATUM_A_004934
605#define CONFIG_SYS_FSL_ERRATUM_A005871
133fbfa9 606#define CONFIG_SYS_FSL_ERRATUM_A006379
b6808cd8 607#define CONFIG_SYS_FSL_ERRATUM_A007186
82125192 608#define CONFIG_SYS_FSL_ERRATUM_A006593
f3dff695 609#define CONFIG_SYS_FSL_ERRATUM_A007798
b6240846 610#define CONFIG_SYS_CCSRBAR_DEFAULT 0xfe000000
b6808cd8 611#define CONFIG_SYS_FSL_SFP_VER_3_0
b6240846
YS
612#define CONFIG_SYS_FSL_PCI_VER_3_X
613
8fa0102b
PA
614#elif defined(CONFIG_PPC_B4860) || defined(CONFIG_PPC_B4420)
615#define CONFIG_E6500
e1dbdd81
PA
616#define CONFIG_SYS_PPC64 /* 64-bit core */
617#define CONFIG_FSL_CORENET /* Freescale CoreNet platform */
618#define CONFIG_SYS_FSL_QORIQ_CHASSIS2 /* Freescale Chassis generation 2 */
619#define CONFIG_SYS_FSL_QMAN_V3 /* QMAN version 3 */
b8bf0adc
SL
620#define CONFIG_HETROGENOUS_CLUSTERS /* DSP/SC3900 core clusters */
621#define CONFIG_PPC_CLUSTER_START 0 /*Start index of ppc clusters*/
622#define CONFIG_DSP_CLUSTER_START 1 /*Start index of dsp clusters*/
e1dbdd81 623#define CONFIG_SYS_FSL_NUM_LAWS 32
a4c955bc
PK
624#define CONFIG_SYS_FSL_SRDS_1
625#define CONFIG_SYS_FSL_SRDS_2
b8bf0adc
SL
626#define CONFIG_SYS_MAPLE
627#define CONFIG_SYS_CPRI
628#define CONFIG_SYS_FSL_NUM_CC_PLLS 5
e1dbdd81
PA
629#define CONFIG_SYS_FSL_SEC_COMPAT 4
630#define CONFIG_SYS_NUM_FMAN 1
f1810d85 631#define CONFIG_USB_MAX_CONTROLLER_COUNT 1
ce746fe0 632#define CONFIG_SYS_FM1_CLK 0
b8bf0adc
SL
633#define CONFIG_SYS_CPRI_CLK 3
634#define CONFIG_SYS_ULB_CLK 4
635#define CONFIG_SYS_ETVPE_CLK 1
e1dbdd81 636#define CONFIG_SYS_FSL_DDR_VER FSL_DDR_VER_4_7
362ee04b 637#define CONFIG_SYS_FSL_IFC_BANK_COUNT 4
e1dbdd81
PA
638#define CONFIG_SYS_FMAN_V3
639#define CONFIG_SYS_FM_MURAM_SIZE 0x60000
640#define CONFIG_SYS_FSL_TBCLK_DIV 16
641#define CONFIG_SYS_FSL_PCIE_COMPAT "fsl,qoriq-pcie-v2.4"
642#define CONFIG_SYS_FSL_USB1_PHY_ENABLE
643#define CONFIG_SYS_FSL_ERRATUM_A_004934
04feb57f 644#define CONFIG_SYS_FSL_ERRATUM_A005871
133fbfa9 645#define CONFIG_SYS_FSL_ERRATUM_A006379
b6808cd8 646#define CONFIG_SYS_FSL_ERRATUM_A007186
82125192 647#define CONFIG_SYS_FSL_ERRATUM_A006593
11856919 648#define CONFIG_SYS_FSL_ERRATUM_A007075
7af9a074
SL
649#define CONFIG_SYS_FSL_ERRATUM_A006475
650#define CONFIG_SYS_FSL_ERRATUM_A006384
c3678b09 651#define CONFIG_SYS_FSL_ERRATUM_A007212
0dc78ff8 652#define CONFIG_SYS_FSL_ERRATUM_A004477
e1dbdd81 653#define CONFIG_SYS_CCSRBAR_DEFAULT 0xfe000000
b6808cd8 654#define CONFIG_SYS_FSL_SFP_VER_3_0
e1dbdd81 655
8fa0102b 656#ifdef CONFIG_PPC_B4860
f6981439 657#define CONFIG_SYS_FSL_CORES_PER_CLUSTER 4
d2404141 658#define CONFIG_MAX_CPUS 4
b8bf0adc
SL
659#define CONFIG_MAX_DSP_CPUS 12
660#define CONFIG_NUM_DSP_CPUS 6
6df82e3c 661#define CONFIG_SYS_FSL_SRDS_NUM_PLLS 2
ce746fe0 662#define CONFIG_SYS_FSL_CLUSTER_CLOCKS { 1, 4, 4, 4 }
d2404141
YS
663#define CONFIG_SYS_NUM_FM1_DTSEC 6
664#define CONFIG_SYS_NUM_FM1_10GEC 2
e394ceb1 665#define CONFIG_NUM_DDR_CONTROLLERS 2
f1810d85 666#define CONFIG_USB_MAX_CONTROLLER_COUNT 1
d2404141
YS
667#define CONFIG_SYS_FSL_SRIO_MAX_PORTS 2
668#define CONFIG_SYS_FSL_SRIO_OB_WIN_NUM 9
669#define CONFIG_SYS_FSL_SRIO_IB_WIN_NUM 5
32f38ee3 670#define CONFIG_SYS_FSL_SRIO_LIODN
8fa0102b
PA
671#else
672#define CONFIG_MAX_CPUS 2
b8bf0adc 673#define CONFIG_MAX_DSP_CPUS 2
6df82e3c 674#define CONFIG_SYS_FSL_SRDS_NUM_PLLS 1
8fa0102b 675#define CONFIG_SYS_FSL_CORES_PER_CLUSTER 2
ce746fe0 676#define CONFIG_SYS_FSL_CLUSTER_CLOCKS { 1, 4 }
8fa0102b
PA
677#define CONFIG_SYS_NUM_FM1_DTSEC 4
678#define CONFIG_SYS_NUM_FM1_10GEC 0
679#define CONFIG_NUM_DDR_CONTROLLERS 1
680#endif
d2404141 681
2967af68
PJ
682#elif defined(CONFIG_PPC_T1040) || defined(CONFIG_PPC_T1042) ||\
683defined(CONFIG_PPC_T1020) || defined(CONFIG_PPC_T1022)
5f208d11
YS
684#define CONFIG_E5500
685#define CONFIG_FSL_CORENET /* Freescale CoreNet platform */
686#define CONFIG_SYS_FSL_QORIQ_CHASSIS2 /* Freescale Chassis generation 2 */
f6981439 687#define CONFIG_SYS_FSL_CORES_PER_CLUSTER 1
5f208d11 688#define CONFIG_SYS_FSL_QMAN_V3 /* QMAN version 3 */
34e026f9
YS
689#ifdef CONFIG_SYS_FSL_DDR4
690#define CONFIG_SYS_FSL_DDRC_GEN4
691#endif
1d384eca 692#if defined(CONFIG_PPC_T1040) || defined(CONFIG_PPC_T1042)
5f208d11 693#define CONFIG_MAX_CPUS 4
1d384eca
PK
694#elif defined(CONFIG_PPC_T1020) || defined(CONFIG_PPC_T1022)
695#define CONFIG_MAX_CPUS 2
696#endif
697#define CONFIG_SYS_FSL_NUM_CC_PLLS 2
ce746fe0 698#define CONFIG_SYS_FSL_CLUSTER_CLOCKS { 1, 1, 1, 1 }
5f208d11 699#define CONFIG_SYS_FSL_NUM_LAWS 16
1d384eca
PK
700#define CONFIG_SYS_FSL_SRDS_1
701#define CONFIG_SYS_FSL_SEC_COMPAT 5
5f208d11
YS
702#define CONFIG_SYS_NUM_FMAN 1
703#define CONFIG_SYS_NUM_FM1_DTSEC 5
704#define CONFIG_NUM_DDR_CONTROLLERS 1
f1810d85 705#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
ce746fe0
PK
706#define CONFIG_PME_PLAT_CLK_DIV 2
707#define CONFIG_SYS_PME_CLK CONFIG_PME_PLAT_CLK_DIV
1d384eca
PK
708#define CONFIG_SYS_FSL_DDR_VER FSL_DDR_VER_5_0
709#define CONFIG_SYS_FSL_IFC_BANK_COUNT 8
9f074e67 710#define CONFIG_SYS_FSL_ERRATUM_A008044
5f208d11 711#define CONFIG_SYS_FMAN_V3
ce746fe0
PK
712#define CONFIG_FM_PLAT_CLK_DIV 1
713#define CONFIG_SYS_FM1_CLK CONFIG_FM_PLAT_CLK_DIV
2d9ca2c7
YL
714#define CONFIG_SYS_SDHC_CLK 0/* Select SDHC CLK begining from PLL1
715 per rcw field value */
716#define CONFIG_SYS_SDHC_CLK_2_PLL /* Select SDHC CLK from 2 PLLs */
1d384eca 717#define CONFIG_SYS_FM_MURAM_SIZE 0x30000
b135991a 718#define CONFIG_SYS_FSL_SINGLE_SOURCE_CLK
e03c76c3 719#define CONFIG_SYS_FSL_TBCLK_DIV 16
5f208d11 720#define CONFIG_SYS_FSL_PCIE_COMPAT "fsl,qoriq-pcie-v2.4"
a4f7cba6 721#define CONFIG_SYS_FSL_USB_DUAL_PHY_ENABLE
5f208d11
YS
722#define CONFIG_SYS_FSL_USB_INTERNAL_UTMI_PHY
723#define CONFIG_SYS_CCSRBAR_DEFAULT 0xfe000000
1336e2d3
HZ
724#define CONFIG_SYS_FSL_ERRATUM_ESDHC111
725#define ESDHCI_QUIRK_BROKEN_TIMEOUT_VALUE
2a44efeb
ZQ
726#define QE_MURAM_SIZE 0x6000UL
727#define MAX_QE_RISC 1
728#define QE_NUM_OF_SNUM 28
e622d9ed 729#define CONFIG_SYS_FSL_SFP_VER_3_0
a46b1852 730#define CONFIG_SYS_FSL_ERRATUM_A008378
a994b3de 731#define CONFIG_SYS_FSL_ERRATUM_A009663
5f208d11 732
f6050790
SL
733#elif defined(CONFIG_PPC_T1024) || defined(CONFIG_PPC_T1023) ||\
734defined(CONFIG_PPC_T1014) || defined(CONFIG_PPC_T1013)
735#define CONFIG_E5500
736#define CONFIG_FSL_CORENET /* Freescale CoreNet platform */
737#define CONFIG_SYS_FSL_QORIQ_CHASSIS2 /* Freescale Chassis generation 2 */
738#define CONFIG_SYS_FSL_CORES_PER_CLUSTER 1
739#define CONFIG_SYS_FSL_QMAN_V3 /* QMAN version 3 */
740#define CONFIG_SYS_FMAN_V3
741#ifdef CONFIG_SYS_FSL_DDR4
742#define CONFIG_SYS_FSL_DDRC_GEN4
743#endif
744#if defined(CONFIG_PPC_T1024) || defined(CONFIG_PPC_T1023)
745#define CONFIG_MAX_CPUS 2
746#elif defined(CONFIG_PPC_T1014) || defined(CONFIG_PPC_T1013)
747#define CONFIG_MAX_CPUS 1
748#endif
749#define CONFIG_SYS_FSL_NUM_CC_PLL 2
750#define CONFIG_SYS_FSL_CLUSTER_CLOCKS { 1, 1, 1, 1 }
f6050790
SL
751#define CONFIG_SYS_FSL_NUM_LAWS 16
752#define CONFIG_SYS_FSL_SRDS_1
753#define CONFIG_SYS_FSL_SEC_COMPAT 5
754#define CONFIG_SYS_NUM_FMAN 1
755#define CONFIG_SYS_NUM_FM1_DTSEC 4
756#define CONFIG_SYS_NUM_FM1_10GEC 1
cc19c25e 757#define CONFIG_FSL_FM_10GEC_REGULAR_NOTATION
f6050790
SL
758#define CONFIG_NUM_DDR_CONTROLLERS 1
759#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
760#define CONFIG_SYS_FSL_DDR_VER FSL_DDR_VER_5_0
761#define CONFIG_SYS_FSL_IFC_BANK_COUNT 8
762#define CONFIG_SYS_FM1_CLK 0
2d9ca2c7
YL
763#define CONFIG_SYS_SDHC_CLK 0/* Select SDHC CLK begining from PLL1
764 per rcw field value */
f6050790
SL
765#define CONFIG_QBMAN_CLK_DIV 1
766#define CONFIG_SYS_FM_MURAM_SIZE 0x30000
767#define CONFIG_SYS_FSL_SINGLE_SOURCE_CLK
768#define CONFIG_SYS_FSL_TBCLK_DIV 16
769#define CONFIG_SYS_FSL_PCIE_COMPAT "fsl,qoriq-pcie-v2.4"
770#define CONFIG_SYS_FSL_USB_DUAL_PHY_ENABLE
771#define CONFIG_SYS_FSL_USB_INTERNAL_UTMI_PHY
772#define CONFIG_SYS_CCSRBAR_DEFAULT 0xfe000000
773#define CONFIG_SYS_FSL_ERRATUM_ESDHC111
774#define ESDHCI_QUIRK_BROKEN_TIMEOUT_VALUE
775#define QE_MURAM_SIZE 0x6000UL
776#define MAX_QE_RISC 1
777#define QE_NUM_OF_SNUM 28
778#define CONFIG_SYS_FSL_SFP_VER_3_0
a46b1852 779#define CONFIG_SYS_FSL_ERRATUM_A008378
a994b3de 780#define CONFIG_SYS_FSL_ERRATUM_A009663
f6050790 781
629d6b32
SL
782#elif defined(CONFIG_PPC_T2080) || defined(CONFIG_PPC_T2081)
783#define CONFIG_E6500
784#define CONFIG_SYS_PPC64 /* 64-bit core */
785#define CONFIG_FSL_CORENET /* Freescale CoreNet platform */
786#define CONFIG_SYS_FSL_QORIQ_CHASSIS2 /* Freescale Chassis generation 2 */
787#define CONFIG_SYS_FSL_CORES_PER_CLUSTER 4
788#define CONFIG_SYS_FSL_NUM_CC_PLLS 2
789#define CONFIG_SYS_FSL_QMAN_V3
790#define CONFIG_MAX_CPUS 4
791#define CONFIG_SYS_FSL_NUM_LAWS 32
792#define CONFIG_SYS_FSL_SEC_COMPAT 4
793#define CONFIG_SYS_NUM_FMAN 1
794#define CONFIG_SYS_FSL_CLUSTER_CLOCKS { 1, 4, 4, 4 }
795#define CONFIG_SYS_FSL_SRDS_1
796#define CONFIG_SYS_FSL_PCI_VER_3_X
797#if defined(CONFIG_PPC_T2080)
798#define CONFIG_SYS_NUM_FM1_DTSEC 8
799#define CONFIG_SYS_NUM_FM1_10GEC 4
800#define CONFIG_SYS_FSL_SRDS_2
801#define CONFIG_SYS_FSL_SRIO_LIODN
802#define CONFIG_SYS_FSL_SRIO_MAX_PORTS 2
803#define CONFIG_SYS_FSL_SRIO_OB_WIN_NUM 9
804#define CONFIG_SYS_FSL_SRIO_IB_WIN_NUM 5
805#elif defined(CONFIG_PPC_T2081)
806#define CONFIG_SYS_NUM_FM1_DTSEC 6
807#define CONFIG_SYS_NUM_FM1_10GEC 2
808#endif
2ffa96d8 809#define CONFIG_USB_MAX_CONTROLLER_COUNT 2
629d6b32
SL
810#define CONFIG_NUM_DDR_CONTROLLERS 1
811#define CONFIG_PME_PLAT_CLK_DIV 1
812#define CONFIG_SYS_PME_CLK CONFIG_PME_PLAT_CLK_DIV
813#define CONFIG_SYS_FM1_CLK 0
2d9ca2c7
YL
814#define CONFIG_SYS_SDHC_CLK 1/* Select SDHC CLK begining from PLL2
815 per rcw field value */
816#define CONFIG_SYS_SDHC_CLK_2_PLL /* Select SDHC CLK from 2 PLLs */
629d6b32
SL
817#define CONFIG_SYS_FSL_DDR_VER FSL_DDR_VER_4_7
818#define CONFIG_SYS_FSL_IFC_BANK_COUNT 8
819#define CONFIG_SYS_FMAN_V3
820#define CONFIG_SYS_FM_MURAM_SIZE 0x28000
821#define CONFIG_SYS_FSL_TBCLK_DIV 16
822#define CONFIG_SYS_FSL_PCIE_COMPAT "fsl,qoriq-pcie-v3.0"
823#define CONFIG_SYS_FSL_USB_DUAL_PHY_ENABLE
824#define CONFIG_SYS_FSL_USB_INTERNAL_UTMI_PHY
c3678b09 825#define CONFIG_SYS_FSL_ERRATUM_A007212
629d6b32
SL
826#define CONFIG_SYS_CCSRBAR_DEFAULT 0xfe000000
827#define CONFIG_SYS_FSL_SFP_VER_3_0
828#define CONFIG_SYS_FSL_ISBC_VER 2
1336e2d3 829#define CONFIG_SYS_FSL_ERRATUM_ESDHC111
c665c473 830#define CONFIG_SYS_FSL_ERRATUM_A006593
b6808cd8 831#define CONFIG_SYS_FSL_ERRATUM_A007186
c665c473 832#define CONFIG_SYS_FSL_ERRATUM_A006379
1336e2d3 833#define ESDHCI_QUIRK_BROKEN_TIMEOUT_VALUE
b6808cd8 834#define CONFIG_SYS_FSL_SFP_VER_3_0
1336e2d3 835
629d6b32 836
4fd64746 837#elif defined(CONFIG_ARCH_C29X)
3b75e982
MH
838#define CONFIG_MAX_CPUS 1
839#define CONFIG_FSL_SDHC_V2_3
840#define CONFIG_SYS_FSL_NUM_LAWS 12
841#define CONFIG_SYS_PPC_E500_DEBUG_TLB 3
842#define CONFIG_TSECV2_1
843#define CONFIG_SYS_FSL_SEC_COMPAT 6
844#define CONFIG_SYS_FSL_ERRATUM_ESDHC111
845#define CONFIG_NUM_DDR_CONTROLLERS 1
34e026f9 846#define CONFIG_SYS_FSL_DDR_VER FSL_DDR_VER_4_6
3b75e982
MH
847#define CONFIG_SYS_FSL_IFC_BANK_COUNT 8
848#define CONFIG_SYS_CCSRBAR_DEFAULT 0xff700000
954a1a47 849#define CONFIG_SYS_FSL_ERRATUM_A005125
404bf454
AP
850#define CONFIG_SYS_FSL_MAX_NUM_OF_SEC 3
851#define CONFIG_SYS_FSL_SEC_IDX_OFFSET 0x20000
3b75e982 852
fa08d395
AG
853#elif defined(CONFIG_QEMU_E500)
854#define CONFIG_MAX_CPUS 1
855#define CONFIG_SYS_CCSRBAR_DEFAULT 0xe0000000
856
243be8e2
KG
857#else
858#error Processor type not defined for this platform
859#endif
860
e46fedfe
TT
861#ifndef CONFIG_SYS_CCSRBAR_DEFAULT
862#error "CONFIG_SYS_CCSRBAR_DEFAULT is not defined for this platform."
863#endif
864
f6981439
YS
865#ifdef CONFIG_E6500
866#define CONFIG_SYS_FSL_THREADS_PER_CORE 2
867#else
868#define CONFIG_SYS_FSL_THREADS_PER_CORE 1
869#endif
870
5614e71b
YS
871#if !defined(CONFIG_SYS_FSL_DDRC_GEN1) && \
872 !defined(CONFIG_SYS_FSL_DDRC_GEN2) && \
34e026f9
YS
873 !defined(CONFIG_SYS_FSL_DDRC_GEN3) && \
874 !defined(CONFIG_SYS_FSL_DDRC_GEN4)
5614e71b
YS
875#define CONFIG_SYS_FSL_DDRC_GEN3
876#endif
877
4fd64746 878#if !defined(CONFIG_ARCH_C29X)
404bf454
AP
879#define CONFIG_SYS_FSL_MAX_NUM_OF_SEC 1
880#endif
881
243be8e2 882#endif /* _ASM_MPC85xx_CONFIG_H_ */