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0157cedb WD |
1 | /* |
2 | * (C) Copyright 2002 | |
3 | * Wolfgang Denk, DENX Software Engineering, wd@denx.de. | |
4 | * | |
5 | * See file CREDITS for list of people who contributed to this | |
6 | * project. | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or | |
9 | * modify it under the terms of the GNU General Public License as | |
10 | * published by the Free Software Foundation; either version 2 of | |
11 | * the License, or (at your option) any later version. | |
12 | * | |
13 | * This program is distributed in the hope that it will be useful, | |
14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | * GNU General Public License for more details. | |
17 | * | |
18 | * You should have received a copy of the GNU General Public License | |
19 | * along with this program; if not, write to the Free Software | |
20 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, | |
21 | * MA 02111-1307 USA | |
22 | */ | |
23 | ||
24 | #ifndef __ASM_GBL_DATA_H | |
25 | #define __ASM_GBL_DATA_H | |
f046ccd1 | 26 | |
3469424c | 27 | #include "config.h" |
f046ccd1 EL |
28 | #include "asm/types.h" |
29 | ||
0157cedb WD |
30 | /* |
31 | * The following data structure is placed in some memory wich is | |
32 | * available very early after boot (like DPRAM on MPC8xx/MPC82xx, or | |
33 | * some locked parts of the data cache) to allow for a minimum set of | |
34 | * global variables during system initialization (until we have set | |
35 | * up the memory controller so that we can use RAM). | |
36 | * | |
6d0f6bcf | 37 | * Keep it *SMALL* and remember to set CONFIG_SYS_GBL_DATA_SIZE > sizeof(gd_t) |
0157cedb WD |
38 | */ |
39 | ||
40 | typedef struct global_data { | |
41 | bd_t *bd; | |
42 | unsigned long flags; | |
43 | unsigned long baudrate; | |
77ff7b74 | 44 | unsigned long cpu_clk; /* CPU clock in Hz! */ |
0157cedb | 45 | unsigned long bus_clk; |
77ff7b74 BD |
46 | #if defined(CONFIG_8xx) |
47 | unsigned long brg_clk; | |
48 | #endif | |
9c4c5ae3 | 49 | #if defined(CONFIG_CPM2) |
0157cedb WD |
50 | /* There are many clocks on the MPC8260 - see page 9-5 */ |
51 | unsigned long vco_out; | |
52 | unsigned long cpm_clk; | |
53 | unsigned long scc_clk; | |
54 | unsigned long brg_clk; | |
f2302d44 SR |
55 | #ifdef CONFIG_PCI |
56 | unsigned long pci_clk; | |
57 | #endif | |
945af8d7 | 58 | #endif |
4c52783b | 59 | unsigned long mem_clk; |
0f898604 | 60 | #if defined(CONFIG_MPC83xx) |
f046ccd1 EL |
61 | /* There are other clocks in the MPC83XX */ |
62 | u32 csb_clk; | |
2c7920af | 63 | #if defined(CONFIG_MPC834x) || defined(CONFIG_MPC831x) || defined(CONFIG_MPC837x) |
f046ccd1 EL |
64 | u32 tsec1_clk; |
65 | u32 tsec2_clk; | |
f046ccd1 | 66 | u32 usbdr_clk; |
0f253283 | 67 | #endif |
2c7920af | 68 | #if defined (CONFIG_MPC834x) |
0f253283 | 69 | u32 usbmph_clk; |
2c7920af | 70 | #endif /* CONFIG_MPC834x */ |
c86ef2cd | 71 | #if defined(CONFIG_MPC8315) |
555da617 | 72 | u32 tdm_clk; |
03051c3d | 73 | #endif |
5f820439 | 74 | u32 core_clk; |
f046ccd1 EL |
75 | u32 enc_clk; |
76 | u32 lbiu_clk; | |
77 | u32 lclk_clk; | |
6902df56 | 78 | u32 pci_clk; |
2c7920af | 79 | #if defined(CONFIG_MPC837x) || defined(CONFIG_MPC831x) |
03051c3d DL |
80 | u32 pciexp1_clk; |
81 | u32 pciexp2_clk; | |
555da617 | 82 | #endif |
2c7920af | 83 | #if defined(CONFIG_MPC837x) || defined(CONFIG_MPC8315) |
03051c3d DL |
84 | u32 sata_clk; |
85 | #endif | |
da9d4610 | 86 | #if defined(CONFIG_MPC8360) |
35cf155c | 87 | u32 mem_sec_clk; |
da9d4610 AF |
88 | #endif /* CONFIG_MPC8360 */ |
89 | #endif | |
728ece34 | 90 | #if defined(CONFIG_FSL_ESDHC) |
ef50d6c0 KG |
91 | u32 sdhc_clk; |
92 | #endif | |
ada591d2 TP |
93 | #if defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx) |
94 | u32 lbc_clk; | |
0e870980 | 95 | void *cpu; |
ada591d2 | 96 | #endif /* CONFIG_MPC85xx || CONFIG_MPC86xx */ |
0f898604 | 97 | #if defined(CONFIG_MPC83xx) || defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx) |
943afa22 TT |
98 | u32 i2c1_clk; |
99 | u32 i2c2_clk; | |
100 | #endif | |
5f820439 DL |
101 | #if defined(CONFIG_QE) |
102 | u32 qe_clk; | |
103 | u32 brg_clk; | |
7737d5c6 DL |
104 | uint mp_alloc_base; |
105 | uint mp_alloc_top; | |
5f820439 | 106 | #endif /* CONFIG_QE */ |
f060054d KG |
107 | #if defined(CONFIG_FSL_LAW) |
108 | u32 used_laws; | |
109 | #endif | |
94e9411b KG |
110 | #if defined(CONFIG_E500) |
111 | u32 used_tlb_cams[(CONFIG_SYS_NUM_TLBCAMS+31)/32]; | |
112 | #endif | |
cbd8a35c | 113 | #if defined(CONFIG_MPC5xxx) |
945af8d7 WD |
114 | unsigned long ipb_clk; |
115 | unsigned long pci_clk; | |
983fda83 | 116 | #endif |
8993e54b | 117 | #if defined(CONFIG_MPC512X) |
5d49e0e1 | 118 | u32 ips_clk; |
8993e54b | 119 | u32 csb_clk; |
5f91db7f | 120 | u32 pci_clk; |
8993e54b | 121 | #endif /* CONFIG_MPC512X */ |
983fda83 WD |
122 | #if defined(CONFIG_MPC8220) |
123 | unsigned long bExtUart; | |
124 | unsigned long inp_clk; | |
125 | unsigned long pci_clk; | |
126 | unsigned long vco_clk; | |
127 | unsigned long pev_clk; | |
128 | unsigned long flb_clk; | |
0157cedb | 129 | #endif |
b57ca3e1 | 130 | phys_size_t ram_size; /* RAM size */ |
0157cedb | 131 | unsigned long reset_status; /* reset status register at boot */ |
0f898604 | 132 | #if defined(CONFIG_MPC83xx) |
46497056 NS |
133 | unsigned long arbiter_event_attributes; |
134 | unsigned long arbiter_event_address; | |
135 | #endif | |
0157cedb WD |
136 | unsigned long env_addr; /* Address of Environment struct */ |
137 | unsigned long env_valid; /* Checksum of Environment valid? */ | |
138 | unsigned long have_console; /* serial_init() was called */ | |
6d0f6bcf | 139 | #if defined(CONFIG_SYS_ALLOC_DPRAM) || defined(CONFIG_CPM2) |
0157cedb WD |
140 | unsigned int dp_alloc_base; |
141 | unsigned int dp_alloc_top; | |
142 | #endif | |
f10493c6 SR |
143 | #if defined(CONFIG_4xx) |
144 | u32 uart_clk; | |
145 | #endif /* CONFIG_4xx */ | |
6d0f6bcf | 146 | #if defined(CONFIG_SYS_GT_6426x) |
0157cedb WD |
147 | unsigned int mirror_hack[16]; |
148 | #endif | |
756f586a WD |
149 | #if defined(CONFIG_A3000) || \ |
150 | defined(CONFIG_HIDDEN_DRAGON) || \ | |
151 | defined(CONFIG_MUSENKI) || \ | |
152 | defined(CONFIG_SANDPOINT) | |
0157cedb WD |
153 | void * console_addr; |
154 | #endif | |
c7de829c | 155 | unsigned long relocaddr; /* Start address of U-Boot in RAM */ |
0157cedb WD |
156 | #if defined(CONFIG_LCD) || defined(CONFIG_VIDEO) |
157 | unsigned long fb_base; /* Base address of framebuffer memory */ | |
158 | #endif | |
667122af | 159 | #if defined(CONFIG_POST) || defined(CONFIG_LOGBUFFER) |
228f29ac | 160 | unsigned long post_log_word; /* Record POST activities */ |
4532cb69 | 161 | unsigned long post_init_f_time; /* When post_init_f started */ |
228f29ac | 162 | #endif |
0157cedb WD |
163 | #ifdef CONFIG_BOARD_TYPES |
164 | unsigned long board_type; | |
165 | #endif | |
4532cb69 WD |
166 | #ifdef CONFIG_MODEM_SUPPORT |
167 | unsigned long do_mdm_init; | |
168 | unsigned long be_quiet; | |
169 | #endif | |
3ad63878 | 170 | #if defined(CONFIG_LWMON) || defined(CONFIG_LWMON5) |
4532cb69 | 171 | unsigned long kbd_status; |
d32a874b YT |
172 | #endif |
173 | #if defined(CONFIG_WD_MAX_RATE) | |
174 | unsigned long long wdt_last; /* trace watch-dog triggering rate */ | |
8bde7f77 | 175 | #endif |
27b207fd | 176 | void **jt; /* jump table */ |
0157cedb WD |
177 | } gd_t; |
178 | ||
179 | /* | |
180 | * Global Data Flags | |
181 | */ | |
182 | #define GD_FLG_RELOC 0x00001 /* Code was relocated to RAM */ | |
183 | #define GD_FLG_DEVINIT 0x00002 /* Devices have been initialized */ | |
f72da340 | 184 | #define GD_FLG_SILENT 0x00004 /* Silent mode */ |
b428f6a8 | 185 | #define GD_FLG_POSTFAIL 0x00008 /* Critical POST test failed */ |
28a38506 | 186 | #define GD_FLG_POSTSTOP 0x00010 /* POST seqeunce aborted */ |
0e15ddd1 | 187 | #define GD_FLG_LOGINIT 0x00020 /* Log Buffer has been initialized */ |
f5c3ba79 | 188 | #define GD_FLG_DISABLE_CONSOLE 0x00040 /* Disable console (in & out) */ |
0157cedb WD |
189 | |
190 | #if 1 | |
e7670f6c | 191 | #define DECLARE_GLOBAL_DATA_PTR register volatile gd_t *gd asm ("r2") |
0157cedb WD |
192 | #else /* We could use plain global data, but the resulting code is bigger */ |
193 | #define XTRN_DECLARE_GLOBAL_DATA_PTR extern | |
194 | #define DECLARE_GLOBAL_DATA_PTR XTRN_DECLARE_GLOBAL_DATA_PTR \ | |
195 | gd_t *gd | |
196 | #endif | |
197 | ||
198 | #endif /* __ASM_GBL_DATA_H */ |