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b2441318 1/* SPDX-License-Identifier: GPL-2.0 */
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2#ifndef _ASM_POWERPC_PGTABLE_BE_TYPES_H
3#define _ASM_POWERPC_PGTABLE_BE_TYPES_H
4
5#include <asm/cmpxchg.h>
6
7/* PTE level */
8typedef struct { __be64 pte; } pte_t;
9#define __pte(x) ((pte_t) { cpu_to_be64(x) })
66c570f5 10#define __pte_raw(x) ((pte_t) { (x) })
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11static inline unsigned long pte_val(pte_t x)
12{
13 return be64_to_cpu(x.pte);
14}
15
16static inline __be64 pte_raw(pte_t x)
17{
18 return x.pte;
19}
20
21/* PMD level */
22#ifdef CONFIG_PPC64
23typedef struct { __be64 pmd; } pmd_t;
24#define __pmd(x) ((pmd_t) { cpu_to_be64(x) })
66c570f5 25#define __pmd_raw(x) ((pmd_t) { (x) })
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26static inline unsigned long pmd_val(pmd_t x)
27{
28 return be64_to_cpu(x.pmd);
29}
30
31static inline __be64 pmd_raw(pmd_t x)
32{
33 return x.pmd;
34}
35
36/*
37 * 64 bit hash always use 4 level table. Everybody else use 4 level
38 * only for 4K page size.
39 */
40#if defined(CONFIG_PPC_BOOK3S_64) || !defined(CONFIG_PPC_64K_PAGES)
41typedef struct { __be64 pud; } pud_t;
42#define __pud(x) ((pud_t) { cpu_to_be64(x) })
66c570f5 43#define __pud_raw(x) ((pud_t) { (x) })
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44static inline unsigned long pud_val(pud_t x)
45{
46 return be64_to_cpu(x.pud);
47}
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48
49static inline __be64 pud_raw(pud_t x)
50{
51 return x.pud;
52}
53
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54#endif /* CONFIG_PPC_BOOK3S_64 || !CONFIG_PPC_64K_PAGES */
55#endif /* CONFIG_PPC64 */
56
57/* PGD level */
58typedef struct { __be64 pgd; } pgd_t;
59#define __pgd(x) ((pgd_t) { cpu_to_be64(x) })
66c570f5 60#define __pgd_raw(x) ((pgd_t) { (x) })
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61static inline unsigned long pgd_val(pgd_t x)
62{
63 return be64_to_cpu(x.pgd);
64}
65
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66static inline __be64 pgd_raw(pgd_t x)
67{
68 return x.pgd;
69}
70
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71/* Page protection bits */
72typedef struct { unsigned long pgprot; } pgprot_t;
73#define pgprot_val(x) ((x).pgprot)
74#define __pgprot(x) ((pgprot_t) { (x) })
75
76/*
77 * With hash config 64k pages additionally define a bigger "real PTE" type that
78 * gathers the "second half" part of the PTE for pseudo 64k pages
79 */
80#if defined(CONFIG_PPC_64K_PAGES) && defined(CONFIG_PPC_STD_MMU_64)
81typedef struct { pte_t pte; unsigned long hidx; } real_pte_t;
82#else
83typedef struct { pte_t pte; } real_pte_t;
84#endif
85
86static inline bool pte_xchg(pte_t *ptep, pte_t old, pte_t new)
87{
88 unsigned long *p = (unsigned long *)ptep;
89 __be64 prev;
90
1a92a80a 91 /* See comment in switch_mm_irqs_off() */
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92 prev = (__force __be64)__cmpxchg_u64(p, (__force unsigned long)pte_raw(old),
93 (__force unsigned long)pte_raw(new));
94
95 return pte_raw(old) == prev;
96}
97
98static inline bool pmd_xchg(pmd_t *pmdp, pmd_t old, pmd_t new)
99{
100 unsigned long *p = (unsigned long *)pmdp;
101 __be64 prev;
102
103 prev = (__force __be64)__cmpxchg_u64(p, (__force unsigned long)pmd_raw(old),
104 (__force unsigned long)pmd_raw(new));
105
106 return pmd_raw(old) == prev;
107}
108
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109typedef struct { __be64 pdbe; } hugepd_t;
110#define __hugepd(x) ((hugepd_t) { cpu_to_be64(x) })
111
112static inline unsigned long hpd_val(hugepd_t x)
113{
114 return be64_to_cpu(x.pdbe);
115}
116
5dc1ef85 117#endif /* _ASM_POWERPC_PGTABLE_BE_TYPES_H */