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b2441318 | 1 | /* SPDX-License-Identifier: GPL-2.0 */ |
2bf59916 AK |
2 | #ifndef _ASM_POWERPC_PGTABLE_TYPES_H |
3 | #define _ASM_POWERPC_PGTABLE_TYPES_H | |
4 | ||
2bf59916 AK |
5 | /* PTE level */ |
6 | typedef struct { pte_basic_t pte; } pte_t; | |
7 | #define __pte(x) ((pte_t) { (x) }) | |
8 | static inline pte_basic_t pte_val(pte_t x) | |
9 | { | |
10 | return x.pte; | |
11 | } | |
12 | ||
2bf59916 AK |
13 | /* PMD level */ |
14 | #ifdef CONFIG_PPC64 | |
15 | typedef struct { unsigned long pmd; } pmd_t; | |
16 | #define __pmd(x) ((pmd_t) { (x) }) | |
17 | static inline unsigned long pmd_val(pmd_t x) | |
18 | { | |
19 | return x.pmd; | |
20 | } | |
21 | ||
368ced78 AK |
22 | /* |
23 | * 64 bit hash always use 4 level table. Everybody else use 4 level | |
24 | * only for 4K page size. | |
25 | */ | |
26 | #if defined(CONFIG_PPC_BOOK3S_64) || !defined(CONFIG_PPC_64K_PAGES) | |
2bf59916 AK |
27 | typedef struct { unsigned long pud; } pud_t; |
28 | #define __pud(x) ((pud_t) { (x) }) | |
29 | static inline unsigned long pud_val(pud_t x) | |
30 | { | |
31 | return x.pud; | |
32 | } | |
368ced78 | 33 | #endif /* CONFIG_PPC_BOOK3S_64 || !CONFIG_PPC_64K_PAGES */ |
2bf59916 AK |
34 | #endif /* CONFIG_PPC64 */ |
35 | ||
36 | /* PGD level */ | |
37 | typedef struct { unsigned long pgd; } pgd_t; | |
38 | #define __pgd(x) ((pgd_t) { (x) }) | |
39 | static inline unsigned long pgd_val(pgd_t x) | |
40 | { | |
41 | return x.pgd; | |
42 | } | |
43 | ||
44 | /* Page protection bits */ | |
45 | typedef struct { unsigned long pgprot; } pgprot_t; | |
46 | #define pgprot_val(x) ((x).pgprot) | |
47 | #define __pgprot(x) ((pgprot_t) { (x) }) | |
48 | ||
ae9a71af AK |
49 | /* |
50 | * With hash config 64k pages additionally define a bigger "real PTE" type that | |
51 | * gathers the "second half" part of the PTE for pseudo 64k pages | |
52 | */ | |
53 | #if defined(CONFIG_PPC_64K_PAGES) && defined(CONFIG_PPC_STD_MMU_64) | |
54 | typedef struct { pte_t pte; unsigned long hidx; } real_pte_t; | |
55 | #else | |
56 | typedef struct { pte_t pte; } real_pte_t; | |
2bf59916 | 57 | #endif |
3910a7f4 ME |
58 | |
59 | #ifdef CONFIG_PPC_STD_MMU_64 | |
60 | #include <asm/cmpxchg.h> | |
61 | ||
62 | static inline bool pte_xchg(pte_t *ptep, pte_t old, pte_t new) | |
63 | { | |
64 | unsigned long *p = (unsigned long *)ptep; | |
65 | ||
1a92a80a | 66 | /* See comment in switch_mm_irqs_off() */ |
3910a7f4 ME |
67 | return pte_val(old) == __cmpxchg_u64(p, pte_val(old), pte_val(new)); |
68 | } | |
69 | #endif | |
70 | ||
20717e1f AK |
71 | typedef struct { unsigned long pd; } hugepd_t; |
72 | #define __hugepd(x) ((hugepd_t) { (x) }) | |
73 | static inline unsigned long hpd_val(hugepd_t x) | |
74 | { | |
75 | return x.pd; | |
76 | } | |
77 | ||
2bf59916 | 78 | #endif /* _ASM_POWERPC_PGTABLE_TYPES_H */ |