[thirdparty/linux.git] / arch / powerpc / kvm / book3s_32_mmu.c

// SPDX-License-Identifier: GPL-2.0-only
/*
 *
 * Copyright SUSE Linux Products GmbH 2009
 *
 * Authors: Alexander Graf <agraf@suse.de>
 */

#include <linux/types.h>
#include <linux/string.h>
#include <linux/kvm.h>
#include <linux/kvm_host.h>
#include <linux/highmem.h>

#include <asm/kvm_ppc.h>
#include <asm/kvm_book3s.h>

/* #define DEBUG_MMU */
/* #define DEBUG_MMU_PTE */
/* #define DEBUG_MMU_PTE_IP 0xfff14c40 */

#ifdef DEBUG_MMU
#define dprintk(X...) printk(KERN_INFO X)
#else
#define dprintk(X...) do { } while(0)
#endif

#ifdef DEBUG_MMU_PTE
#define dprintk_pte(X...) printk(KERN_INFO X)
#else
#define dprintk_pte(X...) do { } while(0)
#endif

#define PTEG_FLAG_ACCESSED	0x00000100
#define PTEG_FLAG_DIRTY		0x00000080
#ifndef SID_SHIFT
#define SID_SHIFT		28
#endif

static inline bool check_debug_ip(struct kvm_vcpu *vcpu)
{
#ifdef DEBUG_MMU_PTE_IP
	return vcpu->arch.regs.nip == DEBUG_MMU_PTE_IP;
#else
	return true;
#endif
}

static inline u32 sr_vsid(u32 sr_raw)
{
	return sr_raw & 0x0fffffff;
}

static inline bool sr_valid(u32 sr_raw)
{
	return (sr_raw & 0x80000000) ? false : true;
}

static inline bool sr_ks(u32 sr_raw)
{
	return (sr_raw & 0x40000000) ? true: false;
}

static inline bool sr_kp(u32 sr_raw)
{
	return (sr_raw & 0x20000000) ? true: false;
}

static int kvmppc_mmu_book3s_32_xlate_bat(struct kvm_vcpu *vcpu, gva_t eaddr,
					  struct kvmppc_pte *pte, bool data,
					  bool iswrite);
static int kvmppc_mmu_book3s_32_esid_to_vsid(struct kvm_vcpu *vcpu, ulong esid,
					     u64 *vsid);

static u32 find_sr(struct kvm_vcpu *vcpu, gva_t eaddr)
{
	return kvmppc_get_sr(vcpu, (eaddr >> 28) & 0xf);
}

static u64 kvmppc_mmu_book3s_32_ea_to_vp(struct kvm_vcpu *vcpu, gva_t eaddr,
					 bool data)
{
	u64 vsid;
	struct kvmppc_pte pte;

	if (!kvmppc_mmu_book3s_32_xlate_bat(vcpu, eaddr, &pte, data, false))
		return pte.vpage;

	kvmppc_mmu_book3s_32_esid_to_vsid(vcpu, eaddr >> SID_SHIFT, &vsid);
	return (((u64)eaddr >> 12) & 0xffff) | (vsid << 16);
}

static void kvmppc_mmu_book3s_32_reset_msr(struct kvm_vcpu *vcpu)
{
	kvmppc_set_msr(vcpu, 0);
}

static hva_t kvmppc_mmu_book3s_32_get_pteg(struct kvm_vcpu *vcpu,
				      u32 sre, gva_t eaddr,
				      bool primary)
{
	struct kvmppc_vcpu_book3s *vcpu_book3s = to_book3s(vcpu);
	u32 page, hash, pteg, htabmask;
	hva_t r;

	page = (eaddr & 0x0FFFFFFF) >> 12;
	htabmask = ((vcpu_book3s->sdr1 & 0x1FF) << 16) | 0xFFC0;

	hash = ((sr_vsid(sre) ^ page) << 6);
	if (!primary)
		hash = ~hash;
	hash &= htabmask;

	pteg = (vcpu_book3s->sdr1 & 0xffff0000) | hash;

	dprintk("MMU: pc=0x%lx eaddr=0x%lx sdr1=0x%llx pteg=0x%x vsid=0x%x\n",
		kvmppc_get_pc(vcpu), eaddr, vcpu_book3s->sdr1, pteg,
		sr_vsid(sre));

	r = gfn_to_hva(vcpu->kvm, pteg >> PAGE_SHIFT);
	if (kvm_is_error_hva(r))
		return r;
	return r | (pteg & ~PAGE_MASK);
}

static u32 kvmppc_mmu_book3s_32_get_ptem(u32 sre, gva_t eaddr, bool primary)
{
	return ((eaddr & 0x0fffffff) >> 22) | (sr_vsid(sre) << 7) |
	       (primary ? 0 : 0x40) | 0x80000000;
}

static int kvmppc_mmu_book3s_32_xlate_bat(struct kvm_vcpu *vcpu, gva_t eaddr,
					  struct kvmppc_pte *pte, bool data,
					  bool iswrite)
{
	struct kvmppc_vcpu_book3s *vcpu_book3s = to_book3s(vcpu);
	struct kvmppc_bat *bat;
	int i;

	for (i = 0; i < 8; i++) {
		if (data)
			bat = &vcpu_book3s->dbat[i];
		else
			bat = &vcpu_book3s->ibat[i];

		if (kvmppc_get_msr(vcpu) & MSR_PR) {
			if (!bat->vp)
				continue;
		} else {
			if (!bat->vs)
				continue;
		}

		if (check_debug_ip(vcpu))
		{
			dprintk_pte("%cBAT %02d: 0x%lx - 0x%x (0x%x)\n",
				    data ? 'd' : 'i', i, eaddr, bat->bepi,
				    bat->bepi_mask);
		}
		if ((eaddr & bat->bepi_mask) == bat->bepi) {
			u64 vsid;
			kvmppc_mmu_book3s_32_esid_to_vsid(vcpu,
				eaddr >> SID_SHIFT, &vsid);
			vsid <<= 16;
			pte->vpage = (((u64)eaddr >> 12) & 0xffff) | vsid;

			pte->raddr = bat->brpn | (eaddr & ~bat->bepi_mask);
			pte->may_read = bat->pp;
			pte->may_write = bat->pp > 1;
			pte->may_execute = true;
			if (!pte->may_read) {
				printk(KERN_INFO "BAT is not readable!\n");
				continue;
			}
			if (iswrite && !pte->may_write) {
				dprintk_pte("BAT is read-only!\n");
				continue;
			}

			return 0;
		}
	}

	return -ENOENT;
}

static int kvmppc_mmu_book3s_32_xlate_pte(struct kvm_vcpu *vcpu, gva_t eaddr,
				     struct kvmppc_pte *pte, bool data,
				     bool iswrite, bool primary)
{
	u32 sre;
	hva_t ptegp;
	u32 pteg[16];
	u32 pte0, pte1;
	u32 ptem = 0;
	int i;
	int found = 0;

	sre = find_sr(vcpu, eaddr);

	dprintk_pte("SR 0x%lx: vsid=0x%x, raw=0x%x\n", eaddr >> 28,
		    sr_vsid(sre), sre);

	pte->vpage = kvmppc_mmu_book3s_32_ea_to_vp(vcpu, eaddr, data);

	ptegp = kvmppc_mmu_book3s_32_get_pteg(vcpu, sre, eaddr, primary);
	if (kvm_is_error_hva(ptegp)) {
		printk(KERN_INFO "KVM: Invalid PTEG!\n");
		goto no_page_found;
	}

	ptem = kvmppc_mmu_book3s_32_get_ptem(sre, eaddr, primary);

	if(copy_from_user(pteg, (void __user *)ptegp, sizeof(pteg))) {
		printk_ratelimited(KERN_ERR
			"KVM: Can't copy data from 0x%lx!\n", ptegp);
		goto no_page_found;
	}

	for (i=0; i<16; i+=2) {
		pte0 = be32_to_cpu(pteg[i]);
		pte1 = be32_to_cpu(pteg[i + 1]);
		if (ptem == pte0) {
			u8 pp;

			pte->raddr = (pte1 & ~(0xFFFULL)) | (eaddr & 0xFFF);
			pp = pte1 & 3;

			if ((sr_kp(sre) &&  (kvmppc_get_msr(vcpu) & MSR_PR)) ||
			    (sr_ks(sre) && !(kvmppc_get_msr(vcpu) & MSR_PR)))
				pp |= 4;

			pte->may_write = false;
			pte->may_read = false;
			pte->may_execute = true;
			switch (pp) {
				case 0:
				case 1:
				case 2:
				case 6:
					pte->may_write = true;
					/* fall through */
				case 3:
				case 5:
				case 7:
					pte->may_read = true;
					break;
			}

			dprintk_pte("MMU: Found PTE -> %x %x - %x\n",
				    pte0, pte1, pp);
			found = 1;
			break;
		}
	}

	/* Update PTE C and A bits, so the guest's swapper knows we used the
	   page */
	if (found) {
		u32 pte_r = pte1;
		char __user *addr = (char __user *) (ptegp + (i+1) * sizeof(u32));

		/*
		 * Use single-byte writes to update the HPTE, to
		 * conform to what real hardware does.
		 */
		if (pte->may_read && !(pte_r & PTEG_FLAG_ACCESSED)) {
			pte_r |= PTEG_FLAG_ACCESSED;
			put_user(pte_r >> 8, addr + 2);
		}
		if (iswrite && pte->may_write && !(pte_r & PTEG_FLAG_DIRTY)) {
			pte_r |= PTEG_FLAG_DIRTY;
			put_user(pte_r, addr + 3);
		}
		if (!pte->may_read || (iswrite && !pte->may_write))
			return -EPERM;
		return 0;
	}

no_page_found:

	if (check_debug_ip(vcpu)) {
		dprintk_pte("KVM MMU: No PTE found (sdr1=0x%llx ptegp=0x%lx)\n",
			    to_book3s(vcpu)->sdr1, ptegp);
		for (i=0; i<16; i+=2) {
			dprintk_pte("   %02d: 0x%x - 0x%x (0x%x)\n",
				    i, be32_to_cpu(pteg[i]),
				    be32_to_cpu(pteg[i+1]), ptem);
		}
	}

	return -ENOENT;
}

static int kvmppc_mmu_book3s_32_xlate(struct kvm_vcpu *vcpu, gva_t eaddr,
				      struct kvmppc_pte *pte, bool data,
				      bool iswrite)
{
	int r;
	ulong mp_ea = vcpu->arch.magic_page_ea;

	pte->eaddr = eaddr;
	pte->page_size = MMU_PAGE_4K;

	/* Magic page override */
	if (unlikely(mp_ea) &&
	    unlikely((eaddr & ~0xfffULL) == (mp_ea & ~0xfffULL)) &&
	    !(kvmppc_get_msr(vcpu) & MSR_PR)) {
		pte->vpage = kvmppc_mmu_book3s_32_ea_to_vp(vcpu, eaddr, data);
		pte->raddr = vcpu->arch.magic_page_pa | (pte->raddr & 0xfff);
		pte->raddr &= KVM_PAM;
		pte->may_execute = true;
		pte->may_read = true;
		pte->may_write = true;

		return 0;
	}

	r = kvmppc_mmu_book3s_32_xlate_bat(vcpu, eaddr, pte, data, iswrite);
	if (r < 0)
		r = kvmppc_mmu_book3s_32_xlate_pte(vcpu, eaddr, pte,
						   data, iswrite, true);
	if (r == -ENOENT)
		r = kvmppc_mmu_book3s_32_xlate_pte(vcpu, eaddr, pte,
						   data, iswrite, false);

	return r;
}


static u32 kvmppc_mmu_book3s_32_mfsrin(struct kvm_vcpu *vcpu, u32 srnum)
{
	return kvmppc_get_sr(vcpu, srnum);
}

static void kvmppc_mmu_book3s_32_mtsrin(struct kvm_vcpu *vcpu, u32 srnum,
					ulong value)
{
	kvmppc_set_sr(vcpu, srnum, value);
	kvmppc_mmu_map_segment(vcpu, srnum << SID_SHIFT);
}

static void kvmppc_mmu_book3s_32_tlbie(struct kvm_vcpu *vcpu, ulong ea, bool large)
{
	int i;
	struct kvm_vcpu *v;

	/* flush this VA on all cpus */
	kvm_for_each_vcpu(i, v, vcpu->kvm)
		kvmppc_mmu_pte_flush(v, ea, 0x0FFFF000);
}

static int kvmppc_mmu_book3s_32_esid_to_vsid(struct kvm_vcpu *vcpu, ulong esid,
					     u64 *vsid)
{
	ulong ea = esid << SID_SHIFT;
	u32 sr;
	u64 gvsid = esid;
	u64 msr = kvmppc_get_msr(vcpu);

	if (msr & (MSR_DR|MSR_IR)) {
		sr = find_sr(vcpu, ea);
		if (sr_valid(sr))
			gvsid = sr_vsid(sr);
	}

	/* In case we only have one of MSR_IR or MSR_DR set, let's put
	   that in the real-mode context (and hope RM doesn't access
	   high memory) */
	switch (msr & (MSR_DR|MSR_IR)) {
	case 0:
		*vsid = VSID_REAL | esid;
		break;
	case MSR_IR:
		*vsid = VSID_REAL_IR | gvsid;
		break;
	case MSR_DR:
		*vsid = VSID_REAL_DR | gvsid;
		break;
	case MSR_DR|MSR_IR:
		if (sr_valid(sr))
			*vsid = sr_vsid(sr);
		else
			*vsid = VSID_BAT | gvsid;
		break;
	default:
		BUG();
	}

	if (msr & MSR_PR)
		*vsid |= VSID_PR;

	return 0;
}

static bool kvmppc_mmu_book3s_32_is_dcbz32(struct kvm_vcpu *vcpu)
{
	return true;
}


void kvmppc_mmu_book3s_32_init(struct kvm_vcpu *vcpu)
{
	struct kvmppc_mmu *mmu = &vcpu->arch.mmu;

	mmu->mtsrin = kvmppc_mmu_book3s_32_mtsrin;
	mmu->mfsrin = kvmppc_mmu_book3s_32_mfsrin;
	mmu->xlate = kvmppc_mmu_book3s_32_xlate;
	mmu->reset_msr = kvmppc_mmu_book3s_32_reset_msr;
	mmu->tlbie = kvmppc_mmu_book3s_32_tlbie;
	mmu->esid_to_vsid = kvmppc_mmu_book3s_32_esid_to_vsid;
	mmu->ea_to_vp = kvmppc_mmu_book3s_32_ea_to_vp;
	mmu->is_dcbz32 = kvmppc_mmu_book3s_32_is_dcbz32;

	mmu->slbmte = NULL;
	mmu->slbmfee = NULL;
	mmu->slbmfev = NULL;
	mmu->slbfee = NULL;
	mmu->slbie = NULL;
	mmu->slbia = NULL;
}
Commit	Line	Data
d94d71cb	1	// SPDX-License-Identifier: GPL-2.0-only
01235180	2	/*
01235180 AG	3	*
	4	* Copyright SUSE Linux Products GmbH 2009
	5	*
	6	* Authors: Alexander Graf <agraf@suse.de>
	7	*/
	8
	9	#include <linux/types.h>
	10	#include <linux/string.h>
	11	#include <linux/kvm.h>
	12	#include <linux/kvm_host.h>
	13	#include <linux/highmem.h>
	14
01235180 AG	15	#include <asm/kvm_ppc.h>
	16	#include <asm/kvm_book3s.h>
	17
	18	/* #define DEBUG_MMU */
	19	/* #define DEBUG_MMU_PTE */
	20	/* #define DEBUG_MMU_PTE_IP 0xfff14c40 */
	21
	22	#ifdef DEBUG_MMU
	23	#define dprintk(X...) printk(KERN_INFO X)
	24	#else
	25	#define dprintk(X...) do { } while(0)
	26	#endif
	27
e425a6de	28	#ifdef DEBUG_MMU_PTE
01235180 AG	29	#define dprintk_pte(X...) printk(KERN_INFO X)
	30	#else
	31	#define dprintk_pte(X...) do { } while(0)
	32	#endif
	33
	34	#define PTEG_FLAG_ACCESSED 0x00000100
	35	#define PTEG_FLAG_DIRTY 0x00000080
07b0907d AG	36	#ifndef SID_SHIFT
	37	#define SID_SHIFT 28
	38	#endif
01235180 AG	39
	40	static inline bool check_debug_ip(struct kvm_vcpu *vcpu)
	41	{
	42	#ifdef DEBUG_MMU_PTE_IP
173c520a	43	return vcpu->arch.regs.nip == DEBUG_MMU_PTE_IP;
01235180 AG	44	#else
	45	return true;
	46	#endif
	47	}
	48
8e865178 AG	49	static inline u32 sr_vsid(u32 sr_raw)
	50	{
	51	return sr_raw & 0x0fffffff;
	52	}
	53
	54	static inline bool sr_valid(u32 sr_raw)
	55	{
	56	return (sr_raw & 0x80000000) ? false : true;
	57	}
	58
	59	static inline bool sr_ks(u32 sr_raw)
	60	{
	61	return (sr_raw & 0x40000000) ? true: false;
	62	}
	63
	64	static inline bool sr_kp(u32 sr_raw)
	65	{
	66	return (sr_raw & 0x20000000) ? true: false;
	67	}
	68
01235180	69	static int kvmppc_mmu_book3s_32_xlate_bat(struct kvm_vcpu *vcpu, gva_t eaddr,
93b159b4 PM	70	struct kvmppc_pte *pte, bool data,
93b159b4 PM	71	bool iswrite);
af7b4d10	72	static int kvmppc_mmu_book3s_32_esid_to_vsid(struct kvm_vcpu *vcpu, ulong esid,
4b389ca2	73	u64 *vsid);
01235180	74
df1bfa25	75	static u32 find_sr(struct kvm_vcpu *vcpu, gva_t eaddr)
01235180	76	{
5deb8e7a	77	return kvmppc_get_sr(vcpu, (eaddr >> 28) & 0xf);
01235180 AG	78	}
	79
	80	static u64 kvmppc_mmu_book3s_32_ea_to_vp(struct kvm_vcpu *vcpu, gva_t eaddr,
	81	bool data)
	82	{
4b389ca2	83	u64 vsid;
01235180 AG	84	struct kvmppc_pte pte;
01235180 AG	85
93b159b4	86	if (!kvmppc_mmu_book3s_32_xlate_bat(vcpu, eaddr, &pte, data, false))
01235180 AG	87	return pte.vpage;
01235180 AG	88
4b389ca2 AG	89	kvmppc_mmu_book3s_32_esid_to_vsid(vcpu, eaddr >> SID_SHIFT, &vsid);
4b389ca2 AG	90	return (((u64)eaddr >> 12) & 0xffff) \| (vsid << 16);
01235180 AG	91	}
	92
	93	static void kvmppc_mmu_book3s_32_reset_msr(struct kvm_vcpu *vcpu)
	94	{
	95	kvmppc_set_msr(vcpu, 0);
	96	}
	97
3ff95502	98	static hva_t kvmppc_mmu_book3s_32_get_pteg(struct kvm_vcpu *vcpu,
8e865178	99	u32 sre, gva_t eaddr,
01235180 AG	100	bool primary)
01235180 AG	101	{
3ff95502	102	struct kvmppc_vcpu_book3s *vcpu_book3s = to_book3s(vcpu);
01235180 AG	103	u32 page, hash, pteg, htabmask;
	104	hva_t r;
	105
	106	page = (eaddr & 0x0FFFFFFF) >> 12;
	107	htabmask = ((vcpu_book3s->sdr1 & 0x1FF) << 16) \| 0xFFC0;
	108
8e865178	109	hash = ((sr_vsid(sre) ^ page) << 6);
01235180 AG	110	if (!primary)
	111	hash = ~hash;
	112	hash &= htabmask;
	113
	114	pteg = (vcpu_book3s->sdr1 & 0xffff0000) \| hash;
	115
	116	dprintk("MMU: pc=0x%lx eaddr=0x%lx sdr1=0x%llx pteg=0x%x vsid=0x%x\n",
cd087eef	117	kvmppc_get_pc(vcpu), eaddr, vcpu_book3s->sdr1, pteg,
8e865178	118	sr_vsid(sre));
01235180	119
3ff95502	120	r = gfn_to_hva(vcpu->kvm, pteg >> PAGE_SHIFT);
01235180 AG	121	if (kvm_is_error_hva(r))
	122	return r;
	123	return r \| (pteg & ~PAGE_MASK);
	124	}
	125
8e865178	126	static u32 kvmppc_mmu_book3s_32_get_ptem(u32 sre, gva_t eaddr, bool primary)
01235180	127	{
8e865178	128	return ((eaddr & 0x0fffffff) >> 22) \| (sr_vsid(sre) << 7) \|
01235180 AG	129	(primary ? 0 : 0x40) \| 0x80000000;
	130	}
	131
	132	static int kvmppc_mmu_book3s_32_xlate_bat(struct kvm_vcpu *vcpu, gva_t eaddr,
93b159b4 PM	133	struct kvmppc_pte *pte, bool data,
93b159b4 PM	134	bool iswrite)
01235180 AG	135	{
	136	struct kvmppc_vcpu_book3s *vcpu_book3s = to_book3s(vcpu);
	137	struct kvmppc_bat *bat;
	138	int i;
	139
	140	for (i = 0; i < 8; i++) {
	141	if (data)
	142	bat = &vcpu_book3s->dbat[i];
	143	else
	144	bat = &vcpu_book3s->ibat[i];
	145
5deb8e7a	146	if (kvmppc_get_msr(vcpu) & MSR_PR) {
01235180 AG	147	if (!bat->vp)
	148	continue;
	149	} else {
	150	if (!bat->vs)
	151	continue;
	152	}
	153
	154	if (check_debug_ip(vcpu))
	155	{
	156	dprintk_pte("%cBAT %02d: 0x%lx - 0x%x (0x%x)\n",
	157	data ? 'd' : 'i', i, eaddr, bat->bepi,
	158	bat->bepi_mask);
	159	}
	160	if ((eaddr & bat->bepi_mask) == bat->bepi) {
4b389ca2 AG	161	u64 vsid;
	162	kvmppc_mmu_book3s_32_esid_to_vsid(vcpu,
	163	eaddr >> SID_SHIFT, &vsid);
	164	vsid <<= 16;
	165	pte->vpage = (((u64)eaddr >> 12) & 0xffff) \| vsid;
	166
01235180	167	pte->raddr = bat->brpn \| (eaddr & ~bat->bepi_mask);
01235180 AG	168	pte->may_read = bat->pp;
	169	pte->may_write = bat->pp > 1;
	170	pte->may_execute = true;
	171	if (!pte->may_read) {
	172	printk(KERN_INFO "BAT is not readable!\n");
	173	continue;
	174	}
93b159b4	175	if (iswrite && !pte->may_write) {
01235180 AG	176	dprintk_pte("BAT is read-only!\n");
	177	continue;
	178	}
	179
	180	return 0;
	181	}
	182	}
	183
	184	return -ENOENT;
	185	}
	186
	187	static int kvmppc_mmu_book3s_32_xlate_pte(struct kvm_vcpu *vcpu, gva_t eaddr,
	188	struct kvmppc_pte *pte, bool data,
93b159b4	189	bool iswrite, bool primary)
01235180	190	{
8e865178	191	u32 sre;
01235180 AG	192	hva_t ptegp;
01235180 AG	193	u32 pteg[16];
860540bc	194	u32 pte0, pte1;
af7b4d10	195	u32 ptem = 0;
01235180 AG	196	int i;
	197	int found = 0;
	198
df1bfa25	199	sre = find_sr(vcpu, eaddr);
01235180 AG	200
01235180 AG	201	dprintk_pte("SR 0x%lx: vsid=0x%x, raw=0x%x\n", eaddr >> 28,
8e865178	202	sr_vsid(sre), sre);
01235180 AG	203
	204	pte->vpage = kvmppc_mmu_book3s_32_ea_to_vp(vcpu, eaddr, data);
	205
3ff95502	206	ptegp = kvmppc_mmu_book3s_32_get_pteg(vcpu, sre, eaddr, primary);
01235180 AG	207	if (kvm_is_error_hva(ptegp)) {
	208	printk(KERN_INFO "KVM: Invalid PTEG!\n");
	209	goto no_page_found;
	210	}
	211
	212	ptem = kvmppc_mmu_book3s_32_get_ptem(sre, eaddr, primary);
	213
	214	if(copy_from_user(pteg, (void __user *)ptegp, sizeof(pteg))) {
4da934dc VP	215	printk_ratelimited(KERN_ERR
4da934dc VP	216	"KVM: Can't copy data from 0x%lx!\n", ptegp);
01235180 AG	217	goto no_page_found;
	218	}
	219
	220	for (i=0; i<16; i+=2) {
860540bc AG	221	pte0 = be32_to_cpu(pteg[i]);
	222	pte1 = be32_to_cpu(pteg[i + 1]);
	223	if (ptem == pte0) {
01235180 AG	224	u8 pp;
01235180 AG	225
860540bc AG	226	pte->raddr = (pte1 & ~(0xFFFULL)) \| (eaddr & 0xFFF);
860540bc AG	227	pp = pte1 & 3;
01235180	228
5deb8e7a AG	229	if ((sr_kp(sre) && (kvmppc_get_msr(vcpu) & MSR_PR)) \|\|
5deb8e7a AG	230	(sr_ks(sre) && !(kvmppc_get_msr(vcpu) & MSR_PR)))
01235180 AG	231	pp \|= 4;
	232
	233	pte->may_write = false;
	234	pte->may_read = false;
	235	pte->may_execute = true;
	236	switch (pp) {
	237	case 0:
	238	case 1:
	239	case 2:
	240	case 6:
	241	pte->may_write = true;
705d0abb	242	/* fall through */
01235180 AG	243	case 3:
	244	case 5:
	245	case 7:
	246	pte->may_read = true;
	247	break;
	248	}
	249
01235180	250	dprintk_pte("MMU: Found PTE -> %x %x - %x\n",
860540bc	251	pte0, pte1, pp);
01235180 AG	252	found = 1;
	253	break;
	254	}
	255	}
	256
	257	/* Update PTE C and A bits, so the guest's swapper knows we used the
	258	page */
	259	if (found) {
860540bc	260	u32 pte_r = pte1;
740f834e	261	char __user addr = (char __user ) (ptegp + (i+1) * sizeof(u32));
9308ab8e PM	262
	263	/*
	264	* Use single-byte writes to update the HPTE, to
	265	* conform to what real hardware does.
	266	*/
	267	if (pte->may_read && !(pte_r & PTEG_FLAG_ACCESSED)) {
	268	pte_r \|= PTEG_FLAG_ACCESSED;
	269	put_user(pte_r >> 8, addr + 2);
	270	}
93b159b4	271	if (iswrite && pte->may_write && !(pte_r & PTEG_FLAG_DIRTY)) {
9308ab8e PM	272	pte_r \|= PTEG_FLAG_DIRTY;
	273	put_user(pte_r, addr + 3);
	274	}
93b159b4 PM	275	if (!pte->may_read \|\| (iswrite && !pte->may_write))
93b159b4 PM	276	return -EPERM;
01235180 AG	277	return 0;
	278	}
	279
	280	no_page_found:
	281
	282	if (check_debug_ip(vcpu)) {
	283	dprintk_pte("KVM MMU: No PTE found (sdr1=0x%llx ptegp=0x%lx)\n",
	284	to_book3s(vcpu)->sdr1, ptegp);
	285	for (i=0; i<16; i+=2) {
53021042	286	dprintk_pte(" %02d: 0x%x - 0x%x (0x%x)\n",
860540bc AG	287	i, be32_to_cpu(pteg[i]),
860540bc AG	288	be32_to_cpu(pteg[i+1]), ptem);
01235180 AG	289	}
	290	}
	291
	292	return -ENOENT;
	293	}
	294
	295	static int kvmppc_mmu_book3s_32_xlate(struct kvm_vcpu *vcpu, gva_t eaddr,
93b159b4 PM	296	struct kvmppc_pte *pte, bool data,
93b159b4 PM	297	bool iswrite)
01235180 AG	298	{
01235180 AG	299	int r;
e8508940	300	ulong mp_ea = vcpu->arch.magic_page_ea;
01235180 AG	301
01235180 AG	302	pte->eaddr = eaddr;
c9029c34	303	pte->page_size = MMU_PAGE_4K;
e8508940 AG	304
	305	/* Magic page override */
	306	if (unlikely(mp_ea) &&
	307	unlikely((eaddr & ~0xfffULL) == (mp_ea & ~0xfffULL)) &&
5deb8e7a	308	!(kvmppc_get_msr(vcpu) & MSR_PR)) {
e8508940 AG	309	pte->vpage = kvmppc_mmu_book3s_32_ea_to_vp(vcpu, eaddr, data);
	310	pte->raddr = vcpu->arch.magic_page_pa \| (pte->raddr & 0xfff);
	311	pte->raddr &= KVM_PAM;
	312	pte->may_execute = true;
	313	pte->may_read = true;
	314	pte->may_write = true;
	315
	316	return 0;
	317	}
	318
93b159b4	319	r = kvmppc_mmu_book3s_32_xlate_bat(vcpu, eaddr, pte, data, iswrite);
01235180	320	if (r < 0)
93b159b4 PM	321	r = kvmppc_mmu_book3s_32_xlate_pte(vcpu, eaddr, pte,
93b159b4 PM	322	data, iswrite, true);
2e27ecc9	323	if (r == -ENOENT)
93b159b4 PM	324	r = kvmppc_mmu_book3s_32_xlate_pte(vcpu, eaddr, pte,
93b159b4 PM	325	data, iswrite, false);
01235180 AG	326
	327	return r;
	328	}
	329
	330
	331	static u32 kvmppc_mmu_book3s_32_mfsrin(struct kvm_vcpu *vcpu, u32 srnum)
	332	{
5deb8e7a	333	return kvmppc_get_sr(vcpu, srnum);
01235180 AG	334	}
	335
	336	static void kvmppc_mmu_book3s_32_mtsrin(struct kvm_vcpu *vcpu, u32 srnum,
	337	ulong value)
	338	{
5deb8e7a	339	kvmppc_set_sr(vcpu, srnum, value);
01235180 AG	340	kvmppc_mmu_map_segment(vcpu, srnum << SID_SHIFT);
	341	}
	342
	343	static void kvmppc_mmu_book3s_32_tlbie(struct kvm_vcpu *vcpu, ulong ea, bool large)
	344	{
9308ab8e PM	345	int i;
	346	struct kvm_vcpu *v;
	347
	348	/* flush this VA on all cpus */
	349	kvm_for_each_vcpu(i, v, vcpu->kvm)
	350	kvmppc_mmu_pte_flush(v, ea, 0x0FFFF000);
01235180 AG	351	}
01235180 AG	352
af7b4d10	353	static int kvmppc_mmu_book3s_32_esid_to_vsid(struct kvm_vcpu *vcpu, ulong esid,
01235180 AG	354	u64 *vsid)
01235180 AG	355	{
f7bc74e1	356	ulong ea = esid << SID_SHIFT;
8e865178	357	u32 sr;
f7bc74e1	358	u64 gvsid = esid;
5deb8e7a	359	u64 msr = kvmppc_get_msr(vcpu);
f7bc74e1	360
5deb8e7a	361	if (msr & (MSR_DR\|MSR_IR)) {
df1bfa25	362	sr = find_sr(vcpu, ea);
8e865178 AG	363	if (sr_valid(sr))
8e865178 AG	364	gvsid = sr_vsid(sr);
f7bc74e1 AG	365	}
f7bc74e1 AG	366
01235180 AG	367	/* In case we only have one of MSR_IR or MSR_DR set, let's put
	368	that in the real-mode context (and hope RM doesn't access
	369	high memory) */
5deb8e7a	370	switch (msr & (MSR_DR\|MSR_IR)) {
01235180	371	case 0:
f7bc74e1	372	*vsid = VSID_REAL \| esid;
01235180 AG	373	break;
01235180 AG	374	case MSR_IR:
f7bc74e1	375	*vsid = VSID_REAL_IR \| gvsid;
01235180 AG	376	break;
01235180 AG	377	case MSR_DR:
f7bc74e1	378	*vsid = VSID_REAL_DR \| gvsid;
01235180 AG	379	break;
01235180 AG	380	case MSR_DR\|MSR_IR:
8e865178 AG	381	if (sr_valid(sr))
8e865178 AG	382	*vsid = sr_vsid(sr);
4d29bdbf AG	383	else
4d29bdbf AG	384	*vsid = VSID_BAT \| gvsid;
01235180	385	break;
01235180 AG	386	default:
	387	BUG();
	388	}
	389
5deb8e7a	390	if (msr & MSR_PR)
4b389ca2 AG	391	*vsid \|= VSID_PR;
4b389ca2 AG	392
01235180 AG	393	return 0;
	394	}
	395
	396	static bool kvmppc_mmu_book3s_32_is_dcbz32(struct kvm_vcpu *vcpu)
	397	{
	398	return true;
	399	}
	400
	401
	402	void kvmppc_mmu_book3s_32_init(struct kvm_vcpu *vcpu)
	403	{
	404	struct kvmppc_mmu *mmu = &vcpu->arch.mmu;
	405
	406	mmu->mtsrin = kvmppc_mmu_book3s_32_mtsrin;
	407	mmu->mfsrin = kvmppc_mmu_book3s_32_mfsrin;
	408	mmu->xlate = kvmppc_mmu_book3s_32_xlate;
	409	mmu->reset_msr = kvmppc_mmu_book3s_32_reset_msr;
	410	mmu->tlbie = kvmppc_mmu_book3s_32_tlbie;
	411	mmu->esid_to_vsid = kvmppc_mmu_book3s_32_esid_to_vsid;
	412	mmu->ea_to_vp = kvmppc_mmu_book3s_32_ea_to_vp;
	413	mmu->is_dcbz32 = kvmppc_mmu_book3s_32_is_dcbz32;
	414
	415	mmu->slbmte = NULL;
	416	mmu->slbmfee = NULL;
	417	mmu->slbmfev = NULL;
41a8645a	418	mmu->slbfee = NULL;
01235180 AG	419	mmu->slbie = NULL;
	420	mmu->slbia = NULL;
	421	}