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fe8c2806 1/*
82826d54 2 * (C) Copyright 2000-2010
fe8c2806
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3 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
4 *
5 * See file CREDITS for list of people who contributed to this
6 * project.
7 *
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
22 */
23
24#include <common.h>
25#include <watchdog.h>
26#include <command.h>
27#include <malloc.h>
52cb4d4f 28#include <stdio_dev.h>
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29#ifdef CONFIG_8xx
30#include <mpc8xx.h>
31#endif
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32#ifdef CONFIG_5xx
33#include <mpc5xx.h>
34#endif
cbd8a35c 35#ifdef CONFIG_MPC5xxx
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36#include <mpc5xxx.h>
37#endif
7def6b34 38#if defined(CONFIG_CMD_IDE)
fe8c2806
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39#include <ide.h>
40#endif
7def6b34 41#if defined(CONFIG_CMD_SCSI)
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42#include <scsi.h>
43#endif
7def6b34 44#if defined(CONFIG_CMD_KGDB)
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45#include <kgdb.h>
46#endif
47#ifdef CONFIG_STATUS_LED
48#include <status_led.h>
49#endif
50#include <net.h>
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51#ifdef CONFIG_GENERIC_MMC
52#include <mmc.h>
53#endif
281e00a3 54#include <serial.h>
6d0f6bcf 55#ifdef CONFIG_SYS_ALLOC_DPRAM
9c4c5ae3 56#if !defined(CONFIG_CPM2)
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57#include <commproc.h>
58#endif
7aa78614 59#endif
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60#include <version.h>
61#if defined(CONFIG_BAB7xx)
62#include <w83c553f.h>
63#endif
64#include <dtt.h>
65#if defined(CONFIG_POST)
66#include <post.h>
67#endif
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68#if defined(CONFIG_LOGBUFFER)
69#include <logbuff.h>
70#endif
9c67352f 71#if defined(CONFIG_SYS_INIT_RAM_LOCK) && defined(CONFIG_E500)
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72#include <asm/cache.h>
73#endif
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74#ifdef CONFIG_PS2KBD
75#include <keyboard.h>
76#endif
fe8c2806 77
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78#ifdef CONFIG_ADDR_MAP
79#include <asm/mmu.h>
80#endif
81
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82#ifdef CONFIG_MP
83#include <asm/mp.h>
84#endif
85
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86#ifdef CONFIG_BITBANGMII
87#include <miiphy.h>
88#endif
89
6d0f6bcf 90#ifdef CONFIG_SYS_UPDATE_FLASH_SIZE
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91extern int update_flash_size (int flash_size);
92#endif
93
9045f33c 94#if defined(CONFIG_SC3)
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95extern void sc3_read_eeprom(void);
96#endif
97
7def6b34 98#if defined(CONFIG_CMD_DOC)
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99void doc_init (void);
100#endif
101#if defined(CONFIG_HARD_I2C) || \
102 defined(CONFIG_SOFT_I2C)
103#include <i2c.h>
104#endif
04a9e118 105#include <spi.h>
d6ac2ed8 106#include <nand.h>
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107
108static char *failed = "*** failed ***\n";
109
544d97e9 110#if defined(CONFIG_OXC) || defined(CONFIG_RMU)
fe8c2806 111extern flash_info_t flash_info[];
17d704eb 112#endif
fe8c2806 113
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114#if defined(CONFIG_START_IDE)
115extern int board_start_ide(void);
116#endif
fe8c2806 117#include <environment.h>
d87080b7 118
bce84c4d 119DECLARE_GLOBAL_DATA_PTR;
fe8c2806 120
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121#if !defined(CONFIG_SYS_MEM_TOP_HIDE)
122#define CONFIG_SYS_MEM_TOP_HIDE 0
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123#endif
124
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125extern ulong __init_end;
126extern ulong _end;
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127ulong monitor_flash_len;
128
7def6b34 129#if defined(CONFIG_CMD_BEDBUG)
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130#include <bedbug/type.h>
131#endif
132
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133/************************************************************************
134 * Utilities *
135 ************************************************************************
136 */
137
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138/*
139 * All attempts to come up with a "common" initialization sequence
140 * that works for all boards and architectures failed: some of the
141 * requirements are just _too_ different. To get rid of the resulting
142 * mess of board dependend #ifdef'ed code we now make the whole
143 * initialization sequence configurable to the user.
144 *
145 * The requirements for any new initalization function is simple: it
146 * receives a pointer to the "global data" structure as it's only
147 * argument, and returns an integer return code, where 0 means
148 * "continue" and != 0 means "fatal error, hang the system".
149 */
150typedef int (init_fnc_t) (void);
151
152/************************************************************************
153 * Init Utilities *
154 ************************************************************************
155 * Some of this code should be moved into the core functions,
156 * but let's get it working (again) first...
157 */
158
159static int init_baudrate (void)
160{
77ddac94 161 char tmp[64]; /* long enough for environment variables */
cdb74977 162 int i = getenv_f("baudrate", tmp, sizeof (tmp));
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163
164 gd->baudrate = (i > 0)
165 ? (int) simple_strtoul (tmp, NULL, 10)
166 : CONFIG_BAUDRATE;
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167 return (0);
168}
169
170/***********************************************************************/
171
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172void __board_add_ram_info(int use_default)
173{
174 /* please define platform specific board_add_ram_info() */
175}
176void board_add_ram_info(int) __attribute__((weak, alias("__board_add_ram_info")));
177
d96f41e0 178
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179static int init_func_ram (void)
180{
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181#ifdef CONFIG_BOARD_TYPES
182 int board_type = gd->board_type;
183#else
184 int board_type = 0; /* use dummy arg */
185#endif
186 puts ("DRAM: ");
187
188 if ((gd->ram_size = initdram (board_type)) > 0) {
d96f41e0 189 print_size (gd->ram_size, "");
d96f41e0 190 board_add_ram_info(0);
d96f41e0 191 putc('\n');
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192 return (0);
193 }
194 puts (failed);
195 return (1);
196}
197
198/***********************************************************************/
199
200#if defined(CONFIG_HARD_I2C) || defined(CONFIG_SOFT_I2C)
201static int init_func_i2c (void)
202{
203 puts ("I2C: ");
6d0f6bcf 204 i2c_init (CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
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205 puts ("ready\n");
206 return (0);
207}
208#endif
209
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210#if defined(CONFIG_HARD_SPI)
211static int init_func_spi (void)
212{
213 puts ("SPI: ");
214 spi_init ();
215 puts ("ready\n");
216 return (0);
217}
218#endif
219
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220/***********************************************************************/
221
222#if defined(CONFIG_WATCHDOG)
223static int init_func_watchdog_init (void)
224{
225 puts (" Watchdog enabled\n");
226 WATCHDOG_RESET ();
227 return (0);
228}
229# define INIT_FUNC_WATCHDOG_INIT init_func_watchdog_init,
230
231static int init_func_watchdog_reset (void)
232{
233 WATCHDOG_RESET ();
234 return (0);
235}
236# define INIT_FUNC_WATCHDOG_RESET init_func_watchdog_reset,
237#else
238# define INIT_FUNC_WATCHDOG_INIT /* undef */
239# define INIT_FUNC_WATCHDOG_RESET /* undef */
240#endif /* CONFIG_WATCHDOG */
241
242/************************************************************************
243 * Initialization sequence *
244 ************************************************************************
245 */
246
247init_fnc_t *init_sequence[] = {
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248#if defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx)
249 probecpu,
250#endif
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251#if defined(CONFIG_BOARD_EARLY_INIT_F)
252 board_early_init_f,
253#endif
66ca92a5 254#if !defined(CONFIG_8xx_CPUCLK_DEFAULT)
fe8c2806 255 get_clocks, /* get CPU and bus clocks (etc.) */
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256#if defined(CONFIG_TQM8xxL) && !defined(CONFIG_TQM866M) \
257 && !defined(CONFIG_TQM885D)
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258 adjust_sdram_tbs_8xx,
259#endif
fe8c2806 260 init_timebase,
c178d3da 261#endif
6d0f6bcf 262#ifdef CONFIG_SYS_ALLOC_DPRAM
9c4c5ae3 263#if !defined(CONFIG_CPM2)
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264 dpram_init,
265#endif
7aa78614 266#endif
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267#if defined(CONFIG_BOARD_POSTCLK_INIT)
268 board_postclk_init,
269#endif
270 env_init,
66ca92a5 271#if defined(CONFIG_8xx_CPUCLK_DEFAULT)
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272 get_clocks_866, /* get CPU and bus clocks according to the environment variable */
273 sdram_adjust_866, /* adjust sdram refresh rate according to the new clock */
274 init_timebase,
275#endif
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276 init_baudrate,
277 serial_init,
278 console_init_f,
279 display_options,
280#if defined(CONFIG_8260)
281 prt_8260_rsr,
282 prt_8260_clks,
283#endif /* CONFIG_8260 */
0f898604 284#if defined(CONFIG_MPC83xx)
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285 prt_83xx_rsr,
286#endif
fe8c2806 287 checkcpu,
cbd8a35c 288#if defined(CONFIG_MPC5xxx)
945af8d7 289 prt_mpc5xxx_clks,
cbd8a35c 290#endif /* CONFIG_MPC5xxx */
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291#if defined(CONFIG_MPC8220)
292 prt_mpc8220_clks,
293#endif
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294 checkboard,
295 INIT_FUNC_WATCHDOG_INIT
c837dcb1 296#if defined(CONFIG_MISC_INIT_F)
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297 misc_init_f,
298#endif
299 INIT_FUNC_WATCHDOG_RESET
300#if defined(CONFIG_HARD_I2C) || defined(CONFIG_SOFT_I2C)
301 init_func_i2c,
302#endif
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303#if defined(CONFIG_HARD_SPI)
304 init_func_spi,
305#endif
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306#ifdef CONFIG_POST
307 post_init_f,
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308#endif
309 INIT_FUNC_WATCHDOG_RESET
310 init_func_ram,
6d0f6bcf 311#if defined(CONFIG_SYS_DRAM_TEST)
fe8c2806 312 testdram,
6d0f6bcf 313#endif /* CONFIG_SYS_DRAM_TEST */
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314 INIT_FUNC_WATCHDOG_RESET
315
316 NULL, /* Terminate this list */
317};
318
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319ulong get_effective_memsize(void)
320{
321#ifndef CONFIG_VERY_BIG_RAM
322 return gd->ram_size;
323#else
324 /* limit stack to what we can reasonable map */
325 return ((gd->ram_size > CONFIG_MAX_MEM_MAPPED) ?
326 CONFIG_MAX_MEM_MAPPED : gd->ram_size);
327#endif
328}
329
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330/************************************************************************
331 *
332 * This is the first part of the initialization sequence that is
333 * implemented in C, but still running from ROM.
334 *
335 * The main purpose is to provide a (serial) console interface as
336 * soon as possible (so we can see any error messages), and to
337 * initialize the RAM so that we can relocate the monitor code to
338 * RAM.
339 *
340 * Be aware of the restrictions: global data is read-only, BSS is not
341 * initialized, and stack space is limited to a few kB.
342 *
343 ************************************************************************
344 */
345
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346#ifdef CONFIG_LOGBUFFER
347unsigned long logbuffer_base(void)
348{
6d0f6bcf 349 return CONFIG_SYS_SDRAM_BASE + get_effective_memsize() - LOGBUFF_LEN;
95d449ad
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350}
351#endif
352
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353void board_init_f (ulong bootflag)
354{
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355 bd_t *bd;
356 ulong len, addr, addr_sp;
7bc5ee07 357 ulong *s;
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358 gd_t *id;
359 init_fnc_t **init_fnc_ptr;
360#ifdef CONFIG_PRAM
361 int i;
362 ulong reg;
363 uchar tmp[64]; /* long enough for environment variables */
364#endif
365
366 /* Pointer is writable since we allocated a register for it */
6d0f6bcf 367 gd = (gd_t *) (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_GBL_DATA_OFFSET);
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368 /* compiler optimization barrier needed for GCC >= 3.4 */
369 __asm__ __volatile__("": : :"memory");
fe8c2806 370
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371#if !defined(CONFIG_CPM2) && !defined(CONFIG_MPC512X) && \
372 !defined(CONFIG_MPC83xx) && !defined(CONFIG_MPC85xx) && \
373 !defined(CONFIG_MPC86xx)
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374 /* Clear initial global data */
375 memset ((void *) gd, 0, sizeof (gd_t));
376#endif
377
378 for (init_fnc_ptr = init_sequence; *init_fnc_ptr; ++init_fnc_ptr) {
379 if ((*init_fnc_ptr) () != 0) {
380 hang ();
381 }
382 }
383
384 /*
385 * Now that we have DRAM mapped and working, we can
386 * relocate the code and continue running from DRAM.
387 *
388 * Reserve memory at end of RAM for (top down in that order):
14f73ca6 389 * - area that won't get touched by U-Boot and Linux (optional)
8bde7f77 390 * - kernel log buffer
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391 * - protected RAM
392 * - LCD framebuffer
393 * - monitor code
394 * - board info struct
395 */
6d0f6bcf 396 len = (ulong)&_end - CONFIG_SYS_MONITOR_BASE;
fe8c2806 397
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398 /*
399 * Subtract specified amount of memory to hide so that it won't
400 * get "touched" at all by U-Boot. By fixing up gd->ram_size
401 * the Linux kernel should now get passed the now "corrected"
402 * memory size and won't touch it either. This should work
403 * for arch/ppc and arch/powerpc. Only Linux board ports in
404 * arch/powerpc with bootwrapper support, that recalculate the
405 * memory size from the SDRAM controller setup will have to
406 * get fixed.
407 */
6d0f6bcf 408 gd->ram_size -= CONFIG_SYS_MEM_TOP_HIDE;
14f73ca6 409
6d0f6bcf 410 addr = CONFIG_SYS_SDRAM_BASE + get_effective_memsize();
fe8c2806 411
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412#if defined(CONFIG_MP) && (defined(CONFIG_MPC86xx) || defined(CONFIG_E500))
413 /*
414 * We need to make sure the location we intend to put secondary core
415 * boot code is reserved and not used by any part of u-boot
c0a14aed 416 */
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417 if (addr > determine_mp_bootpg()) {
418 addr = determine_mp_bootpg();
419 debug ("Reserving MP boot page to %08lx\n", addr);
420 }
421#endif
422
228f29ac 423#ifdef CONFIG_LOGBUFFER
3d610186 424#ifndef CONFIG_ALT_LB_ADDR
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WD
425 /* reserve kernel log buffer */
426 addr -= (LOGBUFF_RESERVE);
9d2b18a0 427 debug ("Reserving %dk for kernel logbuffer at %08lx\n", LOGBUFF_LEN, addr);
228f29ac 428#endif
3d610186 429#endif
228f29ac 430
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431#ifdef CONFIG_PRAM
432 /*
433 * reserve protected RAM
434 */
cdb74977 435 i = getenv_f("pram", (char *)tmp, sizeof (tmp));
77ddac94 436 reg = (i > 0) ? simple_strtoul ((const char *)tmp, NULL, 10) : CONFIG_PRAM;
fe8c2806 437 addr -= (reg << 10); /* size is in kB */
9d2b18a0 438 debug ("Reserving %ldk for protected RAM at %08lx\n", reg, addr);
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439#endif /* CONFIG_PRAM */
440
441 /* round down to next 4 kB limit */
442 addr &= ~(4096 - 1);
9d2b18a0 443 debug ("Top of RAM usable for U-Boot at: %08lx\n", addr);
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444
445#ifdef CONFIG_LCD
446 /* reserve memory for LCD display (always full pages) */
447 addr = lcd_setmem (addr);
448 gd->fb_base = addr;
449#endif /* CONFIG_LCD */
450
451#if defined(CONFIG_VIDEO) && defined(CONFIG_8xx)
452 /* reserve memory for video display (always full pages) */
453 addr = video_setmem (addr);
454 gd->fb_base = addr;
455#endif /* CONFIG_VIDEO */
456
457 /*
458 * reserve memory for U-Boot code, data & bss
682011ff 459 * round down to next 4 kB limit
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460 */
461 addr -= len;
682011ff 462 addr &= ~(4096 - 1);
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463#ifdef CONFIG_E500
464 /* round down to next 64 kB limit so that IVPR stays aligned */
465 addr &= ~(65536 - 1);
466#endif
fe8c2806 467
9d2b18a0 468 debug ("Reserving %ldk for U-Boot at: %08lx\n", len >> 10, addr);
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WD
469
470 /*
471 * reserve memory for malloc() arena
472 */
473 addr_sp = addr - TOTAL_MALLOC_LEN;
9d2b18a0 474 debug ("Reserving %dk for malloc() at: %08lx\n",
fe8c2806 475 TOTAL_MALLOC_LEN >> 10, addr_sp);
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WD
476
477 /*
478 * (permanently) allocate a Board Info struct
479 * and a permanent copy of the "global" data
480 */
481 addr_sp -= sizeof (bd_t);
482 bd = (bd_t *) addr_sp;
a1c4864a 483 memset(bd, 0, sizeof(bd_t));
fe8c2806 484 gd->bd = bd;
b64f190b 485 debug ("Reserving %zu Bytes for Board Info at: %08lx\n",
fe8c2806 486 sizeof (bd_t), addr_sp);
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487 addr_sp -= sizeof (gd_t);
488 id = (gd_t *) addr_sp;
b64f190b 489 debug ("Reserving %zu Bytes for Global Data at: %08lx\n",
fe8c2806 490 sizeof (gd_t), addr_sp);
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491
492 /*
493 * Finally, we set up a new (bigger) stack.
494 *
495 * Leave some safety gap for SP, force alignment on 16 byte boundary
496 * Clear initial stack frame
497 */
498 addr_sp -= 16;
499 addr_sp &= ~0xF;
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500 s = (ulong *)addr_sp;
501 *s-- = 0;
502 *s-- = 0;
503 addr_sp = (ulong)s;
9d2b18a0 504 debug ("Stack Pointer at: %08lx\n", addr_sp);
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505
506 /*
507 * Save local variables to board info struct
508 */
509
6d0f6bcf 510 bd->bi_memstart = CONFIG_SYS_SDRAM_BASE; /* start of DRAM memory */
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511 bd->bi_memsize = gd->ram_size; /* size of DRAM memory in bytes */
512
36116650 513#ifdef CONFIG_SYS_SRAM_BASE
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514 bd->bi_sramstart = CONFIG_SYS_SRAM_BASE; /* start of SRAM memory */
515 bd->bi_sramsize = CONFIG_SYS_SRAM_SIZE; /* size of SRAM memory */
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WD
516#endif
517
42d1f039 518#if defined(CONFIG_8xx) || defined(CONFIG_8260) || defined(CONFIG_5xx) || \
debb7354 519 defined(CONFIG_E500) || defined(CONFIG_MPC86xx)
6d0f6bcf 520 bd->bi_immr_base = CONFIG_SYS_IMMR; /* base of IMMR register */
fe8c2806 521#endif
cbd8a35c 522#if defined(CONFIG_MPC5xxx)
6d0f6bcf 523 bd->bi_mbar_base = CONFIG_SYS_MBAR; /* base of internal registers */
945af8d7 524#endif
0f898604 525#if defined(CONFIG_MPC83xx)
6d0f6bcf 526 bd->bi_immrbar = CONFIG_SYS_IMMR;
f046ccd1 527#endif
983fda83 528#if defined(CONFIG_MPC8220)
6d0f6bcf 529 bd->bi_mbar_base = CONFIG_SYS_MBAR; /* base of internal registers */
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WD
530 bd->bi_inpfreq = gd->inp_clk;
531 bd->bi_pcifreq = gd->pci_clk;
532 bd->bi_vcofreq = gd->vco_clk;
533 bd->bi_pevfreq = gd->pev_clk;
534 bd->bi_flbfreq = gd->flb_clk;
535
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WD
536 /* store bootparam to sram (backward compatible), here? */
537 {
6d0f6bcf 538 u32 *sram = (u32 *)CONFIG_SYS_SRAM_BASE;
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WD
539 *sram++ = gd->ram_size;
540 *sram++ = gd->bus_clk;
541 *sram++ = gd->inp_clk;
542 *sram++ = gd->cpu_clk;
543 *sram++ = gd->vco_clk;
544 *sram++ = gd->flb_clk;
545 *sram++ = 0xb8c3ba11; /* boot signature */
546 }
983fda83 547#endif
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548
549 bd->bi_bootflags = bootflag; /* boot / reboot flag (for LynxOS) */
550
551 WATCHDOG_RESET ();
552 bd->bi_intfreq = gd->cpu_clk; /* Internal Freq, in Hz */
553 bd->bi_busfreq = gd->bus_clk; /* Bus Freq, in Hz */
9c4c5ae3 554#if defined(CONFIG_CPM2)
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555 bd->bi_cpmfreq = gd->cpm_clk;
556 bd->bi_brgfreq = gd->brg_clk;
557 bd->bi_sccfreq = gd->scc_clk;
558 bd->bi_vco = gd->vco_out;
9c4c5ae3 559#endif /* CONFIG_CPM2 */
281ff9a4 560#if defined(CONFIG_MPC512X)
5d49e0e1 561 bd->bi_ipsfreq = gd->ips_clk;
281ff9a4 562#endif /* CONFIG_MPC512X */
cbd8a35c 563#if defined(CONFIG_MPC5xxx)
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WD
564 bd->bi_ipbfreq = gd->ipb_clk;
565 bd->bi_pcifreq = gd->pci_clk;
cbd8a35c 566#endif /* CONFIG_MPC5xxx */
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567 bd->bi_baudrate = gd->baudrate; /* Console Baudrate */
568
6d0f6bcf 569#ifdef CONFIG_SYS_EXTBDINFO
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WD
570 strncpy ((char *)bd->bi_s_version, "1.2", sizeof (bd->bi_s_version));
571 strncpy ((char *)bd->bi_r_version, U_BOOT_VERSION, sizeof (bd->bi_r_version));
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572
573 bd->bi_procfreq = gd->cpu_clk; /* Processor Speed, In Hz */
574 bd->bi_plb_busfreq = gd->bus_clk;
343c48bd
SR
575#if defined(CONFIG_405GP) || defined(CONFIG_405EP) || \
576 defined(CONFIG_440EP) || defined(CONFIG_440GR) || \
577 defined(CONFIG_440EPX) || defined(CONFIG_440GRX)
fe8c2806 578 bd->bi_pci_busfreq = get_PCI_freq ();
109c0e3a 579 bd->bi_opbfreq = get_OPB_freq ();
9fea65a6 580#elif defined(CONFIG_XILINX_405)
028ab6b5 581 bd->bi_pci_busfreq = get_PCI_freq ();
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582#endif
583#endif
584
9d2b18a0 585 debug ("New Stack Pointer is: %08lx\n", addr_sp);
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586
587 WATCHDOG_RESET ();
588
589#ifdef CONFIG_POST
590 post_bootmode_init();
6dff5529 591 post_run (NULL, POST_ROM | post_bootmode_get(0));
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WD
592#endif
593
594 WATCHDOG_RESET();
595
4b99327a
RR
596 gd->relocaddr = addr; /* Record relocation address, useful for debug */
597
27b207fd 598 memcpy (id, (void *)gd, sizeof (gd_t));
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WD
599
600 relocate_code (addr_sp, id, addr);
601
602 /* NOTREACHED - relocate_code() does not return */
603}
604
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605/************************************************************************
606 *
607 * This is the next part if the initialization sequence: we are now
608 * running from RAM and have a "normal" C environment, i. e. global
609 * data can be written, BSS has been cleared, the stack size in not
610 * that critical any more, etc.
611 *
612 ************************************************************************
613 */
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WD
614void board_init_r (gd_t *id, ulong dest_addr)
615{
ff7dc067 616 char *s;
fe8c2806 617 bd_t *bd;
a483a167 618 ulong malloc_start;
fe8c2806 619
6d0f6bcf 620#ifndef CONFIG_SYS_NO_FLASH
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WD
621 ulong flash_size;
622#endif
623
624 gd = id; /* initialize RAM version of global data */
625 bd = gd->bd;
626
627 gd->flags |= GD_FLG_RELOC; /* tell others: relocation done */
f82b3b63 628
d4e8ada0 629 /* The Malloc area is immediately below the monitor copy in DRAM */
a483a167 630 malloc_start = dest_addr - TOTAL_MALLOC_LEN;
13d46ab2 631
f9476902
PT
632#if defined(CONFIG_MPC85xx) || defined(CONFIG_MPC86xx)
633 /*
634 * The gd->cpu pointer is set to an address in flash before relocation.
635 * We need to update it to point to the same CPU entry in RAM.
636 */
637 gd->cpu += dest_addr - CONFIG_SYS_MONITOR_BASE;
638#endif
639
bb105f24
MB
640#ifdef CONFIG_SERIAL_MULTI
641 serial_initialize();
642#endif
fe8c2806 643
9d2b18a0 644 debug ("Now running in RAM - U-Boot at: %08lx\n", dest_addr);
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WD
645
646 WATCHDOG_RESET ();
647
d025aa4b
BB
648 /*
649 * Setup trap handlers
650 */
651 trap_init (dest_addr);
652
c9315e6b 653#ifdef CONFIG_ADDR_MAP
ecf5b98c
KG
654 init_addr_map();
655#endif
656
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WD
657#if defined(CONFIG_BOARD_EARLY_INIT_R)
658 board_early_init_r ();
659#endif
660
3b57fe0a 661 monitor_flash_len = (ulong)&__init_end - dest_addr;
fe8c2806 662
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WD
663 WATCHDOG_RESET ();
664
56f94be3 665#ifdef CONFIG_LOGBUFFER
228f29ac 666 logbuff_init_ptrs ();
56f94be3 667#endif
fe8c2806 668#ifdef CONFIG_POST
228f29ac 669 post_output_backlog ();
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670#endif
671
672 WATCHDOG_RESET();
673
1a2e203b 674#if defined(CONFIG_SYS_DELAYED_ICACHE)
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675 icache_enable (); /* it's time to enable the instruction cache */
676#endif
677
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678#if defined(CONFIG_SYS_INIT_RAM_LOCK) && defined(CONFIG_E500)
679 unlock_ram_in_cache(); /* it's time to unlock D-cache in e500 */
42d1f039
WD
680#endif
681
76221a6c 682#if defined(CONFIG_PCI) && defined(CONFIG_SYS_EARLY_PCI_INIT)
fe8c2806 683 /*
76221a6c
AS
684 * Do early PCI configuration _before_ the flash gets initialised,
685 * because PCU ressources are crucial for flash access on some boards.
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686 */
687 pci_init ();
3bac3513
WD
688#endif
689#if defined(CONFIG_BAB7xx)
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690 /*
691 * Initialise the ISA bridge
692 */
693 initialise_w83c553f ();
694#endif
695
696 asm ("sync ; isync");
697
a483a167 698 mem_malloc_init (malloc_start, TOTAL_MALLOC_LEN);
c790b04d 699
6d0f6bcf 700#if !defined(CONFIG_SYS_NO_FLASH)
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701 puts ("FLASH: ");
702
703 if ((flash_size = flash_init ()) > 0) {
6d0f6bcf 704# ifdef CONFIG_SYS_FLASH_CHECKSUM
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705 print_size (flash_size, "");
706 /*
707 * Compute and print flash CRC if flashchecksum is set to 'y'
708 *
709 * NOTE: Maybe we should add some WATCHDOG_RESET()? XXX
710 */
711 s = getenv ("flashchecksum");
712 if (s && (*s == 'y')) {
06c53bea 713 printf (" CRC: %08X",
6d0f6bcf 714 crc32 (0, (const unsigned char *) CONFIG_SYS_FLASH_BASE, flash_size)
7e780369 715 );
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716 }
717 putc ('\n');
6d0f6bcf 718# else /* !CONFIG_SYS_FLASH_CHECKSUM */
fe8c2806 719 print_size (flash_size, "\n");
6d0f6bcf 720# endif /* CONFIG_SYS_FLASH_CHECKSUM */
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721 } else {
722 puts (failed);
723 hang ();
724 }
725
6d0f6bcf 726 bd->bi_flashstart = CONFIG_SYS_FLASH_BASE; /* update start of FLASH memory */
fe8c2806 727 bd->bi_flashsize = flash_size; /* size of FLASH memory (final value) */
fa230445 728
6d0f6bcf 729#if defined(CONFIG_SYS_UPDATE_FLASH_SIZE)
fa230445
HS
730 /* Make a update of the Memctrl. */
731 update_flash_size (flash_size);
732#endif
733
734
544d97e9 735# if defined(CONFIG_OXC) || defined(CONFIG_RMU)
7e780369 736 /* flash mapped at end of memory map */
14d0a02a 737 bd->bi_flashoffset = CONFIG_SYS_TEXT_BASE + flash_size;
6d0f6bcf 738# elif CONFIG_SYS_MONITOR_BASE == CONFIG_SYS_FLASH_BASE
3b57fe0a 739 bd->bi_flashoffset = monitor_flash_len; /* reserved area for startup monitor */
0cb61d7d 740# endif
6d0f6bcf 741#endif /* !CONFIG_SYS_NO_FLASH */
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742
743 WATCHDOG_RESET ();
744
745 /* initialize higher level parts of CPU like time base and timers */
746 cpu_init_r ();
747
748 WATCHDOG_RESET ();
749
fe8c2806 750#ifdef CONFIG_SPI
bb1f8b4f 751# if !defined(CONFIG_ENV_IS_IN_EEPROM)
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WD
752 spi_init_f ();
753# endif
754 spi_init_r ();
755#endif
756
7def6b34 757#if defined(CONFIG_CMD_NAND)
887e2ec9
SR
758 WATCHDOG_RESET ();
759 puts ("NAND: ");
760 nand_init(); /* go init the NAND */
761#endif
762
a8060359
TL
763#ifdef CONFIG_GENERIC_MMC
764/*
765 * MMC initialization is called before relocating env.
766 * Thus It is required that operations like pin multiplexer
767 * be put in board_init.
768 */
769 WATCHDOG_RESET ();
770 puts ("MMC: ");
771 mmc_initialize (bd);
772#endif
773
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WD
774 /* relocate environment function pointers etc. */
775 env_relocate ();
776
777 /*
778 * Fill in missing fields of bd_info.
8bde7f77
WD
779 * We do this here, where we have "normal" access to the
780 * environment; we used to do this still running from ROM,
cdb74977 781 * where had to use getenv_f(), which can be pretty slow when
8bde7f77 782 * the environment is in EEPROM.
fe8c2806 783 */
7abf0c58 784
6d0f6bcf 785#if defined(CONFIG_SYS_EXTBDINFO)
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WD
786#if defined(CONFIG_405GP) || defined(CONFIG_405EP)
787#if defined(CONFIG_I2CFAST)
788 /*
789 * set bi_iic_fast for linux taking environment variable
790 * "i2cfast" into account
791 */
792 {
793 char *s = getenv ("i2cfast");
794 if (s && ((*s == 'y') || (*s == 'Y'))) {
795 bd->bi_iic_fast[0] = 1;
796 bd->bi_iic_fast[1] = 1;
7abf0c58
WD
797 }
798 }
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WD
799#endif /* CONFIG_I2CFAST */
800#endif /* CONFIG_405GP, CONFIG_405EP */
6d0f6bcf 801#endif /* CONFIG_SYS_EXTBDINFO */
7abf0c58 802
9045f33c 803#if defined(CONFIG_SC3)
ca43ba18
HS
804 sc3_read_eeprom();
805#endif
d59feffb 806
6d0f6bcf 807#if defined (CONFIG_ID_EEPROM) || defined (CONFIG_SYS_I2C_MAC_OFFSET)
d59feffb
HW
808 mac_read_from_eeprom();
809#endif
810
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WD
811#ifdef CONFIG_HERMES
812 if ((gd->board_type >> 16) == 2)
813 bd->bi_ethspeed = gd->board_type & 0xFFFF;
814 else
815 bd->bi_ethspeed = 0xFFFF;
816#endif
817
02a301cd 818#ifdef CONFIG_CMD_NET
eb85aa59
MF
819 /* kept around for legacy kernels only ... ignore the next section */
820 eth_getenv_enetaddr("ethaddr", bd->bi_enetaddr);
e2ffd59b 821#ifdef CONFIG_HAS_ETH1
eb85aa59 822 eth_getenv_enetaddr("eth1addr", bd->bi_enet1addr);
fe8c2806 823#endif
e2ffd59b 824#ifdef CONFIG_HAS_ETH2
eb85aa59 825 eth_getenv_enetaddr("eth2addr", bd->bi_enet2addr);
fe8c2806 826#endif
e2ffd59b 827#ifdef CONFIG_HAS_ETH3
eb85aa59 828 eth_getenv_enetaddr("eth3addr", bd->bi_enet3addr);
ba56f625 829#endif
c68a05fe 830#ifdef CONFIG_HAS_ETH4
eb85aa59 831 eth_getenv_enetaddr("eth4addr", bd->bi_enet4addr);
c68a05fe 832#endif
c68a05fe 833#ifdef CONFIG_HAS_ETH5
eb85aa59 834 eth_getenv_enetaddr("eth5addr", bd->bi_enet5addr);
c68a05fe 835#endif
02a301cd 836#endif /* CONFIG_CMD_NET */
c68a05fe 837
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WD
838 /* IP Address */
839 bd->bi_ip_addr = getenv_IPaddr ("ipaddr");
840
841 WATCHDOG_RESET ();
842
76221a6c 843#if defined(CONFIG_PCI) && !defined(CONFIG_SYS_EARLY_PCI_INIT)
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WD
844 /*
845 * Do pci configuration
846 */
847 pci_init ();
848#endif
849
850/** leave this here (after malloc(), environment and PCI are working) **/
52cb4d4f
JCPV
851 /* Initialize stdio devices */
852 stdio_init ();
fe8c2806 853
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WD
854 /* Initialize the jump table for applications */
855 jumptable_init ();
fe8c2806 856
500856eb
RJ
857#if defined(CONFIG_API)
858 /* Initialize API */
859 api_init ();
860#endif
861
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WD
862 /* Initialize the console (after the relocation and devices init) */
863 console_init_r ();
fe8c2806 864
3a8f28d0 865#if defined(CONFIG_MISC_INIT_R)
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WD
866 /* miscellaneous platform dependent initialisations */
867 misc_init_r ();
868#endif
869
870#ifdef CONFIG_HERMES
871 if (bd->bi_ethspeed != 0xFFFF)
872 hermes_start_lxt980 ((int) bd->bi_ethspeed);
873#endif
874
7def6b34 875#if defined(CONFIG_CMD_KGDB)
fe8c2806
WD
876 WATCHDOG_RESET ();
877 puts ("KGDB: ");
878 kgdb_init ();
879#endif
880
9d2b18a0 881 debug ("U-Boot relocated to %08lx\n", dest_addr);
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882
883 /*
884 * Enable Interrupts
885 */
886 interrupt_init ();
887
566a494f 888#if defined(CONFIG_STATUS_LED) && defined(STATUS_LED_BOOT)
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WD
889 status_led_set (STATUS_LED_BOOT, STATUS_LED_BLINKING);
890#endif
891
892 udelay (20);
893
894 set_timer (0);
895
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896 /* Initialize from environment */
897 if ((s = getenv ("loadaddr")) != NULL) {
898 load_addr = simple_strtoul (s, NULL, 16);
899 }
7def6b34 900#if defined(CONFIG_CMD_NET)
fe8c2806
WD
901 if ((s = getenv ("bootfile")) != NULL) {
902 copy_filename (BootFile, s, sizeof (BootFile));
903 }
b3aff0cb 904#endif
fe8c2806
WD
905
906 WATCHDOG_RESET ();
907
9c2d63ec
HS
908#if defined(CONFIG_DTT) /* Digital Thermometers and Thermostats */
909 dtt_init ();
910#endif
7def6b34 911#if defined(CONFIG_CMD_SCSI)
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WD
912 WATCHDOG_RESET ();
913 puts ("SCSI: ");
914 scsi_init ();
915#endif
916
7def6b34 917#if defined(CONFIG_CMD_DOC)
fe8c2806
WD
918 WATCHDOG_RESET ();
919 puts ("DOC: ");
920 doc_init ();
921#endif
922
310cecb8
LCM
923#ifdef CONFIG_BITBANGMII
924 bb_miiphy_init();
925#endif
7def6b34 926#if defined(CONFIG_CMD_NET)
63ff004c 927#if defined(CONFIG_NET_MULTI)
fe8c2806
WD
928 WATCHDOG_RESET ();
929 puts ("Net: ");
63ff004c 930#endif
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WD
931 eth_initialize (bd);
932#endif
933
004eca0c 934#if defined(CONFIG_CMD_NET) && defined(CONFIG_RESET_PHY_R)
63ff004c
MB
935 WATCHDOG_RESET ();
936 debug ("Reset Ethernet PHY\n");
937 reset_phy ();
938#endif
939
fe8c2806 940#ifdef CONFIG_POST
6dff5529 941 post_run (NULL, POST_RAM | post_bootmode_get(0));
fe8c2806
WD
942#endif
943
7def6b34
JL
944#if defined(CONFIG_CMD_PCMCIA) \
945 && !defined(CONFIG_CMD_IDE)
fe8c2806
WD
946 WATCHDOG_RESET ();
947 puts ("PCMCIA:");
948 pcmcia_init ();
949#endif
950
7def6b34 951#if defined(CONFIG_CMD_IDE)
fe8c2806
WD
952 WATCHDOG_RESET ();
953# ifdef CONFIG_IDE_8xx_PCCARD
954 puts ("PCMCIA:");
955# else
956 puts ("IDE: ");
957#endif
ca43ba18
HS
958#if defined(CONFIG_START_IDE)
959 if (board_start_ide())
960 ide_init ();
961#else
fe8c2806 962 ide_init ();
ca43ba18 963#endif
b3aff0cb 964#endif
fe8c2806
WD
965
966#ifdef CONFIG_LAST_STAGE_INIT
967 WATCHDOG_RESET ();
968 /*
969 * Some parts can be only initialized if all others (like
970 * Interrupts) are up and running (i.e. the PC-style ISA
971 * keyboard).
972 */
973 last_stage_init ();
974#endif
975
7def6b34 976#if defined(CONFIG_CMD_BEDBUG)
fe8c2806
WD
977 WATCHDOG_RESET ();
978 bedbug_init ();
979#endif
980
228f29ac 981#if defined(CONFIG_PRAM) || defined(CONFIG_LOGBUFFER)
fe8c2806
WD
982 /*
983 * Export available size of memory for Linux,
984 * taking into account the protected RAM at top of memory
985 */
986 {
987 ulong pram;
fe8c2806 988 uchar memsz[32];
228f29ac
WD
989#ifdef CONFIG_PRAM
990 char *s;
fe8c2806
WD
991
992 if ((s = getenv ("pram")) != NULL) {
993 pram = simple_strtoul (s, NULL, 10);
994 } else {
995 pram = CONFIG_PRAM;
996 }
228f29ac
WD
997#else
998 pram=0;
999#endif
1000#ifdef CONFIG_LOGBUFFER
3d610186 1001#ifndef CONFIG_ALT_LB_ADDR
228f29ac
WD
1002 /* Also take the logbuffer into account (pram is in kB) */
1003 pram += (LOGBUFF_LEN+LOGBUFF_OVERHEAD)/1024;
3d610186 1004#endif
228f29ac 1005#endif
77ddac94
WD
1006 sprintf ((char *)memsz, "%ldk", (bd->bi_memsize / 1024) - pram);
1007 setenv ("mem", (char *)memsz);
fe8c2806
WD
1008 }
1009#endif
1010
1c43771b
WD
1011#ifdef CONFIG_PS2KBD
1012 puts ("PS/2: ");
1013 kbd_init();
1014#endif
1015
4532cb69
WD
1016#ifdef CONFIG_MODEM_SUPPORT
1017 {
1018 extern int do_mdm_init;
1019 do_mdm_init = gd->do_mdm_init;
1020 }
1021#endif
1022
fe8c2806
WD
1023 /* Initialization complete - start the monitor */
1024
1025 /* main_loop() can return to retry autoboot, if so just run it again. */
1026 for (;;) {
1027 WATCHDOG_RESET ();
1028 main_loop ();
1029 }
1030
1031 /* NOTREACHED - no way out of command loop except booting */
1032}
1033
1034void hang (void)
1035{
1036 puts ("### ERROR ### Please RESET the board ###\n");
63e73c9a 1037 show_boot_progress(-30);
fe8c2806
WD
1038 for (;;);
1039}
1040
4532cb69 1041
fe8c2806
WD
1042#if 0 /* We could use plain global data, but the resulting code is bigger */
1043/*
1044 * Pointer to initial global data area
1045 *
1046 * Here we initialize it.
1047 */
1048#undef XTRN_DECLARE_GLOBAL_DATA_PTR
1049#define XTRN_DECLARE_GLOBAL_DATA_PTR /* empty = allocate here */
6d0f6bcf 1050DECLARE_GLOBAL_DATA_PTR = (gd_t *) (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_GBL_DATA_OFFSET);
fe8c2806
WD
1051#endif /* 0 */
1052
1053/************************************************************************/