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14cf11af PM |
1 | /* |
2 | * Declarations of procedures and variables shared between files | |
3 | * in arch/ppc/mm/. | |
4 | * | |
5 | * Derived from arch/ppc/mm/init.c: | |
6 | * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org) | |
7 | * | |
8 | * Modifications by Paul Mackerras (PowerMac) (paulus@cs.anu.edu.au) | |
9 | * and Cort Dougan (PReP) (cort@cs.nmt.edu) | |
10 | * Copyright (C) 1996 Paul Mackerras | |
14cf11af PM |
11 | * |
12 | * Derived from "arch/i386/mm/init.c" | |
13 | * Copyright (C) 1991, 1992, 1993, 1994 Linus Torvalds | |
14 | * | |
15 | * This program is free software; you can redistribute it and/or | |
16 | * modify it under the terms of the GNU General Public License | |
17 | * as published by the Free Software Foundation; either version | |
18 | * 2 of the License, or (at your option) any later version. | |
19 | * | |
20 | */ | |
62102307 | 21 | #include <linux/mm.h> |
14cf11af PM |
22 | #include <asm/mmu.h> |
23 | ||
2a4aca11 BH |
24 | #ifdef CONFIG_PPC_MMU_NOHASH |
25 | ||
26 | /* | |
27 | * On 40x and 8xx, we directly inline tlbia and tlbivax | |
28 | */ | |
968159c0 | 29 | #if defined(CONFIG_40x) || defined(CONFIG_PPC_8xx) |
2a4aca11 BH |
30 | static inline void _tlbil_all(void) |
31 | { | |
4a082682 | 32 | asm volatile ("sync; tlbia; isync" : : : "memory"); |
2a4aca11 BH |
33 | } |
34 | static inline void _tlbil_pid(unsigned int pid) | |
35 | { | |
4a082682 | 36 | asm volatile ("sync; tlbia; isync" : : : "memory"); |
2a4aca11 | 37 | } |
d4e167da BH |
38 | #define _tlbil_pid_noind(pid) _tlbil_pid(pid) |
39 | ||
968159c0 | 40 | #else /* CONFIG_40x || CONFIG_PPC_8xx */ |
2a4aca11 BH |
41 | extern void _tlbil_all(void); |
42 | extern void _tlbil_pid(unsigned int pid); | |
25d21ad6 BH |
43 | #ifdef CONFIG_PPC_BOOK3E |
44 | extern void _tlbil_pid_noind(unsigned int pid); | |
45 | #else | |
d4e167da | 46 | #define _tlbil_pid_noind(pid) _tlbil_pid(pid) |
25d21ad6 | 47 | #endif |
968159c0 | 48 | #endif /* !(CONFIG_40x || CONFIG_PPC_8xx) */ |
2a4aca11 BH |
49 | |
50 | /* | |
51 | * On 8xx, we directly inline tlbie, on others, it's extern | |
52 | */ | |
968159c0 | 53 | #ifdef CONFIG_PPC_8xx |
d4e167da BH |
54 | static inline void _tlbil_va(unsigned long address, unsigned int pid, |
55 | unsigned int tsize, unsigned int ind) | |
2a4aca11 | 56 | { |
4a082682 | 57 | asm volatile ("tlbie %0; sync" : : "r" (address) : "memory"); |
2a4aca11 | 58 | } |
25d21ad6 BH |
59 | #elif defined(CONFIG_PPC_BOOK3E) |
60 | extern void _tlbil_va(unsigned long address, unsigned int pid, | |
61 | unsigned int tsize, unsigned int ind); | |
62 | #else | |
d4e167da BH |
63 | extern void __tlbil_va(unsigned long address, unsigned int pid); |
64 | static inline void _tlbil_va(unsigned long address, unsigned int pid, | |
65 | unsigned int tsize, unsigned int ind) | |
66 | { | |
67 | __tlbil_va(address, pid); | |
68 | } | |
968159c0 | 69 | #endif /* CONFIG_PPC_8xx */ |
2a4aca11 | 70 | |
e7f75ad0 | 71 | #if defined(CONFIG_PPC_BOOK3E) || defined(CONFIG_PPC_47x) |
25d21ad6 BH |
72 | extern void _tlbivax_bcast(unsigned long address, unsigned int pid, |
73 | unsigned int tsize, unsigned int ind); | |
74 | #else | |
d4e167da BH |
75 | static inline void _tlbivax_bcast(unsigned long address, unsigned int pid, |
76 | unsigned int tsize, unsigned int ind) | |
2a4aca11 BH |
77 | { |
78 | BUG(); | |
79 | } | |
25d21ad6 | 80 | #endif |
2a4aca11 BH |
81 | |
82 | #else /* CONFIG_PPC_MMU_NOHASH */ | |
83 | ||
ee4f2ea4 | 84 | extern void hash_preload(struct mm_struct *mm, unsigned long ea, |
34eb138e | 85 | bool is_exec, unsigned long trap); |
ee4f2ea4 BH |
86 | |
87 | ||
2a4aca11 BH |
88 | extern void _tlbie(unsigned long address); |
89 | extern void _tlbia(void); | |
90 | ||
91 | #endif /* CONFIG_PPC_MMU_NOHASH */ | |
92 | ||
ab1f9dac | 93 | #ifdef CONFIG_PPC32 |
19f5465e | 94 | |
14cf11af | 95 | extern void mapin_ram(void); |
7c5c4325 | 96 | extern void setbat(int index, unsigned long virt, phys_addr_t phys, |
5dd4e4f6 | 97 | unsigned int size, pgprot_t prot); |
14cf11af PM |
98 | |
99 | extern int __map_without_bats; | |
14cf11af PM |
100 | extern unsigned int rtas_data, rtas_size; |
101 | ||
8e561e7e DG |
102 | struct hash_pte; |
103 | extern struct hash_pte *Hash, *Hash_end; | |
14cf11af | 104 | extern unsigned long Hash_size, Hash_mask; |
32a74949 BH |
105 | |
106 | #endif /* CONFIG_PPC32 */ | |
107 | ||
800fc3ee | 108 | extern unsigned long ioremap_bot; |
ab1f9dac | 109 | extern unsigned long __max_low_memory; |
09b5e63f | 110 | extern phys_addr_t __initial_memory_limit_addr; |
2bf3016f SR |
111 | extern phys_addr_t total_memory; |
112 | extern phys_addr_t total_lowmem; | |
99c62dd7 | 113 | extern phys_addr_t memstart_addr; |
d7917ba7 | 114 | extern phys_addr_t lowmem_end_addr; |
14cf11af | 115 | |
de32400d AH |
116 | #ifdef CONFIG_WII |
117 | extern unsigned long wii_hole_start; | |
118 | extern unsigned long wii_hole_size; | |
119 | ||
120 | extern unsigned long wii_mmu_mapin_mem2(unsigned long top); | |
121 | extern void wii_memory_fixups(void); | |
122 | #endif | |
123 | ||
14cf11af PM |
124 | /* ...and now those things that may be slightly different between processor |
125 | * architectures. -- Dan | |
126 | */ | |
a372acfa | 127 | #ifdef CONFIG_PPC32 |
14cf11af | 128 | extern void MMU_init_hw(void); |
ae4cec47 | 129 | extern unsigned long mmu_mapin_ram(unsigned long top); |
a372acfa | 130 | #endif |
14cf11af | 131 | |
a372acfa | 132 | #ifdef CONFIG_PPC_FSL_BOOK3E |
eba5de8d SW |
133 | extern unsigned long map_mem_in_cams(unsigned long ram, int max_cam_idx, |
134 | bool dryrun); | |
1dc91c3e KG |
135 | extern unsigned long calc_cam_sz(unsigned long ram, unsigned long virt, |
136 | phys_addr_t phys); | |
55fd766b | 137 | #ifdef CONFIG_PPC32 |
14cf11af | 138 | extern void adjust_total_lowmem(void); |
78a235ef | 139 | extern int switch_to_as1(void); |
0be7d969 | 140 | extern void restore_to_as0(int esel, int offset, void *dt_ptr, int bootcpu); |
55fd766b | 141 | #endif |
78f62237 | 142 | extern void loadcam_entry(unsigned int index); |
d9e1831a | 143 | extern void loadcam_multi(int first_idx, int num, int tmp_idx); |
78f62237 KG |
144 | |
145 | struct tlbcam { | |
146 | u32 MAS0; | |
147 | u32 MAS1; | |
148 | unsigned long MAS2; | |
149 | u32 MAS3; | |
150 | u32 MAS7; | |
151 | }; | |
14cf11af | 152 | #endif |
3084cdb7 | 153 | |
4badd43a | 154 | #if defined(CONFIG_6xx) || defined(CONFIG_FSL_BOOKE) || defined(CONFIG_PPC_8xx) |
3084cdb7 CL |
155 | /* 6xx have BATS */ |
156 | /* FSL_BOOKE have TLBCAM */ | |
4badd43a | 157 | /* 8xx have LTLB */ |
3084cdb7 CL |
158 | phys_addr_t v_block_mapped(unsigned long va); |
159 | unsigned long p_block_mapped(phys_addr_t pa); | |
160 | #else | |
161 | static inline phys_addr_t v_block_mapped(unsigned long va) { return 0; } | |
162 | static inline unsigned long p_block_mapped(phys_addr_t pa) { return 0; } | |
163 | #endif |