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14cf11af PM |
1 | /* |
2 | * Declarations of procedures and variables shared between files | |
3 | * in arch/ppc/mm/. | |
4 | * | |
5 | * Derived from arch/ppc/mm/init.c: | |
6 | * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org) | |
7 | * | |
8 | * Modifications by Paul Mackerras (PowerMac) (paulus@cs.anu.edu.au) | |
9 | * and Cort Dougan (PReP) (cort@cs.nmt.edu) | |
10 | * Copyright (C) 1996 Paul Mackerras | |
14cf11af PM |
11 | * |
12 | * Derived from "arch/i386/mm/init.c" | |
13 | * Copyright (C) 1991, 1992, 1993, 1994 Linus Torvalds | |
14 | * | |
15 | * This program is free software; you can redistribute it and/or | |
16 | * modify it under the terms of the GNU General Public License | |
17 | * as published by the Free Software Foundation; either version | |
18 | * 2 of the License, or (at your option) any later version. | |
19 | * | |
20 | */ | |
62102307 | 21 | #include <linux/mm.h> |
14cf11af PM |
22 | #include <asm/mmu.h> |
23 | ||
2a4aca11 | 24 | #ifdef CONFIG_PPC_MMU_NOHASH |
cf4a6085 | 25 | #include <asm/trace.h> |
2a4aca11 BH |
26 | |
27 | /* | |
28 | * On 40x and 8xx, we directly inline tlbia and tlbivax | |
29 | */ | |
968159c0 | 30 | #if defined(CONFIG_40x) || defined(CONFIG_PPC_8xx) |
2a4aca11 BH |
31 | static inline void _tlbil_all(void) |
32 | { | |
4a082682 | 33 | asm volatile ("sync; tlbia; isync" : : : "memory"); |
2a4aca11 BH |
34 | } |
35 | static inline void _tlbil_pid(unsigned int pid) | |
36 | { | |
4a082682 | 37 | asm volatile ("sync; tlbia; isync" : : : "memory"); |
2a4aca11 | 38 | } |
d4e167da BH |
39 | #define _tlbil_pid_noind(pid) _tlbil_pid(pid) |
40 | ||
968159c0 | 41 | #else /* CONFIG_40x || CONFIG_PPC_8xx */ |
2a4aca11 BH |
42 | extern void _tlbil_all(void); |
43 | extern void _tlbil_pid(unsigned int pid); | |
25d21ad6 BH |
44 | #ifdef CONFIG_PPC_BOOK3E |
45 | extern void _tlbil_pid_noind(unsigned int pid); | |
46 | #else | |
d4e167da | 47 | #define _tlbil_pid_noind(pid) _tlbil_pid(pid) |
25d21ad6 | 48 | #endif |
968159c0 | 49 | #endif /* !(CONFIG_40x || CONFIG_PPC_8xx) */ |
2a4aca11 BH |
50 | |
51 | /* | |
52 | * On 8xx, we directly inline tlbie, on others, it's extern | |
53 | */ | |
968159c0 | 54 | #ifdef CONFIG_PPC_8xx |
d4e167da BH |
55 | static inline void _tlbil_va(unsigned long address, unsigned int pid, |
56 | unsigned int tsize, unsigned int ind) | |
2a4aca11 | 57 | { |
4a082682 | 58 | asm volatile ("tlbie %0; sync" : : "r" (address) : "memory"); |
cf4a6085 | 59 | trace_tlbie(0, 0, address, pid, 0, 0, 0); |
2a4aca11 | 60 | } |
25d21ad6 BH |
61 | #elif defined(CONFIG_PPC_BOOK3E) |
62 | extern void _tlbil_va(unsigned long address, unsigned int pid, | |
63 | unsigned int tsize, unsigned int ind); | |
64 | #else | |
d4e167da BH |
65 | extern void __tlbil_va(unsigned long address, unsigned int pid); |
66 | static inline void _tlbil_va(unsigned long address, unsigned int pid, | |
67 | unsigned int tsize, unsigned int ind) | |
68 | { | |
69 | __tlbil_va(address, pid); | |
70 | } | |
968159c0 | 71 | #endif /* CONFIG_PPC_8xx */ |
2a4aca11 | 72 | |
e7f75ad0 | 73 | #if defined(CONFIG_PPC_BOOK3E) || defined(CONFIG_PPC_47x) |
25d21ad6 BH |
74 | extern void _tlbivax_bcast(unsigned long address, unsigned int pid, |
75 | unsigned int tsize, unsigned int ind); | |
76 | #else | |
d4e167da BH |
77 | static inline void _tlbivax_bcast(unsigned long address, unsigned int pid, |
78 | unsigned int tsize, unsigned int ind) | |
2a4aca11 BH |
79 | { |
80 | BUG(); | |
81 | } | |
25d21ad6 | 82 | #endif |
2a4aca11 BH |
83 | |
84 | #else /* CONFIG_PPC_MMU_NOHASH */ | |
85 | ||
ee4f2ea4 | 86 | extern void hash_preload(struct mm_struct *mm, unsigned long ea, |
34eb138e | 87 | bool is_exec, unsigned long trap); |
ee4f2ea4 BH |
88 | |
89 | ||
2a4aca11 BH |
90 | extern void _tlbie(unsigned long address); |
91 | extern void _tlbia(void); | |
92 | ||
93 | #endif /* CONFIG_PPC_MMU_NOHASH */ | |
94 | ||
ab1f9dac | 95 | #ifdef CONFIG_PPC32 |
19f5465e | 96 | |
14cf11af | 97 | extern void mapin_ram(void); |
7c5c4325 | 98 | extern void setbat(int index, unsigned long virt, phys_addr_t phys, |
5dd4e4f6 | 99 | unsigned int size, pgprot_t prot); |
14cf11af PM |
100 | |
101 | extern int __map_without_bats; | |
14cf11af PM |
102 | extern unsigned int rtas_data, rtas_size; |
103 | ||
8e561e7e DG |
104 | struct hash_pte; |
105 | extern struct hash_pte *Hash, *Hash_end; | |
14cf11af | 106 | extern unsigned long Hash_size, Hash_mask; |
32a74949 BH |
107 | |
108 | #endif /* CONFIG_PPC32 */ | |
109 | ||
800fc3ee | 110 | extern unsigned long ioremap_bot; |
ab1f9dac | 111 | extern unsigned long __max_low_memory; |
09b5e63f | 112 | extern phys_addr_t __initial_memory_limit_addr; |
2bf3016f SR |
113 | extern phys_addr_t total_memory; |
114 | extern phys_addr_t total_lowmem; | |
99c62dd7 | 115 | extern phys_addr_t memstart_addr; |
d7917ba7 | 116 | extern phys_addr_t lowmem_end_addr; |
14cf11af | 117 | |
de32400d AH |
118 | #ifdef CONFIG_WII |
119 | extern unsigned long wii_hole_start; | |
120 | extern unsigned long wii_hole_size; | |
121 | ||
122 | extern unsigned long wii_mmu_mapin_mem2(unsigned long top); | |
123 | extern void wii_memory_fixups(void); | |
124 | #endif | |
125 | ||
14cf11af PM |
126 | /* ...and now those things that may be slightly different between processor |
127 | * architectures. -- Dan | |
128 | */ | |
a372acfa | 129 | #ifdef CONFIG_PPC32 |
14cf11af | 130 | extern void MMU_init_hw(void); |
ae4cec47 | 131 | extern unsigned long mmu_mapin_ram(unsigned long top); |
a372acfa | 132 | #endif |
14cf11af | 133 | |
a372acfa | 134 | #ifdef CONFIG_PPC_FSL_BOOK3E |
eba5de8d SW |
135 | extern unsigned long map_mem_in_cams(unsigned long ram, int max_cam_idx, |
136 | bool dryrun); | |
1dc91c3e KG |
137 | extern unsigned long calc_cam_sz(unsigned long ram, unsigned long virt, |
138 | phys_addr_t phys); | |
55fd766b | 139 | #ifdef CONFIG_PPC32 |
14cf11af | 140 | extern void adjust_total_lowmem(void); |
78a235ef | 141 | extern int switch_to_as1(void); |
0be7d969 | 142 | extern void restore_to_as0(int esel, int offset, void *dt_ptr, int bootcpu); |
55fd766b | 143 | #endif |
78f62237 | 144 | extern void loadcam_entry(unsigned int index); |
d9e1831a | 145 | extern void loadcam_multi(int first_idx, int num, int tmp_idx); |
78f62237 KG |
146 | |
147 | struct tlbcam { | |
148 | u32 MAS0; | |
149 | u32 MAS1; | |
150 | unsigned long MAS2; | |
151 | u32 MAS3; | |
152 | u32 MAS7; | |
153 | }; | |
14cf11af | 154 | #endif |
3084cdb7 | 155 | |
4badd43a | 156 | #if defined(CONFIG_6xx) || defined(CONFIG_FSL_BOOKE) || defined(CONFIG_PPC_8xx) |
3084cdb7 CL |
157 | /* 6xx have BATS */ |
158 | /* FSL_BOOKE have TLBCAM */ | |
4badd43a | 159 | /* 8xx have LTLB */ |
3084cdb7 CL |
160 | phys_addr_t v_block_mapped(unsigned long va); |
161 | unsigned long p_block_mapped(phys_addr_t pa); | |
162 | #else | |
163 | static inline phys_addr_t v_block_mapped(unsigned long va) { return 0; } | |
164 | static inline unsigned long p_block_mapped(phys_addr_t pa) { return 0; } | |
165 | #endif |