[thirdparty/kernel/linux.git] / arch / s390 / include / asm / qdio.h

/* SPDX-License-Identifier: GPL-2.0 */
/*
 * Copyright IBM Corp. 2000, 2008
 * Author(s): Utz Bacher <utz.bacher@de.ibm.com>
 *	      Jan Glauber <jang@linux.vnet.ibm.com>
 *
 */
#ifndef __QDIO_H__
#define __QDIO_H__

#include <linux/interrupt.h>
#include <asm/cio.h>
#include <asm/ccwdev.h>

/* only use 4 queues to save some cachelines */
#define QDIO_MAX_QUEUES_PER_IRQ		4
#define QDIO_MAX_BUFFERS_PER_Q		128
#define QDIO_MAX_BUFFERS_MASK		(QDIO_MAX_BUFFERS_PER_Q - 1)
#define QDIO_MAX_ELEMENTS_PER_BUFFER	16
#define QDIO_SBAL_SIZE			256

#define QDIO_QETH_QFMT			0
#define QDIO_ZFCP_QFMT			1
#define QDIO_IQDIO_QFMT			2

/**
 * struct qdesfmt0 - queue descriptor, format 0
 * @sliba: storage list information block address
 * @sla: storage list address
 * @slsba: storage list state block address
 * @akey: access key for DLIB
 * @bkey: access key for SL
 * @ckey: access key for SBALs
 * @dkey: access key for SLSB
 */
struct qdesfmt0 {
	u64 sliba;
	u64 sla;
	u64 slsba;
	u32	 : 32;
	u32 akey : 4;
	u32 bkey : 4;
	u32 ckey : 4;
	u32 dkey : 4;
	u32	 : 16;
} __attribute__ ((packed));

#define QDR_AC_MULTI_BUFFER_ENABLE 0x01

/**
 * struct qdr - queue description record (QDR)
 * @qfmt: queue format
 * @pfmt: implementation dependent parameter format
 * @ac: adapter characteristics
 * @iqdcnt: input queue descriptor count
 * @oqdcnt: output queue descriptor count
 * @iqdsz: inpout queue descriptor size
 * @oqdsz: output queue descriptor size
 * @qiba: queue information block address
 * @qkey: queue information block key
 * @qdf0: queue descriptions
 */
struct qdr {
	u32 qfmt   : 8;
	u32 pfmt   : 8;
	u32	   : 8;
	u32 ac	   : 8;
	u32	   : 8;
	u32 iqdcnt : 8;
	u32	   : 8;
	u32 oqdcnt : 8;
	u32	   : 8;
	u32 iqdsz  : 8;
	u32	   : 8;
	u32 oqdsz  : 8;
	/* private: */
	u32 res[9];
	/* public: */
	u64 qiba;
	u32	   : 32;
	u32 qkey   : 4;
	u32	   : 28;
	struct qdesfmt0 qdf0[126];
} __packed __aligned(PAGE_SIZE);

#define QIB_AC_OUTBOUND_PCI_SUPPORTED	0x40
#define QIB_RFLAGS_ENABLE_QEBSM		0x80
#define QIB_RFLAGS_ENABLE_DATA_DIV	0x02

/**
 * struct qib - queue information block (QIB)
 * @qfmt: queue format
 * @pfmt: implementation dependent parameter format
 * @rflags: QEBSM
 * @ac: adapter characteristics
 * @isliba: absolute address of first input SLIB
 * @osliba: absolute address of first output SLIB
 * @ebcnam: adapter identifier in EBCDIC
 * @parm: implementation dependent parameters
 */
struct qib {
	u32 qfmt   : 8;
	u32 pfmt   : 8;
	u32 rflags : 8;
	u32 ac	   : 8;
	u32	   : 32;
	u64 isliba;
	u64 osliba;
	u32	   : 32;
	u32	   : 32;
	u8 ebcnam[8];
	/* private: */
	u8 res[88];
	/* public: */
	u8 parm[QDIO_MAX_BUFFERS_PER_Q];
} __attribute__ ((packed, aligned(256)));

/**
 * struct slibe - storage list information block element (SLIBE)
 * @parms: implementation dependent parameters
 */
struct slibe {
	u64 parms;
};

/**
 * struct qaob - queue asynchronous operation block
 * @res0: reserved parameters
 * @res1: reserved parameter
 * @res2: reserved parameter
 * @res3: reserved parameter
 * @aorc: asynchronous operation return code
 * @flags: internal flags
 * @cbtbs: control block type
 * @sb_count: number of storage blocks
 * @sba: storage block element addresses
 * @dcount: size of storage block elements
 * @user0: user defineable value
 * @res4: reserved paramater
 * @user1: user defineable value
 * @user2: user defineable value
 */
struct qaob {
	u64 res0[6];
	u8 res1;
	u8 res2;
	u8 res3;
	u8 aorc;
	u8 flags;
	u16 cbtbs;
	u8 sb_count;
	u64 sba[QDIO_MAX_ELEMENTS_PER_BUFFER];
	u16 dcount[QDIO_MAX_ELEMENTS_PER_BUFFER];
	u64 user0;
	u64 res4[2];
	u64 user1;
	u64 user2;
} __attribute__ ((packed, aligned(256)));

/**
 * struct slib - storage list information block (SLIB)
 * @nsliba: next SLIB address (if any)
 * @sla: SL address
 * @slsba: SLSB address
 * @slibe: SLIB elements
 */
struct slib {
	u64 nsliba;
	u64 sla;
	u64 slsba;
	/* private: */
	u8 res[1000];
	/* public: */
	struct slibe slibe[QDIO_MAX_BUFFERS_PER_Q];
} __attribute__ ((packed, aligned(2048)));

#define SBAL_EFLAGS_LAST_ENTRY		0x40
#define SBAL_EFLAGS_CONTIGUOUS		0x20
#define SBAL_EFLAGS_FIRST_FRAG		0x04
#define SBAL_EFLAGS_MIDDLE_FRAG		0x08
#define SBAL_EFLAGS_LAST_FRAG		0x0c
#define SBAL_EFLAGS_MASK		0x6f

#define SBAL_SFLAGS0_PCI_REQ		0x40
#define SBAL_SFLAGS0_DATA_CONTINUATION	0x20

/* Awesome OpenFCP extensions */
#define SBAL_SFLAGS0_TYPE_STATUS	0x00
#define SBAL_SFLAGS0_TYPE_WRITE		0x08
#define SBAL_SFLAGS0_TYPE_READ		0x10
#define SBAL_SFLAGS0_TYPE_WRITE_READ	0x18
#define SBAL_SFLAGS0_MORE_SBALS		0x04
#define SBAL_SFLAGS0_COMMAND		0x02
#define SBAL_SFLAGS0_LAST_SBAL		0x00
#define SBAL_SFLAGS0_ONLY_SBAL		SBAL_SFLAGS0_COMMAND
#define SBAL_SFLAGS0_MIDDLE_SBAL	SBAL_SFLAGS0_MORE_SBALS
#define SBAL_SFLAGS0_FIRST_SBAL (SBAL_SFLAGS0_MORE_SBALS | SBAL_SFLAGS0_COMMAND)

/**
 * struct qdio_buffer_element - SBAL entry
 * @eflags: SBAL entry flags
 * @scount: SBAL count
 * @sflags: whole SBAL flags
 * @length: length
 * @addr: address
*/
struct qdio_buffer_element {
	u8 eflags;
	/* private: */
	u8 res1;
	/* public: */
	u8 scount;
	u8 sflags;
	u32 length;
	void *addr;
} __attribute__ ((packed, aligned(16)));

/**
 * struct qdio_buffer - storage block address list (SBAL)
 * @element: SBAL entries
 */
struct qdio_buffer {
	struct qdio_buffer_element element[QDIO_MAX_ELEMENTS_PER_BUFFER];
} __attribute__ ((packed, aligned(256)));

/**
 * struct sl_element - storage list entry
 * @sbal: absolute SBAL address
 */
struct sl_element {
	unsigned long sbal;
} __attribute__ ((packed));

/**
 * struct sl - storage list (SL)
 * @element: SL entries
 */
struct sl {
	struct sl_element element[QDIO_MAX_BUFFERS_PER_Q];
} __attribute__ ((packed, aligned(1024)));

/**
 * struct slsb - storage list state block (SLSB)
 * @val: state per buffer
 */
struct slsb {
	u8 val[QDIO_MAX_BUFFERS_PER_Q];
} __attribute__ ((packed, aligned(256)));

/**
 * struct qdio_outbuf_state - SBAL related asynchronous operation information
 *   (for communication with upper layer programs)
 *   (only required for use with completion queues)
 * @flags: flags indicating state of buffer
 * @aob: pointer to QAOB used for the particular SBAL
 * @user: pointer to upper layer program's state information related to SBAL
 *        (stored in user1 data of QAOB)
 */
struct qdio_outbuf_state {
	u8 flags;
	struct qaob *aob;
	void *user;
};

#define QDIO_OUTBUF_STATE_FLAG_NONE	0x00
#define QDIO_OUTBUF_STATE_FLAG_PENDING	0x01

#define CHSC_AC1_INITIATE_INPUTQ	0x80


/* qdio adapter-characteristics-1 flag */
#define AC1_SIGA_INPUT_NEEDED		0x40	/* process input queues */
#define AC1_SIGA_OUTPUT_NEEDED		0x20	/* process output queues */
#define AC1_SIGA_SYNC_NEEDED		0x10	/* ask hypervisor to sync */
#define AC1_AUTOMATIC_SYNC_ON_THININT	0x08	/* set by hypervisor */
#define AC1_AUTOMATIC_SYNC_ON_OUT_PCI	0x04	/* set by hypervisor */
#define AC1_SC_QEBSM_AVAILABLE		0x02	/* available for subchannel */
#define AC1_SC_QEBSM_ENABLED		0x01	/* enabled for subchannel */

#define CHSC_AC2_MULTI_BUFFER_AVAILABLE	0x0080
#define CHSC_AC2_MULTI_BUFFER_ENABLED	0x0040
#define CHSC_AC2_DATA_DIV_AVAILABLE	0x0010
#define CHSC_AC2_DATA_DIV_ENABLED	0x0002

#define CHSC_AC3_FORMAT2_CQ_AVAILABLE	0x8000

struct qdio_ssqd_desc {
	u8 flags;
	u8:8;
	u16 sch;
	u8 qfmt;
	u8 parm;
	u8 qdioac1;
	u8 sch_class;
	u8 pcnt;
	u8 icnt;
	u8:8;
	u8 ocnt;
	u8:8;
	u8 mbccnt;
	u16 qdioac2;
	u64 sch_token;
	u8 mro;
	u8 mri;
	u16 qdioac3;
	u16:16;
	u8:8;
	u8 mmwc;
} __attribute__ ((packed));

/* params are: ccw_device, qdio_error, queue_number,
   first element processed, number of elements processed, int_parm */
typedef void qdio_handler_t(struct ccw_device *, unsigned int, int,
			    int, int, unsigned long);

/* qdio errors reported to the upper-layer program */
#define QDIO_ERROR_ACTIVATE			0x0001
#define QDIO_ERROR_GET_BUF_STATE		0x0002
#define QDIO_ERROR_SET_BUF_STATE		0x0004
#define QDIO_ERROR_SLSB_STATE			0x0100

#define QDIO_ERROR_FATAL			0x00ff
#define QDIO_ERROR_TEMPORARY			0xff00

/* for qdio_cleanup */
#define QDIO_FLAG_CLEANUP_USING_CLEAR		0x01
#define QDIO_FLAG_CLEANUP_USING_HALT		0x02

/**
 * struct qdio_initialize - qdio initialization data
 * @cdev: associated ccw device
 * @q_format: queue format
 * @adapter_name: name for the adapter
 * @qib_param_field_format: format for qib_parm_field
 * @qib_param_field: pointer to 128 bytes or NULL, if no param field
 * @qib_rflags: rflags to set
 * @input_slib_elements: pointer to no_input_qs * 128 words of data or NULL
 * @output_slib_elements: pointer to no_output_qs * 128 words of data or NULL
 * @no_input_qs: number of input queues
 * @no_output_qs: number of output queues
 * @input_handler: handler to be called for input queues
 * @output_handler: handler to be called for output queues
 * @queue_start_poll_array: polling handlers (one per input queue or NULL)
 * @int_parm: interruption parameter
 * @input_sbal_addr_array:  address of no_input_qs * 128 pointers
 * @output_sbal_addr_array: address of no_output_qs * 128 pointers
 * @output_sbal_state_array: no_output_qs * 128 state info (for CQ or NULL)
 */
struct qdio_initialize {
	struct ccw_device *cdev;
	unsigned char q_format;
	unsigned char qdr_ac;
	unsigned char adapter_name[8];
	unsigned int qib_param_field_format;
	unsigned char *qib_param_field;
	unsigned char qib_rflags;
	unsigned long *input_slib_elements;
	unsigned long *output_slib_elements;
	unsigned int no_input_qs;
	unsigned int no_output_qs;
	qdio_handler_t *input_handler;
	qdio_handler_t *output_handler;
	void (**queue_start_poll_array) (struct ccw_device *, int,
					  unsigned long);
	int scan_threshold;
	unsigned long int_parm;
	void **input_sbal_addr_array;
	void **output_sbal_addr_array;
	struct qdio_outbuf_state *output_sbal_state_array;
};

/**
 * enum qdio_brinfo_entry_type - type of address entry for qdio_brinfo_desc()
 * @l3_ipv6_addr: entry contains IPv6 address
 * @l3_ipv4_addr: entry contains IPv4 address
 * @l2_addr_lnid: entry contains MAC address and VLAN ID
 */
enum qdio_brinfo_entry_type {l3_ipv6_addr, l3_ipv4_addr, l2_addr_lnid};

/**
 * struct qdio_brinfo_entry_XXX - Address entry for qdio_brinfo_desc()
 * @nit:  Network interface token
 * @addr: Address of one of the three types
 *
 * The struct is passed to the callback function by qdio_brinfo_desc()
 */
struct qdio_brinfo_entry_l3_ipv6 {
	u64 nit;
	struct { unsigned char _s6_addr[16]; } addr;
} __packed;
struct qdio_brinfo_entry_l3_ipv4 {
	u64 nit;
	struct { uint32_t _s_addr; } addr;
} __packed;
struct qdio_brinfo_entry_l2 {
	u64 nit;
	struct { u8 mac[6]; u16 lnid; } addr_lnid;
} __packed;

#define QDIO_STATE_INACTIVE		0x00000002 /* after qdio_cleanup */
#define QDIO_STATE_ESTABLISHED		0x00000004 /* after qdio_establish */
#define QDIO_STATE_ACTIVE		0x00000008 /* after qdio_activate */
#define QDIO_STATE_STOPPED		0x00000010 /* after queues went down */

#define QDIO_FLAG_SYNC_INPUT		0x01
#define QDIO_FLAG_SYNC_OUTPUT		0x02
#define QDIO_FLAG_PCI_OUT		0x10

int qdio_alloc_buffers(struct qdio_buffer **buf, unsigned int count);
void qdio_free_buffers(struct qdio_buffer **buf, unsigned int count);
void qdio_reset_buffers(struct qdio_buffer **buf, unsigned int count);

extern int qdio_allocate(struct qdio_initialize *);
extern int qdio_establish(struct qdio_initialize *);
extern int qdio_activate(struct ccw_device *);
extern void qdio_release_aob(struct qaob *);
extern int do_QDIO(struct ccw_device *, unsigned int, int, unsigned int,
		   unsigned int);
extern int qdio_start_irq(struct ccw_device *, int);
extern int qdio_stop_irq(struct ccw_device *, int);
extern int qdio_get_next_buffers(struct ccw_device *, int, int *, int *);
extern int qdio_shutdown(struct ccw_device *, int);
extern int qdio_free(struct ccw_device *);
extern int qdio_get_ssqd_desc(struct ccw_device *, struct qdio_ssqd_desc *);
extern int qdio_pnso_brinfo(struct subchannel_id schid,
		int cnc, u16 *response,
		void (*cb)(void *priv, enum qdio_brinfo_entry_type type,
				void *entry),
		void *priv);

#endif /* __QDIO_H__ */
Commit	Line	Data
b2441318	1	/* SPDX-License-Identifier: GPL-2.0 */
1da177e4	2	/*
a53c8fab	3	* Copyright IBM Corp. 2000, 2008
1da177e4	4	* Author(s): Utz Bacher <utz.bacher@de.ibm.com>
779e6e1c	5	* Jan Glauber <jang@linux.vnet.ibm.com>
1da177e4 LT	6	*
	7	*/
	8	#ifndef __QDIO_H__
	9	#define __QDIO_H__
	10
1da177e4 LT	11	#include <linux/interrupt.h>
	12	#include <asm/cio.h>
	13	#include <asm/ccwdev.h>
	14
432ac5e0 JG	15	/* only use 4 queues to save some cachelines */
432ac5e0 JG	16	#define QDIO_MAX_QUEUES_PER_IRQ 4
779e6e1c JG	17	#define QDIO_MAX_BUFFERS_PER_Q 128
	18	#define QDIO_MAX_BUFFERS_MASK (QDIO_MAX_BUFFERS_PER_Q - 1)
	19	#define QDIO_MAX_ELEMENTS_PER_BUFFER 16
	20	#define QDIO_SBAL_SIZE 256
	21
	22	#define QDIO_QETH_QFMT 0
	23	#define QDIO_ZFCP_QFMT 1
	24	#define QDIO_IQDIO_QFMT 2
	25
	26	/**
	27	* struct qdesfmt0 - queue descriptor, format 0
	28	* @sliba: storage list information block address
	29	* @sla: storage list address
	30	* @slsba: storage list state block address
	31	* @akey: access key for DLIB
	32	* @bkey: access key for SL
	33	* @ckey: access key for SBALs
	34	* @dkey: access key for SLSB
	35	*/
1da177e4	36	struct qdesfmt0 {
779e6e1c JG	37	u64 sliba;
	38	u64 sla;
	39	u64 slsba;
	40	u32 : 32;
	41	u32 akey : 4;
	42	u32 bkey : 4;
	43	u32 ckey : 4;
	44	u32 dkey : 4;
	45	u32 : 16;
1da177e4 LT	46	} __attribute__ ((packed));
1da177e4 LT	47
dfe5bb50 SS	48	#define QDR_AC_MULTI_BUFFER_ENABLE 0x01
dfe5bb50 SS	49
779e6e1c JG	50	/**
	51	* struct qdr - queue description record (QDR)
	52	* @qfmt: queue format
	53	* @pfmt: implementation dependent parameter format
	54	* @ac: adapter characteristics
	55	* @iqdcnt: input queue descriptor count
	56	* @oqdcnt: output queue descriptor count
	57	* @iqdsz: inpout queue descriptor size
	58	* @oqdsz: output queue descriptor size
	59	* @qiba: queue information block address
	60	* @qkey: queue information block key
	61	* @qdf0: queue descriptions
1da177e4 LT	62	*/
1da177e4 LT	63	struct qdr {
779e6e1c JG	64	u32 qfmt : 8;
	65	u32 pfmt : 8;
	66	u32 : 8;
	67	u32 ac : 8;
	68	u32 : 8;
	69	u32 iqdcnt : 8;
	70	u32 : 8;
	71	u32 oqdcnt : 8;
	72	u32 : 8;
	73	u32 iqdsz : 8;
	74	u32 : 8;
	75	u32 oqdsz : 8;
	76	/* private: */
	77	u32 res[9];
	78	/* public: */
	79	u64 qiba;
	80	u32 : 32;
	81	u32 qkey : 4;
	82	u32 : 28;
	83	struct qdesfmt0 qdf0[126];
f1c1174f	84	} __packed __aligned(PAGE_SIZE);
779e6e1c JG	85
779e6e1c JG	86	#define QIB_AC_OUTBOUND_PCI_SUPPORTED 0x40
8129ee16	87	#define QIB_RFLAGS_ENABLE_QEBSM 0x80
dcc18f48	88	#define QIB_RFLAGS_ENABLE_DATA_DIV 0x02
8129ee16	89
779e6e1c JG	90	/**
	91	* struct qib - queue information block (QIB)
	92	* @qfmt: queue format
	93	* @pfmt: implementation dependent parameter format
	94	* @rflags: QEBSM
	95	* @ac: adapter characteristics
	96	* @isliba: absolute address of first input SLIB
	97	* @osliba: absolute address of first output SLIB
	98	* @ebcnam: adapter identifier in EBCDIC
	99	* @parm: implementation dependent parameters
	100	*/
1da177e4	101	struct qib {
779e6e1c JG	102	u32 qfmt : 8;
	103	u32 pfmt : 8;
	104	u32 rflags : 8;
	105	u32 ac : 8;
	106	u32 : 32;
	107	u64 isliba;
	108	u64 osliba;
	109	u32 : 32;
	110	u32 : 32;
	111	u8 ebcnam[8];
	112	/* private: */
	113	u8 res[88];
	114	/* public: */
	115	u8 parm[QDIO_MAX_BUFFERS_PER_Q];
	116	} __attribute__ ((packed, aligned(256)));
	117
	118	/**
	119	* struct slibe - storage list information block element (SLIBE)
	120	* @parms: implementation dependent parameters
1da177e4 LT	121	*/
1da177e4 LT	122	struct slibe {
779e6e1c	123	u64 parms;
1da177e4 LT	124	};
1da177e4 LT	125
104ea556	126	/**
	127	* struct qaob - queue asynchronous operation block
	128	* @res0: reserved parameters
	129	* @res1: reserved parameter
	130	* @res2: reserved parameter
	131	* @res3: reserved parameter
	132	* @aorc: asynchronous operation return code
	133	* @flags: internal flags
	134	* @cbtbs: control block type
	135	* @sb_count: number of storage blocks
	136	* @sba: storage block element addresses
	137	* @dcount: size of storage block elements
	138	* @user0: user defineable value
	139	* @res4: reserved paramater
	140	* @user1: user defineable value
	141	* @user2: user defineable value
	142	*/
	143	struct qaob {
	144	u64 res0[6];
	145	u8 res1;
	146	u8 res2;
	147	u8 res3;
	148	u8 aorc;
	149	u8 flags;
	150	u16 cbtbs;
	151	u8 sb_count;
	152	u64 sba[QDIO_MAX_ELEMENTS_PER_BUFFER];
	153	u16 dcount[QDIO_MAX_ELEMENTS_PER_BUFFER];
	154	u64 user0;
	155	u64 res4[2];
	156	u64 user1;
	157	u64 user2;
	158	} __attribute__ ((packed, aligned(256)));
	159
779e6e1c JG	160	/**
	161	* struct slib - storage list information block (SLIB)
	162	* @nsliba: next SLIB address (if any)
	163	* @sla: SL address
	164	* @slsba: SLSB address
	165	* @slibe: SLIB elements
1da177e4 LT	166	*/
1da177e4 LT	167	struct slib {
779e6e1c JG	168	u64 nsliba;
	169	u64 sla;
	170	u64 slsba;
	171	/* private: */
	172	u8 res[1000];
	173	/* public: */
	174	struct slibe slibe[QDIO_MAX_BUFFERS_PER_Q];
	175	} __attribute__ ((packed, aligned(2048)));
	176
3ec90878 JG	177	#define SBAL_EFLAGS_LAST_ENTRY 0x40
	178	#define SBAL_EFLAGS_CONTIGUOUS 0x20
	179	#define SBAL_EFLAGS_FIRST_FRAG 0x04
	180	#define SBAL_EFLAGS_MIDDLE_FRAG 0x08
	181	#define SBAL_EFLAGS_LAST_FRAG 0x0c
	182	#define SBAL_EFLAGS_MASK 0x6f
1da177e4	183
3ec90878 JG	184	#define SBAL_SFLAGS0_PCI_REQ 0x40
3ec90878 JG	185	#define SBAL_SFLAGS0_DATA_CONTINUATION 0x20
1da177e4 LT	186
1da177e4 LT	187	/* Awesome OpenFCP extensions */
3ec90878 JG	188	#define SBAL_SFLAGS0_TYPE_STATUS 0x00
	189	#define SBAL_SFLAGS0_TYPE_WRITE 0x08
	190	#define SBAL_SFLAGS0_TYPE_READ 0x10
	191	#define SBAL_SFLAGS0_TYPE_WRITE_READ 0x18
	192	#define SBAL_SFLAGS0_MORE_SBALS 0x04
	193	#define SBAL_SFLAGS0_COMMAND 0x02
	194	#define SBAL_SFLAGS0_LAST_SBAL 0x00
	195	#define SBAL_SFLAGS0_ONLY_SBAL SBAL_SFLAGS0_COMMAND
	196	#define SBAL_SFLAGS0_MIDDLE_SBAL SBAL_SFLAGS0_MORE_SBALS
	197	#define SBAL_SFLAGS0_FIRST_SBAL (SBAL_SFLAGS0_MORE_SBALS \| SBAL_SFLAGS0_COMMAND)
1da177e4	198
779e6e1c JG	199	/**
779e6e1c JG	200	* struct qdio_buffer_element - SBAL entry
3ec90878 JG	201	* @eflags: SBAL entry flags
	202	* @scount: SBAL count
	203	* @sflags: whole SBAL flags
779e6e1c JG	204	* @length: length
	205	* @addr: address
	206	*/
	207	struct qdio_buffer_element {
3ec90878 JG	208	u8 eflags;
	209	/* private: */
	210	u8 res1;
	211	/* public: */
	212	u8 scount;
	213	u8 sflags;
779e6e1c	214	u32 length;
779e6e1c JG	215	void *addr;
779e6e1c JG	216	} __attribute__ ((packed, aligned(16)));
1da177e4	217
779e6e1c JG	218	/**
	219	* struct qdio_buffer - storage block address list (SBAL)
	220	* @element: SBAL entries
1da177e4	221	*/
779e6e1c JG	222	struct qdio_buffer {
	223	struct qdio_buffer_element element[QDIO_MAX_ELEMENTS_PER_BUFFER];
	224	} __attribute__ ((packed, aligned(256)));
1da177e4	225
779e6e1c JG	226	/**
	227	* struct sl_element - storage list entry
	228	* @sbal: absolute SBAL address
1da177e4 LT	229	*/
1da177e4 LT	230	struct sl_element {
779e6e1c	231	unsigned long sbal;
1da177e4 LT	232	} __attribute__ ((packed));
1da177e4 LT	233
779e6e1c JG	234	/**
	235	* struct sl - storage list (SL)
	236	* @element: SL entries
	237	*/
1da177e4 LT	238	struct sl {
1da177e4 LT	239	struct sl_element element[QDIO_MAX_BUFFERS_PER_Q];
779e6e1c	240	} __attribute__ ((packed, aligned(1024)));
1da177e4	241
779e6e1c JG	242	/**
	243	* struct slsb - storage list state block (SLSB)
	244	* @val: state per buffer
1da177e4	245	*/
779e6e1c JG	246	struct slsb {
	247	u8 val[QDIO_MAX_BUFFERS_PER_Q];
	248	} __attribute__ ((packed, aligned(256)));
	249
104ea556	250	/**
	251	* struct qdio_outbuf_state - SBAL related asynchronous operation information
	252	* (for communication with upper layer programs)
	253	* (only required for use with completion queues)
	254	* @flags: flags indicating state of buffer
	255	* @aob: pointer to QAOB used for the particular SBAL
	256	* @user: pointer to upper layer program's state information related to SBAL
	257	* (stored in user1 data of QAOB)
	258	*/
	259	struct qdio_outbuf_state {
	260	u8 flags;
	261	struct qaob *aob;
	262	void *user;
	263	};
	264
	265	#define QDIO_OUTBUF_STATE_FLAG_NONE 0x00
	266	#define QDIO_OUTBUF_STATE_FLAG_PENDING 0x01
	267
	268	#define CHSC_AC1_INITIATE_INPUTQ 0x80
	269
9cb7284f	270
	271	/* qdio adapter-characteristics-1 flag */
	272	#define AC1_SIGA_INPUT_NEEDED 0x40 /* process input queues */
	273	#define AC1_SIGA_OUTPUT_NEEDED 0x20 /* process output queues */
	274	#define AC1_SIGA_SYNC_NEEDED 0x10 /* ask hypervisor to sync */
	275	#define AC1_AUTOMATIC_SYNC_ON_THININT 0x08 /* set by hypervisor */
	276	#define AC1_AUTOMATIC_SYNC_ON_OUT_PCI 0x04 /* set by hypervisor */
	277	#define AC1_SC_QEBSM_AVAILABLE 0x02 /* available for subchannel */
	278	#define AC1_SC_QEBSM_ENABLED 0x01 /* enabled for subchannel */
	279
050276ab SM	280	#define CHSC_AC2_MULTI_BUFFER_AVAILABLE 0x0080
050276ab SM	281	#define CHSC_AC2_MULTI_BUFFER_ENABLED 0x0040
104ea556	282	#define CHSC_AC2_DATA_DIV_AVAILABLE 0x0010
	283	#define CHSC_AC2_DATA_DIV_ENABLED 0x0002
	284
	285	#define CHSC_AC3_FORMAT2_CQ_AVAILABLE 0x8000
	286
779e6e1c JG	287	struct qdio_ssqd_desc {
	288	u8 flags;
	289	u8:8;
	290	u16 sch;
	291	u8 qfmt;
	292	u8 parm;
	293	u8 qdioac1;
	294	u8 sch_class;
	295	u8 pcnt;
	296	u8 icnt;
	297	u8:8;
	298	u8 ocnt;
	299	u8:8;
	300	u8 mbccnt;
	301	u16 qdioac2;
	302	u64 sch_token;
7a0f4755 KDW	303	u8 mro;
7a0f4755 KDW	304	u8 mri;
104ea556	305	u16 qdioac3;
7a0f4755 KDW	306	u16:16;
	307	u8:8;
	308	u8 mmwc;
1da177e4 LT	309	} __attribute__ ((packed));
1da177e4 LT	310
779e6e1c JG	311	/* params are: ccw_device, qdio_error, queue_number,
	312	first element processed, number of elements processed, int_parm */
	313	typedef void qdio_handler_t(struct ccw_device *, unsigned int, int,
	314	int, int, unsigned long);
1da177e4	315
779e6e1c	316	/* qdio errors reported to the upper-layer program */
1549d13f JG	317	#define QDIO_ERROR_ACTIVATE 0x0001
	318	#define QDIO_ERROR_GET_BUF_STATE 0x0002
	319	#define QDIO_ERROR_SET_BUF_STATE 0x0004
	320	#define QDIO_ERROR_SLSB_STATE 0x0100
	321
	322	#define QDIO_ERROR_FATAL 0x00ff
	323	#define QDIO_ERROR_TEMPORARY 0xff00
1da177e4	324
779e6e1c JG	325	/* for qdio_cleanup */
	326	#define QDIO_FLAG_CLEANUP_USING_CLEAR 0x01
	327	#define QDIO_FLAG_CLEANUP_USING_HALT 0x02
	328
	329	/**
b4a96015	330	* struct qdio_initialize - qdio initialization data
779e6e1c JG	331	* @cdev: associated ccw device
	332	* @q_format: queue format
	333	* @adapter_name: name for the adapter
	334	* @qib_param_field_format: format for qib_parm_field
	335	* @qib_param_field: pointer to 128 bytes or NULL, if no param field
dcc18f48	336	* @qib_rflags: rflags to set
779e6e1c JG	337	* @input_slib_elements: pointer to no_input_qs * 128 words of data or NULL
	338	* @output_slib_elements: pointer to no_output_qs * 128 words of data or NULL
	339	* @no_input_qs: number of input queues
	340	* @no_output_qs: number of output queues
	341	* @input_handler: handler to be called for input queues
	342	* @output_handler: handler to be called for output queues
e58b0d90	343	* @queue_start_poll_array: polling handlers (one per input queue or NULL)
779e6e1c	344	* @int_parm: interruption parameter
779e6e1c JG	345	* @input_sbal_addr_array: address of no_input_qs * 128 pointers
779e6e1c JG	346	* @output_sbal_addr_array: address of no_output_qs * 128 pointers
104ea556	347	* @output_sbal_state_array: no_output_qs * 128 state info (for CQ or NULL)
1da177e4	348	*/
779e6e1c JG	349	struct qdio_initialize {
	350	struct ccw_device *cdev;
	351	unsigned char q_format;
dfe5bb50	352	unsigned char qdr_ac;
779e6e1c JG	353	unsigned char adapter_name[8];
	354	unsigned int qib_param_field_format;
	355	unsigned char *qib_param_field;
dcc18f48	356	unsigned char qib_rflags;
779e6e1c JG	357	unsigned long *input_slib_elements;
	358	unsigned long *output_slib_elements;
	359	unsigned int no_input_qs;
	360	unsigned int no_output_qs;
	361	qdio_handler_t *input_handler;
	362	qdio_handler_t *output_handler;
e58b0d90 SM	363	void (*queue_start_poll_array) (struct ccw_device , int,
e58b0d90 SM	364	unsigned long);
3d6c76ff	365	int scan_threshold;
779e6e1c	366	unsigned long int_parm;
779e6e1c JG	367	void **input_sbal_addr_array;
779e6e1c JG	368	void **output_sbal_addr_array;
104ea556	369	struct qdio_outbuf_state *output_sbal_state_array;
779e6e1c JG	370	};
779e6e1c JG	371
1c59a861 EC	372	/**
	373	* enum qdio_brinfo_entry_type - type of address entry for qdio_brinfo_desc()
	374	* @l3_ipv6_addr: entry contains IPv6 address
	375	* @l3_ipv4_addr: entry contains IPv4 address
	376	* @l2_addr_lnid: entry contains MAC address and VLAN ID
	377	*/
	378	enum qdio_brinfo_entry_type {l3_ipv6_addr, l3_ipv4_addr, l2_addr_lnid};
	379
	380	/**
	381	* struct qdio_brinfo_entry_XXX - Address entry for qdio_brinfo_desc()
	382	* @nit: Network interface token
	383	* @addr: Address of one of the three types
	384	*
	385	* The struct is passed to the callback function by qdio_brinfo_desc()
	386	*/
	387	struct qdio_brinfo_entry_l3_ipv6 {
	388	u64 nit;
	389	struct { unsigned char _s6_addr[16]; } addr;
	390	} __packed;
	391	struct qdio_brinfo_entry_l3_ipv4 {
	392	u64 nit;
	393	struct { uint32_t _s_addr; } addr;
	394	} __packed;
	395	struct qdio_brinfo_entry_l2 {
	396	u64 nit;
	397	struct { u8 mac[6]; u16 lnid; } addr_lnid;
	398	} __packed;
	399
779e6e1c JG	400	#define QDIO_STATE_INACTIVE 0x00000002 /* after qdio_cleanup */
	401	#define QDIO_STATE_ESTABLISHED 0x00000004 /* after qdio_establish */
	402	#define QDIO_STATE_ACTIVE 0x00000008 /* after qdio_activate */
	403	#define QDIO_STATE_STOPPED 0x00000010 /* after queues went down */
	404
	405	#define QDIO_FLAG_SYNC_INPUT 0x01
	406	#define QDIO_FLAG_SYNC_OUTPUT 0x02
	407	#define QDIO_FLAG_PCI_OUT 0x10
	408
5245c924 SO	409	int qdio_alloc_buffers(struct qdio_buffer **buf, unsigned int count);
	410	void qdio_free_buffers(struct qdio_buffer **buf, unsigned int count);
	411	void qdio_reset_buffers(struct qdio_buffer **buf, unsigned int count);
	412
bbd50e17 JG	413	extern int qdio_allocate(struct qdio_initialize *);
bbd50e17 JG	414	extern int qdio_establish(struct qdio_initialize *);
779e6e1c	415	extern int qdio_activate(struct ccw_device *);
104ea556	416	extern void qdio_release_aob(struct qaob *);
d36deae7 JG	417	extern int do_QDIO(struct ccw_device *, unsigned int, int, unsigned int,
	418	unsigned int);
	419	extern int qdio_start_irq(struct ccw_device *, int);
	420	extern int qdio_stop_irq(struct ccw_device *, int);
	421	extern int qdio_get_next_buffers(struct ccw_device , int, int , int *);
	422	extern int qdio_shutdown(struct ccw_device *, int);
779e6e1c	423	extern int qdio_free(struct ccw_device *);
d36deae7	424	extern int qdio_get_ssqd_desc(struct ccw_device , struct qdio_ssqd_desc );
1c59a861 EC	425	extern int qdio_pnso_brinfo(struct subchannel_id schid,
	426	int cnc, u16 *response,
	427	void (cb)(void priv, enum qdio_brinfo_entry_type type,
	428	void *entry),
	429	void *priv);
1da177e4 LT	430
1da177e4 LT	431	#endif /* __QDIO_H__ */