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Merge tag 'io_uring-5.7-2020-05-22' of git://git.kernel.dk/linux-block
[thirdparty/linux.git] / arch / s390 / kvm / priv.c
CommitLineData
d809aa23 1// SPDX-License-Identifier: GPL-2.0
453423dc 2/*
a53c8fab 3 * handling privileged instructions
453423dc 4 *
353cbc6a 5 * Copyright IBM Corp. 2008, 2020
453423dc 6 *
453423dc
CB
7 * Author(s): Carsten Otte <cotte@de.ibm.com>
8 * Christian Borntraeger <borntraeger@de.ibm.com>
9 */
10
11#include <linux/kvm.h>
5a0e3ad6 12#include <linux/gfp.h>
453423dc 13#include <linux/errno.h>
b13b5dc7 14#include <linux/compat.h>
589ee628
IM
15#include <linux/mm_types.h>
16
7c959e82 17#include <asm/asm-offsets.h>
e769ece3 18#include <asm/facility.h>
453423dc
CB
19#include <asm/current.h>
20#include <asm/debug.h>
21#include <asm/ebcdic.h>
22#include <asm/sysinfo.h>
69d0d3a3 23#include <asm/pgtable.h>
190df4a2 24#include <asm/page-states.h>
69d0d3a3 25#include <asm/pgalloc.h>
1e133ab2 26#include <asm/gmap.h>
69d0d3a3 27#include <asm/io.h>
48a3e950 28#include <asm/ptrace.h>
a7e19ab5 29#include <asm/sclp.h>
e5282de9 30#include <asm/ap.h>
453423dc
CB
31#include "gaccess.h"
32#include "kvm-s390.h"
5786fffa 33#include "trace.h"
453423dc 34
80cd8763
FZ
35static int handle_ri(struct kvm_vcpu *vcpu)
36{
a37cb07a
CB
37 vcpu->stat.instruction_ri++;
38
80cd8763 39 if (test_kvm_facility(vcpu->kvm, 64)) {
4d5f2c04 40 VCPU_EVENT(vcpu, 3, "%s", "ENABLE: RI (lazy)");
0c9d8683 41 vcpu->arch.sie_block->ecb3 |= ECB3_RI;
80cd8763
FZ
42 kvm_s390_retry_instr(vcpu);
43 return 0;
44 } else
45 return kvm_s390_inject_program_int(vcpu, PGM_OPERATION);
46}
47
48int kvm_s390_handle_aa(struct kvm_vcpu *vcpu)
49{
50 if ((vcpu->arch.sie_block->ipa & 0xf) <= 4)
51 return handle_ri(vcpu);
52 else
53 return -EOPNOTSUPP;
54}
55
4e0b1ab7
FZ
56static int handle_gs(struct kvm_vcpu *vcpu)
57{
a37cb07a
CB
58 vcpu->stat.instruction_gs++;
59
4e0b1ab7
FZ
60 if (test_kvm_facility(vcpu->kvm, 133)) {
61 VCPU_EVENT(vcpu, 3, "%s", "ENABLE: GS (lazy)");
62 preempt_disable();
63 __ctl_set_bit(2, 4);
64 current->thread.gs_cb = (struct gs_cb *)&vcpu->run->s.regs.gscb;
65 restore_gs_cb(current->thread.gs_cb);
66 preempt_enable();
67 vcpu->arch.sie_block->ecb |= ECB_GS;
68 vcpu->arch.sie_block->ecd |= ECD_HOSTREGMGMT;
69 vcpu->arch.gs_enabled = 1;
70 kvm_s390_retry_instr(vcpu);
71 return 0;
72 } else
73 return kvm_s390_inject_program_int(vcpu, PGM_OPERATION);
74}
75
76int kvm_s390_handle_e3(struct kvm_vcpu *vcpu)
77{
78 int code = vcpu->arch.sie_block->ipb & 0xff;
79
80 if (code == 0x49 || code == 0x4d)
81 return handle_gs(vcpu);
82 else
83 return -EOPNOTSUPP;
84}
6a3f95a6
TH
85/* Handle SCK (SET CLOCK) interception */
86static int handle_set_clock(struct kvm_vcpu *vcpu)
87{
0e7def5f 88 struct kvm_s390_vm_tod_clock gtod = { 0 };
25ed1675 89 int rc;
27f67f87 90 u8 ar;
0e7def5f 91 u64 op2;
6a3f95a6 92
a37cb07a
CB
93 vcpu->stat.instruction_sck++;
94
6a3f95a6
TH
95 if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE)
96 return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);
97
8ae04b8f 98 op2 = kvm_s390_get_base_disp_s(vcpu, &ar);
6a3f95a6
TH
99 if (op2 & 7) /* Operand must be on a doubleword boundary */
100 return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
0e7def5f 101 rc = read_guest(vcpu, op2, ar, &gtod.tod, sizeof(gtod.tod));
0e7a3f94
HC
102 if (rc)
103 return kvm_s390_inject_prog_cond(vcpu, rc);
6a3f95a6 104
0e7def5f
DH
105 VCPU_EVENT(vcpu, 3, "SCK: setting guest TOD to 0x%llx", gtod.tod);
106 kvm_s390_set_tod_clock(vcpu->kvm, &gtod);
6a3f95a6
TH
107
108 kvm_s390_set_psw_cc(vcpu, 0);
109 return 0;
110}
111
453423dc
CB
112static int handle_set_prefix(struct kvm_vcpu *vcpu)
113{
453423dc 114 u64 operand2;
665170cb
HC
115 u32 address;
116 int rc;
27f67f87 117 u8 ar;
453423dc
CB
118
119 vcpu->stat.instruction_spx++;
120
5087dfa6
TH
121 if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE)
122 return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);
123
8ae04b8f 124 operand2 = kvm_s390_get_base_disp_s(vcpu, &ar);
453423dc
CB
125
126 /* must be word boundary */
db4a29cb
HC
127 if (operand2 & 3)
128 return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
453423dc
CB
129
130 /* get the value */
8ae04b8f 131 rc = read_guest(vcpu, operand2, ar, &address, sizeof(address));
665170cb
HC
132 if (rc)
133 return kvm_s390_inject_prog_cond(vcpu, rc);
134
135 address &= 0x7fffe000u;
136
137 /*
138 * Make sure the new value is valid memory. We only need to check the
139 * first page, since address is 8k aligned and memory pieces are always
140 * at least 1MB aligned and have at least a size of 1MB.
141 */
142 if (kvm_is_error_gpa(vcpu->kvm, address))
db4a29cb 143 return kvm_s390_inject_program_int(vcpu, PGM_ADDRESSING);
453423dc 144
8d26cf7b 145 kvm_s390_set_prefix(vcpu, address);
5786fffa 146 trace_kvm_s390_handle_prefix(vcpu, 1, address);
453423dc
CB
147 return 0;
148}
149
150static int handle_store_prefix(struct kvm_vcpu *vcpu)
151{
453423dc
CB
152 u64 operand2;
153 u32 address;
f748f4a7 154 int rc;
27f67f87 155 u8 ar;
453423dc
CB
156
157 vcpu->stat.instruction_stpx++;
b1c571a5 158
5087dfa6
TH
159 if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE)
160 return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);
161
8ae04b8f 162 operand2 = kvm_s390_get_base_disp_s(vcpu, &ar);
453423dc
CB
163
164 /* must be word boundary */
db4a29cb
HC
165 if (operand2 & 3)
166 return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
453423dc 167
fda902cb 168 address = kvm_s390_get_prefix(vcpu);
453423dc
CB
169
170 /* get the value */
8ae04b8f 171 rc = write_guest(vcpu, operand2, ar, &address, sizeof(address));
f748f4a7
HC
172 if (rc)
173 return kvm_s390_inject_prog_cond(vcpu, rc);
453423dc 174
7cbde76b 175 VCPU_EVENT(vcpu, 3, "STPX: storing prefix 0x%x into 0x%llx", address, operand2);
5786fffa 176 trace_kvm_s390_handle_prefix(vcpu, 0, address);
453423dc
CB
177 return 0;
178}
179
180static int handle_store_cpu_address(struct kvm_vcpu *vcpu)
181{
8b96de0e
HC
182 u16 vcpu_id = vcpu->vcpu_id;
183 u64 ga;
184 int rc;
27f67f87 185 u8 ar;
453423dc
CB
186
187 vcpu->stat.instruction_stap++;
b1c571a5 188
5087dfa6
TH
189 if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE)
190 return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);
191
8ae04b8f 192 ga = kvm_s390_get_base_disp_s(vcpu, &ar);
453423dc 193
8b96de0e 194 if (ga & 1)
db4a29cb 195 return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
453423dc 196
8ae04b8f 197 rc = write_guest(vcpu, ga, ar, &vcpu_id, sizeof(vcpu_id));
8b96de0e
HC
198 if (rc)
199 return kvm_s390_inject_prog_cond(vcpu, rc);
453423dc 200
7cbde76b 201 VCPU_EVENT(vcpu, 3, "STAP: storing cpu address (%u) to 0x%llx", vcpu_id, ga);
8b96de0e 202 trace_kvm_s390_handle_stap(vcpu, ga);
453423dc
CB
203 return 0;
204}
205
730cd632 206int kvm_s390_skey_check_enable(struct kvm_vcpu *vcpu)
693ffc08 207{
55531b74 208 int rc;
11ddcd41
DH
209
210 trace_kvm_s390_skey_related_inst(vcpu);
55531b74 211 /* Already enabled? */
57cb198c 212 if (vcpu->arch.skey_enabled)
55531b74 213 return 0;
693ffc08 214
3ac8e380 215 rc = s390_enable_skey();
11ddcd41 216 VCPU_EVENT(vcpu, 3, "enabling storage keys for guest: %d", rc);
55531b74
JF
217 if (rc)
218 return rc;
219
220 if (kvm_s390_test_cpuflags(vcpu, CPUSTAT_KSS))
221 kvm_s390_clear_cpuflags(vcpu, CPUSTAT_KSS);
222 if (!vcpu->kvm->arch.use_skf)
57cb198c 223 vcpu->arch.sie_block->ictl |= ICTL_ISKE | ICTL_SSKE | ICTL_RRBE;
55531b74 224 else
57cb198c
JF
225 vcpu->arch.sie_block->ictl &= ~(ICTL_ISKE | ICTL_SSKE | ICTL_RRBE);
226 vcpu->arch.skey_enabled = true;
55531b74 227 return 0;
693ffc08
DD
228}
229
a7e19ab5 230static int try_handle_skey(struct kvm_vcpu *vcpu)
453423dc 231{
11ddcd41 232 int rc;
693ffc08 233
730cd632 234 rc = kvm_s390_skey_check_enable(vcpu);
3ac8e380
DD
235 if (rc)
236 return rc;
55531b74 237 if (vcpu->kvm->arch.use_skf) {
a7e19ab5
DH
238 /* with storage-key facility, SIE interprets it for us */
239 kvm_s390_retry_instr(vcpu);
240 VCPU_EVENT(vcpu, 4, "%s", "retrying storage key operation");
241 return -EAGAIN;
242 }
a7e19ab5
DH
243 return 0;
244}
5087dfa6 245
a7e19ab5
DH
246static int handle_iske(struct kvm_vcpu *vcpu)
247{
bd096f64 248 unsigned long gaddr, vmaddr;
a7e19ab5
DH
249 unsigned char key;
250 int reg1, reg2;
bd096f64 251 bool unlocked;
a7e19ab5
DH
252 int rc;
253
a37cb07a
CB
254 vcpu->stat.instruction_iske++;
255
ca76ec9c
JF
256 if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE)
257 return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);
258
a7e19ab5
DH
259 rc = try_handle_skey(vcpu);
260 if (rc)
261 return rc != -EAGAIN ? rc : 0;
262
263 kvm_s390_get_regs_rre(vcpu, &reg1, &reg2);
264
bd096f64
JF
265 gaddr = vcpu->run->s.regs.gprs[reg2] & PAGE_MASK;
266 gaddr = kvm_s390_logical_to_effective(vcpu, gaddr);
267 gaddr = kvm_s390_real_to_abs(vcpu, gaddr);
268 vmaddr = gfn_to_hva(vcpu->kvm, gpa_to_gfn(gaddr));
269 if (kvm_is_error_hva(vmaddr))
a7e19ab5 270 return kvm_s390_inject_program_int(vcpu, PGM_ADDRESSING);
bd096f64
JF
271retry:
272 unlocked = false;
a7e19ab5 273 down_read(&current->mm->mmap_sem);
bd096f64
JF
274 rc = get_guest_storage_key(current->mm, vmaddr, &key);
275
276 if (rc) {
277 rc = fixup_user_fault(current, current->mm, vmaddr,
278 FAULT_FLAG_WRITE, &unlocked);
279 if (!rc) {
280 up_read(&current->mm->mmap_sem);
281 goto retry;
282 }
283 }
bd096f64 284 up_read(&current->mm->mmap_sem);
a11bdb1a
JF
285 if (rc == -EFAULT)
286 return kvm_s390_inject_program_int(vcpu, PGM_ADDRESSING);
287 if (rc < 0)
288 return rc;
a7e19ab5
DH
289 vcpu->run->s.regs.gprs[reg1] &= ~0xff;
290 vcpu->run->s.regs.gprs[reg1] |= key;
291 return 0;
292}
293
294static int handle_rrbe(struct kvm_vcpu *vcpu)
295{
bd096f64 296 unsigned long vmaddr, gaddr;
a7e19ab5 297 int reg1, reg2;
bd096f64 298 bool unlocked;
a7e19ab5
DH
299 int rc;
300
a37cb07a
CB
301 vcpu->stat.instruction_rrbe++;
302
ca76ec9c
JF
303 if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE)
304 return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);
305
a7e19ab5
DH
306 rc = try_handle_skey(vcpu);
307 if (rc)
308 return rc != -EAGAIN ? rc : 0;
309
310 kvm_s390_get_regs_rre(vcpu, &reg1, &reg2);
311
bd096f64
JF
312 gaddr = vcpu->run->s.regs.gprs[reg2] & PAGE_MASK;
313 gaddr = kvm_s390_logical_to_effective(vcpu, gaddr);
314 gaddr = kvm_s390_real_to_abs(vcpu, gaddr);
315 vmaddr = gfn_to_hva(vcpu->kvm, gpa_to_gfn(gaddr));
316 if (kvm_is_error_hva(vmaddr))
a7e19ab5 317 return kvm_s390_inject_program_int(vcpu, PGM_ADDRESSING);
bd096f64
JF
318retry:
319 unlocked = false;
a7e19ab5 320 down_read(&current->mm->mmap_sem);
bd096f64
JF
321 rc = reset_guest_reference_bit(current->mm, vmaddr);
322 if (rc < 0) {
323 rc = fixup_user_fault(current, current->mm, vmaddr,
324 FAULT_FLAG_WRITE, &unlocked);
325 if (!rc) {
326 up_read(&current->mm->mmap_sem);
327 goto retry;
328 }
329 }
bd096f64 330 up_read(&current->mm->mmap_sem);
a11bdb1a
JF
331 if (rc == -EFAULT)
332 return kvm_s390_inject_program_int(vcpu, PGM_ADDRESSING);
333 if (rc < 0)
334 return rc;
a7e19ab5
DH
335 kvm_s390_set_psw_cc(vcpu, rc);
336 return 0;
337}
338
339#define SSKE_NQ 0x8
340#define SSKE_MR 0x4
341#define SSKE_MC 0x2
342#define SSKE_MB 0x1
343static int handle_sske(struct kvm_vcpu *vcpu)
344{
345 unsigned char m3 = vcpu->arch.sie_block->ipb >> 28;
346 unsigned long start, end;
347 unsigned char key, oldkey;
348 int reg1, reg2;
bd096f64 349 bool unlocked;
a7e19ab5
DH
350 int rc;
351
a37cb07a
CB
352 vcpu->stat.instruction_sske++;
353
ca76ec9c
JF
354 if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE)
355 return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);
356
a7e19ab5
DH
357 rc = try_handle_skey(vcpu);
358 if (rc)
359 return rc != -EAGAIN ? rc : 0;
360
361 if (!test_kvm_facility(vcpu->kvm, 8))
362 m3 &= ~SSKE_MB;
363 if (!test_kvm_facility(vcpu->kvm, 10))
364 m3 &= ~(SSKE_MC | SSKE_MR);
365 if (!test_kvm_facility(vcpu->kvm, 14))
366 m3 &= ~SSKE_NQ;
367
368 kvm_s390_get_regs_rre(vcpu, &reg1, &reg2);
369
370 key = vcpu->run->s.regs.gprs[reg1] & 0xfe;
371 start = vcpu->run->s.regs.gprs[reg2] & PAGE_MASK;
372 start = kvm_s390_logical_to_effective(vcpu, start);
373 if (m3 & SSKE_MB) {
374 /* start already designates an absolute address */
58cdf5eb 375 end = (start + _SEGMENT_SIZE) & ~(_SEGMENT_SIZE - 1);
a7e19ab5
DH
376 } else {
377 start = kvm_s390_real_to_abs(vcpu, start);
378 end = start + PAGE_SIZE;
379 }
380
381 while (start != end) {
bd096f64
JF
382 unsigned long vmaddr = gfn_to_hva(vcpu->kvm, gpa_to_gfn(start));
383 unlocked = false;
a7e19ab5 384
bd096f64 385 if (kvm_is_error_hva(vmaddr))
a7e19ab5
DH
386 return kvm_s390_inject_program_int(vcpu, PGM_ADDRESSING);
387
388 down_read(&current->mm->mmap_sem);
bd096f64 389 rc = cond_set_guest_storage_key(current->mm, vmaddr, key, &oldkey,
a7e19ab5
DH
390 m3 & SSKE_NQ, m3 & SSKE_MR,
391 m3 & SSKE_MC);
bd096f64
JF
392
393 if (rc < 0) {
394 rc = fixup_user_fault(current, current->mm, vmaddr,
395 FAULT_FLAG_WRITE, &unlocked);
396 rc = !rc ? -EAGAIN : rc;
397 }
a11bdb1a 398 up_read(&current->mm->mmap_sem);
bd096f64 399 if (rc == -EFAULT)
a7e19ab5 400 return kvm_s390_inject_program_int(vcpu, PGM_ADDRESSING);
a11bdb1a
JF
401 if (rc < 0)
402 return rc;
403 start += PAGE_SIZE;
0b925159 404 }
a7e19ab5
DH
405
406 if (m3 & (SSKE_MC | SSKE_MR)) {
407 if (m3 & SSKE_MB) {
408 /* skey in reg1 is unpredictable */
409 kvm_s390_set_psw_cc(vcpu, 3);
410 } else {
411 kvm_s390_set_psw_cc(vcpu, rc);
412 vcpu->run->s.regs.gprs[reg1] &= ~0xff00UL;
413 vcpu->run->s.regs.gprs[reg1] |= (u64) oldkey << 8;
414 }
415 }
416 if (m3 & SSKE_MB) {
8bb3fdd6 417 if (psw_bits(vcpu->arch.sie_block->gpsw).eaba == PSW_BITS_AMODE_64BIT)
a7e19ab5
DH
418 vcpu->run->s.regs.gprs[reg2] &= ~PAGE_MASK;
419 else
420 vcpu->run->s.regs.gprs[reg2] &= ~0xfffff000UL;
421 end = kvm_s390_logical_to_effective(vcpu, end);
422 vcpu->run->s.regs.gprs[reg2] |= end;
423 }
453423dc
CB
424 return 0;
425}
426
8a242234
HC
427static int handle_ipte_interlock(struct kvm_vcpu *vcpu)
428{
8a242234 429 vcpu->stat.instruction_ipte_interlock++;
a7525982 430 if (psw_bits(vcpu->arch.sie_block->gpsw).pstate)
8a242234
HC
431 return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);
432 wait_event(vcpu->kvm->arch.ipte_wq, !ipte_lock_held(vcpu));
0e8bc06a 433 kvm_s390_retry_instr(vcpu);
8a242234
HC
434 VCPU_EVENT(vcpu, 4, "%s", "retrying ipte interlock operation");
435 return 0;
436}
437
aca84241
TH
438static int handle_test_block(struct kvm_vcpu *vcpu)
439{
aca84241
TH
440 gpa_t addr;
441 int reg2;
442
a37cb07a
CB
443 vcpu->stat.instruction_tb++;
444
aca84241
TH
445 if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE)
446 return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);
447
448 kvm_s390_get_regs_rre(vcpu, NULL, &reg2);
449 addr = vcpu->run->s.regs.gprs[reg2] & PAGE_MASK;
e45efa28 450 addr = kvm_s390_logical_to_effective(vcpu, addr);
dd9e5b7b 451 if (kvm_s390_check_low_addr_prot_real(vcpu, addr))
e45efa28 452 return kvm_s390_inject_prog_irq(vcpu, &vcpu->arch.pgm);
aca84241
TH
453 addr = kvm_s390_real_to_abs(vcpu, addr);
454
ef23e779 455 if (kvm_is_error_gpa(vcpu->kvm, addr))
aca84241
TH
456 return kvm_s390_inject_program_int(vcpu, PGM_ADDRESSING);
457 /*
458 * We don't expect errors on modern systems, and do not care
459 * about storage keys (yet), so let's just clear the page.
460 */
ef23e779 461 if (kvm_clear_guest(vcpu->kvm, addr, PAGE_SIZE))
aca84241
TH
462 return -EFAULT;
463 kvm_s390_set_psw_cc(vcpu, 0);
464 vcpu->run->s.regs.gprs[0] = 0;
465 return 0;
466}
467
fa6b7fe9 468static int handle_tpi(struct kvm_vcpu *vcpu)
453423dc 469{
fa6b7fe9 470 struct kvm_s390_interrupt_info *inti;
4799b557
HC
471 unsigned long len;
472 u32 tpi_data[3];
261520dc 473 int rc;
7c959e82 474 u64 addr;
27f67f87 475 u8 ar;
fa6b7fe9 476
a37cb07a
CB
477 vcpu->stat.instruction_tpi++;
478
8ae04b8f 479 addr = kvm_s390_get_base_disp_s(vcpu, &ar);
db4a29cb
HC
480 if (addr & 3)
481 return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
261520dc 482
f092669e 483 inti = kvm_s390_get_io_int(vcpu->kvm, vcpu->arch.sie_block->gcr[6], 0);
261520dc
DH
484 if (!inti) {
485 kvm_s390_set_psw_cc(vcpu, 0);
486 return 0;
487 }
488
4799b557
HC
489 tpi_data[0] = inti->io.subchannel_id << 16 | inti->io.subchannel_nr;
490 tpi_data[1] = inti->io.io_int_parm;
491 tpi_data[2] = inti->io.io_int_word;
7c959e82
HC
492 if (addr) {
493 /*
494 * Store the two-word I/O interruption code into the
495 * provided area.
496 */
4799b557 497 len = sizeof(tpi_data) - 4;
8ae04b8f 498 rc = write_guest(vcpu, addr, ar, &tpi_data, len);
261520dc
DH
499 if (rc) {
500 rc = kvm_s390_inject_prog_cond(vcpu, rc);
501 goto reinject_interrupt;
502 }
7c959e82
HC
503 } else {
504 /*
505 * Store the three-word I/O interruption code into
506 * the appropriate lowcore area.
507 */
4799b557 508 len = sizeof(tpi_data);
261520dc
DH
509 if (write_guest_lc(vcpu, __LC_SUBCHANNEL_ID, &tpi_data, len)) {
510 /* failed writes to the low core are not recoverable */
4799b557 511 rc = -EFAULT;
261520dc
DH
512 goto reinject_interrupt;
513 }
7c959e82 514 }
261520dc
DH
515
516 /* irq was successfully handed to the guest */
517 kfree(inti);
518 kvm_s390_set_psw_cc(vcpu, 1);
519 return 0;
520reinject_interrupt:
2f32d4ea
CH
521 /*
522 * If we encounter a problem storing the interruption code, the
523 * instruction is suppressed from the guest's view: reinject the
524 * interrupt.
525 */
15462e37
DH
526 if (kvm_s390_reinject_io_int(vcpu->kvm, inti)) {
527 kfree(inti);
528 rc = -EFAULT;
529 }
261520dc 530 /* don't set the cc, a pgm irq was injected or we drop to user space */
4799b557 531 return rc ? -EFAULT : 0;
453423dc
CB
532}
533
fa6b7fe9
CH
534static int handle_tsch(struct kvm_vcpu *vcpu)
535{
6d3da241
JF
536 struct kvm_s390_interrupt_info *inti = NULL;
537 const u64 isc_mask = 0xffUL << 24; /* all iscs set */
fa6b7fe9 538
a37cb07a
CB
539 vcpu->stat.instruction_tsch++;
540
6d3da241
JF
541 /* a valid schid has at least one bit set */
542 if (vcpu->run->s.regs.gprs[1])
543 inti = kvm_s390_get_io_int(vcpu->kvm, isc_mask,
544 vcpu->run->s.regs.gprs[1]);
fa6b7fe9
CH
545
546 /*
547 * Prepare exit to userspace.
548 * We indicate whether we dequeued a pending I/O interrupt
549 * so that userspace can re-inject it if the instruction gets
550 * a program check. While this may re-order the pending I/O
551 * interrupts, this is no problem since the priority is kept
552 * intact.
553 */
554 vcpu->run->exit_reason = KVM_EXIT_S390_TSCH;
555 vcpu->run->s390_tsch.dequeued = !!inti;
556 if (inti) {
557 vcpu->run->s390_tsch.subchannel_id = inti->io.subchannel_id;
558 vcpu->run->s390_tsch.subchannel_nr = inti->io.subchannel_nr;
559 vcpu->run->s390_tsch.io_int_parm = inti->io.io_int_parm;
560 vcpu->run->s390_tsch.io_int_word = inti->io.io_int_word;
561 }
562 vcpu->run->s390_tsch.ipb = vcpu->arch.sie_block->ipb;
563 kfree(inti);
564 return -EREMOTE;
565}
566
567static int handle_io_inst(struct kvm_vcpu *vcpu)
568{
569 VCPU_EVENT(vcpu, 4, "%s", "I/O instruction");
570
5087dfa6
TH
571 if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE)
572 return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);
573
fa6b7fe9
CH
574 if (vcpu->kvm->arch.css_support) {
575 /*
576 * Most I/O instructions will be handled by userspace.
577 * Exceptions are tpi and the interrupt portion of tsch.
578 */
579 if (vcpu->arch.sie_block->ipa == 0xb236)
580 return handle_tpi(vcpu);
581 if (vcpu->arch.sie_block->ipa == 0xb235)
582 return handle_tsch(vcpu);
583 /* Handle in userspace. */
a37cb07a 584 vcpu->stat.instruction_io_other++;
fa6b7fe9
CH
585 return -EOPNOTSUPP;
586 } else {
587 /*
b4a96015 588 * Set condition code 3 to stop the guest from issuing channel
fa6b7fe9
CH
589 * I/O instructions.
590 */
ea828ebf 591 kvm_s390_set_psw_cc(vcpu, 3);
fa6b7fe9
CH
592 return 0;
593 }
594}
595
e5282de9
PM
596/*
597 * handle_pqap: Handling pqap interception
598 * @vcpu: the vcpu having issue the pqap instruction
599 *
600 * We now support PQAP/AQIC instructions and we need to correctly
601 * answer the guest even if no dedicated driver's hook is available.
602 *
603 * The intercepting code calls a dedicated callback for this instruction
604 * if a driver did register one in the CRYPTO satellite of the
605 * SIE block.
606 *
607 * If no callback is available, the queues are not available, return this
608 * response code to the caller and set CC to 3.
609 * Else return the response code returned by the callback.
610 */
611static int handle_pqap(struct kvm_vcpu *vcpu)
612{
613 struct ap_queue_status status = {};
614 unsigned long reg0;
615 int ret;
616 uint8_t fc;
617
618 /* Verify that the AP instruction are available */
619 if (!ap_instructions_available())
620 return -EOPNOTSUPP;
621 /* Verify that the guest is allowed to use AP instructions */
622 if (!(vcpu->arch.sie_block->eca & ECA_APIE))
623 return -EOPNOTSUPP;
624 /*
625 * The only possibly intercepted functions when AP instructions are
626 * available for the guest are AQIC and TAPQ with the t bit set
627 * since we do not set IC.3 (FIII) we currently will only intercept
628 * the AQIC function code.
5615e74f
CB
629 * Note: running nested under z/VM can result in intercepts for other
630 * function codes, e.g. PQAP(QCI). We do not support this and bail out.
e5282de9
PM
631 */
632 reg0 = vcpu->run->s.regs.gprs[0];
633 fc = (reg0 >> 24) & 0xff;
5615e74f 634 if (fc != 0x03)
e5282de9
PM
635 return -EOPNOTSUPP;
636
637 /* PQAP instruction is allowed for guest kernel only */
638 if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE)
639 return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);
640
641 /* Common PQAP instruction specification exceptions */
642 /* bits 41-47 must all be zeros */
643 if (reg0 & 0x007f0000UL)
644 return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
645 /* APFT not install and T bit set */
646 if (!test_kvm_facility(vcpu->kvm, 15) && (reg0 & 0x00800000UL))
647 return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
648 /* APXA not installed and APID greater 64 or APQI greater 16 */
649 if (!(vcpu->kvm->arch.crypto.crycbd & 0x02) && (reg0 & 0x0000c0f0UL))
650 return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
651
652 /* AQIC function code specific exception */
653 /* facility 65 not present for AQIC function code */
654 if (!test_kvm_facility(vcpu->kvm, 65))
655 return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
656
657 /*
658 * Verify that the hook callback is registered, lock the owner
659 * and call the hook.
660 */
661 if (vcpu->kvm->arch.crypto.pqap_hook) {
662 if (!try_module_get(vcpu->kvm->arch.crypto.pqap_hook->owner))
663 return -EOPNOTSUPP;
664 ret = vcpu->kvm->arch.crypto.pqap_hook->hook(vcpu);
665 module_put(vcpu->kvm->arch.crypto.pqap_hook->owner);
666 if (!ret && vcpu->run->s.regs.gprs[1] & 0x00ff0000)
667 kvm_s390_set_psw_cc(vcpu, 3);
668 return ret;
669 }
670 /*
671 * A vfio_driver must register a hook.
672 * No hook means no driver to enable the SIE CRYCB and no queues.
673 * We send this response to the guest.
674 */
675 status.response_code = 0x01;
676 memcpy(&vcpu->run->s.regs.gprs[1], &status, sizeof(status));
677 kvm_s390_set_psw_cc(vcpu, 3);
678 return 0;
679}
680
453423dc
CB
681static int handle_stfl(struct kvm_vcpu *vcpu)
682{
453423dc 683 int rc;
9d8d5786 684 unsigned int fac;
453423dc
CB
685
686 vcpu->stat.instruction_stfl++;
5087dfa6
TH
687
688 if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE)
689 return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);
690
9d8d5786
MM
691 /*
692 * We need to shift the lower 32 facility bits (bit 0-31) from a u64
693 * into a u32 memory representation. They will remain bits 0-31.
694 */
c54f0d6a 695 fac = *vcpu->kvm->arch.model.fac_list >> 32;
c667aeac 696 rc = write_guest_lc(vcpu, offsetof(struct lowcore, stfl_fac_list),
9d8d5786 697 &fac, sizeof(fac));
dc5008b9 698 if (rc)
0f9701c6 699 return rc;
7cbde76b 700 VCPU_EVENT(vcpu, 3, "STFL: store facility list 0x%x", fac);
9d8d5786 701 trace_kvm_s390_handle_stfl(vcpu, fac);
453423dc
CB
702 return 0;
703}
704
48a3e950
CH
705#define PSW_MASK_ADDR_MODE (PSW_MASK_EA | PSW_MASK_BA)
706#define PSW_MASK_UNASSIGNED 0xb80800fe7fffffffUL
d21683ea 707#define PSW_ADDR_24 0x0000000000ffffffUL
48a3e950
CH
708#define PSW_ADDR_31 0x000000007fffffffUL
709
a3fb577e
TH
710int is_valid_psw(psw_t *psw)
711{
3736b874
HC
712 if (psw->mask & PSW_MASK_UNASSIGNED)
713 return 0;
714 if ((psw->mask & PSW_MASK_ADDR_MODE) == PSW_MASK_BA) {
715 if (psw->addr & ~PSW_ADDR_31)
716 return 0;
717 }
718 if (!(psw->mask & PSW_MASK_ADDR_MODE) && (psw->addr & ~PSW_ADDR_24))
719 return 0;
720 if ((psw->mask & PSW_MASK_ADDR_MODE) == PSW_MASK_EA)
721 return 0;
a3fb577e
TH
722 if (psw->addr & 1)
723 return 0;
3736b874
HC
724 return 1;
725}
726
48a3e950
CH
727int kvm_s390_handle_lpsw(struct kvm_vcpu *vcpu)
728{
3736b874 729 psw_t *gpsw = &vcpu->arch.sie_block->gpsw;
48a3e950 730 psw_compat_t new_psw;
3736b874 731 u64 addr;
2d8bcaed 732 int rc;
27f67f87 733 u8 ar;
48a3e950 734
a37cb07a
CB
735 vcpu->stat.instruction_lpsw++;
736
3736b874 737 if (gpsw->mask & PSW_MASK_PSTATE)
208dd756
TH
738 return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);
739
8ae04b8f 740 addr = kvm_s390_get_base_disp_s(vcpu, &ar);
6fd0fcc9
HC
741 if (addr & 7)
742 return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
2d8bcaed 743
8ae04b8f 744 rc = read_guest(vcpu, addr, ar, &new_psw, sizeof(new_psw));
2d8bcaed
HC
745 if (rc)
746 return kvm_s390_inject_prog_cond(vcpu, rc);
6fd0fcc9
HC
747 if (!(new_psw.mask & PSW32_MASK_BASE))
748 return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
3736b874
HC
749 gpsw->mask = (new_psw.mask & ~PSW32_MASK_BASE) << 32;
750 gpsw->mask |= new_psw.addr & PSW32_ADDR_AMODE;
751 gpsw->addr = new_psw.addr & ~PSW32_ADDR_AMODE;
752 if (!is_valid_psw(gpsw))
6fd0fcc9 753 return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
48a3e950
CH
754 return 0;
755}
756
757static int handle_lpswe(struct kvm_vcpu *vcpu)
758{
48a3e950 759 psw_t new_psw;
3736b874 760 u64 addr;
2d8bcaed 761 int rc;
27f67f87 762 u8 ar;
48a3e950 763
a37cb07a
CB
764 vcpu->stat.instruction_lpswe++;
765
5087dfa6
TH
766 if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE)
767 return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);
768
8ae04b8f 769 addr = kvm_s390_get_base_disp_s(vcpu, &ar);
6fd0fcc9
HC
770 if (addr & 7)
771 return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
8ae04b8f 772 rc = read_guest(vcpu, addr, ar, &new_psw, sizeof(new_psw));
2d8bcaed
HC
773 if (rc)
774 return kvm_s390_inject_prog_cond(vcpu, rc);
3736b874
HC
775 vcpu->arch.sie_block->gpsw = new_psw;
776 if (!is_valid_psw(&vcpu->arch.sie_block->gpsw))
6fd0fcc9 777 return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
48a3e950
CH
778 return 0;
779}
780
453423dc
CB
781static int handle_stidp(struct kvm_vcpu *vcpu)
782{
9bb0ec09 783 u64 stidp_data = vcpu->kvm->arch.model.cpuid;
453423dc 784 u64 operand2;
7d777d78 785 int rc;
27f67f87 786 u8 ar;
453423dc
CB
787
788 vcpu->stat.instruction_stidp++;
b1c571a5 789
5087dfa6
TH
790 if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE)
791 return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);
792
8ae04b8f 793 operand2 = kvm_s390_get_base_disp_s(vcpu, &ar);
453423dc 794
db4a29cb
HC
795 if (operand2 & 7)
796 return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
453423dc 797
8ae04b8f 798 rc = write_guest(vcpu, operand2, ar, &stidp_data, sizeof(stidp_data));
7d777d78
HC
799 if (rc)
800 return kvm_s390_inject_prog_cond(vcpu, rc);
453423dc 801
7cbde76b 802 VCPU_EVENT(vcpu, 3, "STIDP: store cpu id 0x%llx", stidp_data);
453423dc
CB
803 return 0;
804}
805
806static void handle_stsi_3_2_2(struct kvm_vcpu *vcpu, struct sysinfo_3_2_2 *mem)
807{
453423dc
CB
808 int cpus = 0;
809 int n;
810
ff520a63 811 cpus = atomic_read(&vcpu->kvm->online_vcpus);
453423dc
CB
812
813 /* deal with other level 3 hypervisors */
caf757c6 814 if (stsi(mem, 3, 2, 2))
453423dc
CB
815 mem->count = 0;
816 if (mem->count < 8)
817 mem->count++;
818 for (n = mem->count - 1; n > 0 ; n--)
819 memcpy(&mem->vm[n], &mem->vm[n - 1], sizeof(mem->vm[0]));
820
b75f4c9a 821 memset(&mem->vm[0], 0, sizeof(mem->vm[0]));
453423dc
CB
822 mem->vm[0].cpus_total = cpus;
823 mem->vm[0].cpus_configured = cpus;
824 mem->vm[0].cpus_standby = 0;
825 mem->vm[0].cpus_reserved = 0;
826 mem->vm[0].caf = 1000;
827 memcpy(mem->vm[0].name, "KVMguest", 8);
828 ASCEBC(mem->vm[0].name, 8);
829 memcpy(mem->vm[0].cpi, "KVM/Linux ", 16);
830 ASCEBC(mem->vm[0].cpi, 16);
831}
832
27f67f87 833static void insert_stsi_usr_data(struct kvm_vcpu *vcpu, u64 addr, u8 ar,
e44fc8c9
ET
834 u8 fc, u8 sel1, u16 sel2)
835{
836 vcpu->run->exit_reason = KVM_EXIT_S390_STSI;
837 vcpu->run->s390_stsi.addr = addr;
838 vcpu->run->s390_stsi.ar = ar;
839 vcpu->run->s390_stsi.fc = fc;
840 vcpu->run->s390_stsi.sel1 = sel1;
841 vcpu->run->s390_stsi.sel2 = sel2;
842}
843
453423dc
CB
844static int handle_stsi(struct kvm_vcpu *vcpu)
845{
5a32c1af
CB
846 int fc = (vcpu->run->s.regs.gprs[0] & 0xf0000000) >> 28;
847 int sel1 = vcpu->run->s.regs.gprs[0] & 0xff;
848 int sel2 = vcpu->run->s.regs.gprs[1] & 0xffff;
c51f068c 849 unsigned long mem = 0;
453423dc 850 u64 operand2;
db4a29cb 851 int rc = 0;
27f67f87 852 u8 ar;
453423dc
CB
853
854 vcpu->stat.instruction_stsi++;
7cbde76b 855 VCPU_EVENT(vcpu, 3, "STSI: fc: %u sel1: %u sel2: %u", fc, sel1, sel2);
453423dc 856
5087dfa6
TH
857 if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE)
858 return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);
859
87d41fb4 860 if (fc > 3) {
ea828ebf 861 kvm_s390_set_psw_cc(vcpu, 3);
87d41fb4
TH
862 return 0;
863 }
453423dc 864
87d41fb4
TH
865 if (vcpu->run->s.regs.gprs[0] & 0x0fffff00
866 || vcpu->run->s.regs.gprs[1] & 0xffff0000)
453423dc
CB
867 return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
868
87d41fb4 869 if (fc == 0) {
5a32c1af 870 vcpu->run->s.regs.gprs[0] = 3 << 28;
ea828ebf 871 kvm_s390_set_psw_cc(vcpu, 0);
453423dc 872 return 0;
87d41fb4
TH
873 }
874
8ae04b8f 875 operand2 = kvm_s390_get_base_disp_s(vcpu, &ar);
87d41fb4 876
353cbc6a 877 if (!kvm_s390_pv_cpu_is_protected(vcpu) && (operand2 & 0xfff))
87d41fb4
TH
878 return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
879
880 switch (fc) {
453423dc
CB
881 case 1: /* same handling for 1 and 2 */
882 case 2:
883 mem = get_zeroed_page(GFP_KERNEL);
884 if (!mem)
c51f068c 885 goto out_no_data;
caf757c6 886 if (stsi((void *) mem, fc, sel1, sel2))
c51f068c 887 goto out_no_data;
453423dc
CB
888 break;
889 case 3:
890 if (sel1 != 2 || sel2 != 2)
c51f068c 891 goto out_no_data;
453423dc
CB
892 mem = get_zeroed_page(GFP_KERNEL);
893 if (!mem)
c51f068c 894 goto out_no_data;
453423dc
CB
895 handle_stsi_3_2_2(vcpu, (void *) mem);
896 break;
453423dc 897 }
353cbc6a
JF
898 if (kvm_s390_pv_cpu_is_protected(vcpu)) {
899 memcpy((void *)sida_origin(vcpu->arch.sie_block), (void *)mem,
900 PAGE_SIZE);
901 rc = 0;
902 } else {
903 rc = write_guest(vcpu, operand2, ar, (void *)mem, PAGE_SIZE);
904 }
645c5bc1
HC
905 if (rc) {
906 rc = kvm_s390_inject_prog_cond(vcpu, rc);
907 goto out;
453423dc 908 }
e44fc8c9
ET
909 if (vcpu->kvm->arch.user_stsi) {
910 insert_stsi_usr_data(vcpu, operand2, ar, fc, sel1, sel2);
911 rc = -EREMOTE;
912 }
5786fffa 913 trace_kvm_s390_handle_stsi(vcpu, fc, sel1, sel2, operand2);
453423dc 914 free_page(mem);
ea828ebf 915 kvm_s390_set_psw_cc(vcpu, 0);
5a32c1af 916 vcpu->run->s.regs.gprs[0] = 0;
e44fc8c9 917 return rc;
c51f068c 918out_no_data:
ea828ebf 919 kvm_s390_set_psw_cc(vcpu, 3);
645c5bc1 920out:
c51f068c 921 free_page(mem);
db4a29cb 922 return rc;
453423dc
CB
923}
924
70455a36 925int kvm_s390_handle_b2(struct kvm_vcpu *vcpu)
453423dc 926{
6db4263f
CB
927 switch (vcpu->arch.sie_block->ipa & 0x00ff) {
928 case 0x02:
929 return handle_stidp(vcpu);
930 case 0x04:
931 return handle_set_clock(vcpu);
932 case 0x10:
933 return handle_set_prefix(vcpu);
934 case 0x11:
935 return handle_store_prefix(vcpu);
936 case 0x12:
937 return handle_store_cpu_address(vcpu);
938 case 0x14:
939 return kvm_s390_handle_vsie(vcpu);
940 case 0x21:
941 case 0x50:
942 return handle_ipte_interlock(vcpu);
943 case 0x29:
944 return handle_iske(vcpu);
945 case 0x2a:
946 return handle_rrbe(vcpu);
947 case 0x2b:
948 return handle_sske(vcpu);
949 case 0x2c:
950 return handle_test_block(vcpu);
951 case 0x30:
952 case 0x31:
953 case 0x32:
954 case 0x33:
955 case 0x34:
956 case 0x35:
957 case 0x36:
958 case 0x37:
959 case 0x38:
960 case 0x39:
961 case 0x3a:
962 case 0x3b:
963 case 0x3c:
964 case 0x5f:
965 case 0x74:
966 case 0x76:
967 return handle_io_inst(vcpu);
968 case 0x56:
969 return handle_sthyi(vcpu);
970 case 0x7d:
971 return handle_stsi(vcpu);
e5282de9
PM
972 case 0xaf:
973 return handle_pqap(vcpu);
6db4263f
CB
974 case 0xb1:
975 return handle_stfl(vcpu);
976 case 0xb2:
977 return handle_lpswe(vcpu);
978 default:
979 return -EOPNOTSUPP;
980 }
453423dc 981}
bb25b9ba 982
48a3e950
CH
983static int handle_epsw(struct kvm_vcpu *vcpu)
984{
985 int reg1, reg2;
986
a37cb07a
CB
987 vcpu->stat.instruction_epsw++;
988
aeb87c3c 989 kvm_s390_get_regs_rre(vcpu, &reg1, &reg2);
48a3e950
CH
990
991 /* This basically extracts the mask half of the psw. */
843200e7 992 vcpu->run->s.regs.gprs[reg1] &= 0xffffffff00000000UL;
48a3e950
CH
993 vcpu->run->s.regs.gprs[reg1] |= vcpu->arch.sie_block->gpsw.mask >> 32;
994 if (reg2) {
843200e7 995 vcpu->run->s.regs.gprs[reg2] &= 0xffffffff00000000UL;
48a3e950 996 vcpu->run->s.regs.gprs[reg2] |=
843200e7 997 vcpu->arch.sie_block->gpsw.mask & 0x00000000ffffffffUL;
48a3e950
CH
998 }
999 return 0;
1000}
1001
69d0d3a3
CB
1002#define PFMF_RESERVED 0xfffc0101UL
1003#define PFMF_SK 0x00020000UL
1004#define PFMF_CF 0x00010000UL
1005#define PFMF_UI 0x00008000UL
1006#define PFMF_FSC 0x00007000UL
1007#define PFMF_NQ 0x00000800UL
1008#define PFMF_MR 0x00000400UL
1009#define PFMF_MC 0x00000200UL
1010#define PFMF_KEY 0x000000feUL
1011
1012static int handle_pfmf(struct kvm_vcpu *vcpu)
1013{
1824c723 1014 bool mr = false, mc = false, nq;
69d0d3a3
CB
1015 int reg1, reg2;
1016 unsigned long start, end;
1824c723 1017 unsigned char key;
69d0d3a3
CB
1018
1019 vcpu->stat.instruction_pfmf++;
1020
1021 kvm_s390_get_regs_rre(vcpu, &reg1, &reg2);
1022
03c02807 1023 if (!test_kvm_facility(vcpu->kvm, 8))
69d0d3a3
CB
1024 return kvm_s390_inject_program_int(vcpu, PGM_OPERATION);
1025
1026 if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE)
208dd756 1027 return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);
69d0d3a3
CB
1028
1029 if (vcpu->run->s.regs.gprs[reg1] & PFMF_RESERVED)
1030 return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
1031
edc5b055
DH
1032 /* Only provide non-quiescing support if enabled for the guest */
1033 if (vcpu->run->s.regs.gprs[reg1] & PFMF_NQ &&
1034 !test_kvm_facility(vcpu->kvm, 14))
69d0d3a3
CB
1035 return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
1036
1824c723
DH
1037 /* Only provide conditional-SSKE support if enabled for the guest */
1038 if (vcpu->run->s.regs.gprs[reg1] & PFMF_SK &&
1039 test_kvm_facility(vcpu->kvm, 10)) {
1040 mr = vcpu->run->s.regs.gprs[reg1] & PFMF_MR;
1041 mc = vcpu->run->s.regs.gprs[reg1] & PFMF_MC;
1042 }
1043
1044 nq = vcpu->run->s.regs.gprs[reg1] & PFMF_NQ;
1045 key = vcpu->run->s.regs.gprs[reg1] & PFMF_KEY;
69d0d3a3 1046 start = vcpu->run->s.regs.gprs[reg2] & PAGE_MASK;
a02689fe 1047 start = kvm_s390_logical_to_effective(vcpu, start);
fb34c603 1048
6164a2e9
DH
1049 if (vcpu->run->s.regs.gprs[reg1] & PFMF_CF) {
1050 if (kvm_s390_check_low_addr_prot_real(vcpu, start))
1051 return kvm_s390_inject_prog_irq(vcpu, &vcpu->arch.pgm);
1052 }
1053
69d0d3a3
CB
1054 switch (vcpu->run->s.regs.gprs[reg1] & PFMF_FSC) {
1055 case 0x00000000:
6164a2e9
DH
1056 /* only 4k frames specify a real address */
1057 start = kvm_s390_real_to_abs(vcpu, start);
58cdf5eb 1058 end = (start + PAGE_SIZE) & ~(PAGE_SIZE - 1);
69d0d3a3
CB
1059 break;
1060 case 0x00001000:
58cdf5eb 1061 end = (start + _SEGMENT_SIZE) & ~(_SEGMENT_SIZE - 1);
69d0d3a3 1062 break;
69d0d3a3 1063 case 0x00002000:
53df84f8
GH
1064 /* only support 2G frame size if EDAT2 is available and we are
1065 not in 24-bit addressing mode */
1066 if (!test_kvm_facility(vcpu->kvm, 78) ||
8bb3fdd6 1067 psw_bits(vcpu->arch.sie_block->gpsw).eaba == PSW_BITS_AMODE_24BIT)
53df84f8 1068 return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
58cdf5eb 1069 end = (start + _REGION3_SIZE) & ~(_REGION3_SIZE - 1);
53df84f8 1070 break;
69d0d3a3
CB
1071 default:
1072 return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
1073 }
a02689fe 1074
695be0e7 1075 while (start != end) {
bd096f64
JF
1076 unsigned long vmaddr;
1077 bool unlocked = false;
fb34c603
TH
1078
1079 /* Translate guest address to host address */
bd096f64
JF
1080 vmaddr = gfn_to_hva(vcpu->kvm, gpa_to_gfn(start));
1081 if (kvm_is_error_hva(vmaddr))
69d0d3a3
CB
1082 return kvm_s390_inject_program_int(vcpu, PGM_ADDRESSING);
1083
1084 if (vcpu->run->s.regs.gprs[reg1] & PFMF_CF) {
0230cae7 1085 if (kvm_clear_guest(vcpu->kvm, start, PAGE_SIZE))
69d0d3a3
CB
1086 return kvm_s390_inject_program_int(vcpu, PGM_ADDRESSING);
1087 }
1088
1089 if (vcpu->run->s.regs.gprs[reg1] & PFMF_SK) {
730cd632 1090 int rc = kvm_s390_skey_check_enable(vcpu);
3ac8e380
DD
1091
1092 if (rc)
1093 return rc;
d3ed1cee 1094 down_read(&current->mm->mmap_sem);
bd096f64 1095 rc = cond_set_guest_storage_key(current->mm, vmaddr,
1824c723 1096 key, NULL, nq, mr, mc);
bd096f64
JF
1097 if (rc < 0) {
1098 rc = fixup_user_fault(current, current->mm, vmaddr,
1099 FAULT_FLAG_WRITE, &unlocked);
1100 rc = !rc ? -EAGAIN : rc;
1101 }
a11bdb1a 1102 up_read(&current->mm->mmap_sem);
bd096f64 1103 if (rc == -EFAULT)
69d0d3a3 1104 return kvm_s390_inject_program_int(vcpu, PGM_ADDRESSING);
a11bdb1a
JF
1105 if (rc == -EAGAIN)
1106 continue;
1107 if (rc < 0)
1108 return rc;
bd096f64 1109 }
a11bdb1a 1110 start += PAGE_SIZE;
69d0d3a3 1111 }
2c26d1d2 1112 if (vcpu->run->s.regs.gprs[reg1] & PFMF_FSC) {
8bb3fdd6 1113 if (psw_bits(vcpu->arch.sie_block->gpsw).eaba == PSW_BITS_AMODE_64BIT) {
2c26d1d2
DH
1114 vcpu->run->s.regs.gprs[reg2] = end;
1115 } else {
1116 vcpu->run->s.regs.gprs[reg2] &= ~0xffffffffUL;
1117 end = kvm_s390_logical_to_effective(vcpu, end);
1118 vcpu->run->s.regs.gprs[reg2] |= end;
1119 }
1120 }
69d0d3a3
CB
1121 return 0;
1122}
1123
afdad616
CI
1124/*
1125 * Must be called with relevant read locks held (kvm->mm->mmap_sem, kvm->srcu)
1126 */
1127static inline int __do_essa(struct kvm_vcpu *vcpu, const int orc)
190df4a2 1128{
190df4a2
CI
1129 int r1, r2, nappended, entries;
1130 unsigned long gfn, hva, res, pgstev, ptev;
1131 unsigned long *cbrlo;
1132
1133 /*
1134 * We don't need to set SD.FPF.SK to 1 here, because if we have a
1135 * machine check here we either handle it or crash
1136 */
1137
1138 kvm_s390_get_regs_rre(vcpu, &r1, &r2);
1139 gfn = vcpu->run->s.regs.gprs[r2] >> PAGE_SHIFT;
1140 hva = gfn_to_hva(vcpu->kvm, gfn);
1141 entries = (vcpu->arch.sie_block->cbrlo & ~PAGE_MASK) >> 3;
1142
1143 if (kvm_is_error_hva(hva))
1144 return kvm_s390_inject_program_int(vcpu, PGM_ADDRESSING);
1145
1146 nappended = pgste_perform_essa(vcpu->kvm->mm, hva, orc, &ptev, &pgstev);
1147 if (nappended < 0) {
1148 res = orc ? 0x10 : 0;
1149 vcpu->run->s.regs.gprs[r1] = res; /* Exception Indication */
1150 return 0;
1151 }
1152 res = (pgstev & _PGSTE_GPS_USAGE_MASK) >> 22;
1153 /*
1154 * Set the block-content state part of the result. 0 means resident, so
1155 * nothing to do if the page is valid. 2 is for preserved pages
1156 * (non-present and non-zero), and 3 for zero pages (non-present and
1157 * zero).
1158 */
1159 if (ptev & _PAGE_INVALID) {
1160 res |= 2;
1161 if (pgstev & _PGSTE_GPS_ZERO)
1162 res |= 1;
1163 }
1bab1c02
CI
1164 if (pgstev & _PGSTE_GPS_NODAT)
1165 res |= 0x20;
190df4a2
CI
1166 vcpu->run->s.regs.gprs[r1] = res;
1167 /*
1168 * It is possible that all the normal 511 slots were full, in which case
1169 * we will now write in the 512th slot, which is reserved for host use.
1170 * In both cases we let the normal essa handling code process all the
1171 * slots, including the reserved one, if needed.
1172 */
1173 if (nappended > 0) {
1174 cbrlo = phys_to_virt(vcpu->arch.sie_block->cbrlo & PAGE_MASK);
1175 cbrlo[entries] = gfn << PAGE_SHIFT;
1176 }
1177
afdad616
CI
1178 if (orc) {
1179 struct kvm_memory_slot *ms = gfn_to_memslot(vcpu->kvm, gfn);
1180
1181 /* Increment only if we are really flipping the bit */
1182 if (ms && !test_and_set_bit(gfn - ms->base_gfn, kvm_second_dirty_bitmap(ms)))
1183 atomic64_inc(&vcpu->kvm->arch.cmma_dirty_pages);
190df4a2
CI
1184 }
1185
1186 return nappended;
1187}
1188
b31288fa
KW
1189static int handle_essa(struct kvm_vcpu *vcpu)
1190{
1191 /* entries expected to be 1FF */
1192 int entries = (vcpu->arch.sie_block->cbrlo & ~PAGE_MASK) >> 3;
4a5e7e38 1193 unsigned long *cbrlo;
b31288fa 1194 struct gmap *gmap;
190df4a2 1195 int i, orc;
b31288fa 1196
7cbde76b 1197 VCPU_EVENT(vcpu, 4, "ESSA: release %d pages", entries);
b31288fa
KW
1198 gmap = vcpu->arch.gmap;
1199 vcpu->stat.instruction_essa++;
e6db1d61 1200 if (!vcpu->kvm->arch.use_cmma)
b31288fa
KW
1201 return kvm_s390_inject_program_int(vcpu, PGM_OPERATION);
1202
1203 if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE)
1204 return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);
190df4a2
CI
1205 /* Check for invalid operation request code */
1206 orc = (vcpu->arch.sie_block->ipb & 0xf0000000) >> 28;
1bab1c02
CI
1207 /* ORCs 0-6 are always valid */
1208 if (orc > (test_kvm_facility(vcpu->kvm, 147) ? ESSA_SET_STABLE_NODAT
1209 : ESSA_SET_STABLE_IF_RESIDENT))
b31288fa
KW
1210 return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
1211
afdad616 1212 if (!vcpu->kvm->arch.migration_mode) {
190df4a2
CI
1213 /*
1214 * CMMA is enabled in the KVM settings, but is disabled in
1215 * the SIE block and in the mm_context, and we are not doing
1216 * a migration. Enable CMMA in the mm_context.
1217 * Since we need to take a write lock to write to the context
1218 * to avoid races with storage keys handling, we check if the
1219 * value really needs to be written to; if the value is
1220 * already correct, we do nothing and avoid the lock.
1221 */
c9f0a2b8 1222 if (vcpu->kvm->mm->context.uses_cmm == 0) {
190df4a2 1223 down_write(&vcpu->kvm->mm->mmap_sem);
c9f0a2b8 1224 vcpu->kvm->mm->context.uses_cmm = 1;
190df4a2
CI
1225 up_write(&vcpu->kvm->mm->mmap_sem);
1226 }
1227 /*
1228 * If we are here, we are supposed to have CMMA enabled in
1229 * the SIE block. Enabling CMMA works on a per-CPU basis,
1230 * while the context use_cmma flag is per process.
1231 * It's possible that the context flag is enabled and the
1232 * SIE flag is not, so we set the flag always; if it was
1233 * already set, nothing changes, otherwise we enable it
1234 * on this CPU too.
1235 */
1236 vcpu->arch.sie_block->ecb2 |= ECB2_CMMA;
1237 /* Retry the ESSA instruction */
1238 kvm_s390_retry_instr(vcpu);
1239 } else {
afdad616
CI
1240 int srcu_idx;
1241
1242 down_read(&vcpu->kvm->mm->mmap_sem);
1243 srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
1244 i = __do_essa(vcpu, orc);
1245 srcu_read_unlock(&vcpu->kvm->srcu, srcu_idx);
1246 up_read(&vcpu->kvm->mm->mmap_sem);
190df4a2
CI
1247 if (i < 0)
1248 return i;
afdad616 1249 /* Account for the possible extra cbrl entry */
190df4a2
CI
1250 entries += i;
1251 }
b31288fa
KW
1252 vcpu->arch.sie_block->cbrlo &= PAGE_MASK; /* reset nceo */
1253 cbrlo = phys_to_virt(vcpu->arch.sie_block->cbrlo);
1254 down_read(&gmap->mm->mmap_sem);
4a5e7e38
DH
1255 for (i = 0; i < entries; ++i)
1256 __gmap_zap(gmap, cbrlo[i]);
b31288fa 1257 up_read(&gmap->mm->mmap_sem);
b31288fa
KW
1258 return 0;
1259}
1260
48a3e950
CH
1261int kvm_s390_handle_b9(struct kvm_vcpu *vcpu)
1262{
6db4263f
CB
1263 switch (vcpu->arch.sie_block->ipa & 0x00ff) {
1264 case 0x8a:
1265 case 0x8e:
1266 case 0x8f:
1267 return handle_ipte_interlock(vcpu);
1268 case 0x8d:
1269 return handle_epsw(vcpu);
1270 case 0xab:
1271 return handle_essa(vcpu);
1272 case 0xaf:
1273 return handle_pfmf(vcpu);
1274 default:
1275 return -EOPNOTSUPP;
1276 }
48a3e950
CH
1277}
1278
953ed88d
TH
1279int kvm_s390_handle_lctl(struct kvm_vcpu *vcpu)
1280{
1281 int reg1 = (vcpu->arch.sie_block->ipa & 0x00f0) >> 4;
1282 int reg3 = vcpu->arch.sie_block->ipa & 0x000f;
fc56eb66
HC
1283 int reg, rc, nr_regs;
1284 u32 ctl_array[16];
f987a3ee 1285 u64 ga;
27f67f87 1286 u8 ar;
953ed88d
TH
1287
1288 vcpu->stat.instruction_lctl++;
1289
1290 if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE)
1291 return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);
1292
8ae04b8f 1293 ga = kvm_s390_get_base_disp_rs(vcpu, &ar);
953ed88d 1294
f987a3ee 1295 if (ga & 3)
953ed88d
TH
1296 return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
1297
7cbde76b 1298 VCPU_EVENT(vcpu, 4, "LCTL: r1:%d, r3:%d, addr: 0x%llx", reg1, reg3, ga);
f987a3ee 1299 trace_kvm_s390_handle_lctl(vcpu, 0, reg1, reg3, ga);
953ed88d 1300
fc56eb66 1301 nr_regs = ((reg3 - reg1) & 0xf) + 1;
8ae04b8f 1302 rc = read_guest(vcpu, ga, ar, ctl_array, nr_regs * sizeof(u32));
fc56eb66
HC
1303 if (rc)
1304 return kvm_s390_inject_prog_cond(vcpu, rc);
953ed88d 1305 reg = reg1;
fc56eb66 1306 nr_regs = 0;
953ed88d 1307 do {
953ed88d 1308 vcpu->arch.sie_block->gcr[reg] &= 0xffffffff00000000ul;
fc56eb66 1309 vcpu->arch.sie_block->gcr[reg] |= ctl_array[nr_regs++];
953ed88d
TH
1310 if (reg == reg3)
1311 break;
1312 reg = (reg + 1) % 16;
1313 } while (1);
2dca485f 1314 kvm_make_request(KVM_REQ_TLB_FLUSH, vcpu);
953ed88d
TH
1315 return 0;
1316}
1317
aba07508
DH
1318int kvm_s390_handle_stctl(struct kvm_vcpu *vcpu)
1319{
1320 int reg1 = (vcpu->arch.sie_block->ipa & 0x00f0) >> 4;
1321 int reg3 = vcpu->arch.sie_block->ipa & 0x000f;
fc56eb66
HC
1322 int reg, rc, nr_regs;
1323 u32 ctl_array[16];
aba07508 1324 u64 ga;
27f67f87 1325 u8 ar;
aba07508
DH
1326
1327 vcpu->stat.instruction_stctl++;
1328
1329 if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE)
1330 return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);
1331
8ae04b8f 1332 ga = kvm_s390_get_base_disp_rs(vcpu, &ar);
aba07508
DH
1333
1334 if (ga & 3)
1335 return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
1336
7cbde76b 1337 VCPU_EVENT(vcpu, 4, "STCTL r1:%d, r3:%d, addr: 0x%llx", reg1, reg3, ga);
aba07508
DH
1338 trace_kvm_s390_handle_stctl(vcpu, 0, reg1, reg3, ga);
1339
1340 reg = reg1;
fc56eb66 1341 nr_regs = 0;
aba07508 1342 do {
fc56eb66 1343 ctl_array[nr_regs++] = vcpu->arch.sie_block->gcr[reg];
aba07508
DH
1344 if (reg == reg3)
1345 break;
1346 reg = (reg + 1) % 16;
1347 } while (1);
8ae04b8f 1348 rc = write_guest(vcpu, ga, ar, ctl_array, nr_regs * sizeof(u32));
fc56eb66 1349 return rc ? kvm_s390_inject_prog_cond(vcpu, rc) : 0;
aba07508
DH
1350}
1351
953ed88d
TH
1352static int handle_lctlg(struct kvm_vcpu *vcpu)
1353{
1354 int reg1 = (vcpu->arch.sie_block->ipa & 0x00f0) >> 4;
1355 int reg3 = vcpu->arch.sie_block->ipa & 0x000f;
fc56eb66
HC
1356 int reg, rc, nr_regs;
1357 u64 ctl_array[16];
1358 u64 ga;
27f67f87 1359 u8 ar;
953ed88d
TH
1360
1361 vcpu->stat.instruction_lctlg++;
1362
1363 if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE)
1364 return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);
1365
8ae04b8f 1366 ga = kvm_s390_get_base_disp_rsy(vcpu, &ar);
953ed88d 1367
f987a3ee 1368 if (ga & 7)
953ed88d
TH
1369 return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
1370
7cbde76b 1371 VCPU_EVENT(vcpu, 4, "LCTLG: r1:%d, r3:%d, addr: 0x%llx", reg1, reg3, ga);
f987a3ee 1372 trace_kvm_s390_handle_lctl(vcpu, 1, reg1, reg3, ga);
953ed88d 1373
fc56eb66 1374 nr_regs = ((reg3 - reg1) & 0xf) + 1;
8ae04b8f 1375 rc = read_guest(vcpu, ga, ar, ctl_array, nr_regs * sizeof(u64));
fc56eb66
HC
1376 if (rc)
1377 return kvm_s390_inject_prog_cond(vcpu, rc);
1378 reg = reg1;
1379 nr_regs = 0;
953ed88d 1380 do {
fc56eb66 1381 vcpu->arch.sie_block->gcr[reg] = ctl_array[nr_regs++];
953ed88d
TH
1382 if (reg == reg3)
1383 break;
1384 reg = (reg + 1) % 16;
1385 } while (1);
2dca485f 1386 kvm_make_request(KVM_REQ_TLB_FLUSH, vcpu);
953ed88d
TH
1387 return 0;
1388}
1389
aba07508
DH
1390static int handle_stctg(struct kvm_vcpu *vcpu)
1391{
1392 int reg1 = (vcpu->arch.sie_block->ipa & 0x00f0) >> 4;
1393 int reg3 = vcpu->arch.sie_block->ipa & 0x000f;
fc56eb66
HC
1394 int reg, rc, nr_regs;
1395 u64 ctl_array[16];
1396 u64 ga;
27f67f87 1397 u8 ar;
aba07508
DH
1398
1399 vcpu->stat.instruction_stctg++;
1400
1401 if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE)
1402 return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);
1403
8ae04b8f 1404 ga = kvm_s390_get_base_disp_rsy(vcpu, &ar);
aba07508
DH
1405
1406 if (ga & 7)
1407 return kvm_s390_inject_program_int(vcpu, PGM_SPECIFICATION);
1408
7cbde76b 1409 VCPU_EVENT(vcpu, 4, "STCTG r1:%d, r3:%d, addr: 0x%llx", reg1, reg3, ga);
aba07508
DH
1410 trace_kvm_s390_handle_stctl(vcpu, 1, reg1, reg3, ga);
1411
fc56eb66
HC
1412 reg = reg1;
1413 nr_regs = 0;
aba07508 1414 do {
fc56eb66 1415 ctl_array[nr_regs++] = vcpu->arch.sie_block->gcr[reg];
aba07508
DH
1416 if (reg == reg3)
1417 break;
1418 reg = (reg + 1) % 16;
1419 } while (1);
8ae04b8f 1420 rc = write_guest(vcpu, ga, ar, ctl_array, nr_regs * sizeof(u64));
fc56eb66 1421 return rc ? kvm_s390_inject_prog_cond(vcpu, rc) : 0;
aba07508
DH
1422}
1423
953ed88d 1424int kvm_s390_handle_eb(struct kvm_vcpu *vcpu)
f379aae5 1425{
6db4263f
CB
1426 switch (vcpu->arch.sie_block->ipb & 0x000000ff) {
1427 case 0x25:
1428 return handle_stctg(vcpu);
1429 case 0x2f:
1430 return handle_lctlg(vcpu);
1431 case 0x60:
1432 case 0x61:
1433 case 0x62:
1434 return handle_ri(vcpu);
1435 default:
1436 return -EOPNOTSUPP;
1437 }
f379aae5
CH
1438}
1439
bb25b9ba
CB
1440static int handle_tprot(struct kvm_vcpu *vcpu)
1441{
b1c571a5 1442 u64 address1, address2;
a0465f9a
TH
1443 unsigned long hva, gpa;
1444 int ret = 0, cc = 0;
1445 bool writable;
27f67f87 1446 u8 ar;
bb25b9ba
CB
1447
1448 vcpu->stat.instruction_tprot++;
1449
f9f6bbc6
TH
1450 if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE)
1451 return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);
1452
8ae04b8f 1453 kvm_s390_get_base_disp_sse(vcpu, &address1, &address2, &ar, NULL);
b1c571a5 1454
bb25b9ba
CB
1455 /* we only handle the Linux memory detection case:
1456 * access key == 0
bb25b9ba
CB
1457 * everything else goes to userspace. */
1458 if (address2 & 0xf0)
1459 return -EOPNOTSUPP;
1460 if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_DAT)
a0465f9a 1461 ipte_lock(vcpu);
92c96321 1462 ret = guest_translate_address(vcpu, address1, ar, &gpa, GACC_STORE);
a0465f9a
TH
1463 if (ret == PGM_PROTECTION) {
1464 /* Write protected? Try again with read-only... */
1465 cc = 1;
92c96321
DH
1466 ret = guest_translate_address(vcpu, address1, ar, &gpa,
1467 GACC_FETCH);
a0465f9a
TH
1468 }
1469 if (ret) {
1470 if (ret == PGM_ADDRESSING || ret == PGM_TRANSLATION_SPEC) {
1471 ret = kvm_s390_inject_program_int(vcpu, ret);
1472 } else if (ret > 0) {
1473 /* Translation not available */
1474 kvm_s390_set_psw_cc(vcpu, 3);
1475 ret = 0;
1476 }
1477 goto out_unlock;
1478 }
59a1fa2d 1479
a0465f9a
TH
1480 hva = gfn_to_hva_prot(vcpu->kvm, gpa_to_gfn(gpa), &writable);
1481 if (kvm_is_error_hva(hva)) {
1482 ret = kvm_s390_inject_program_int(vcpu, PGM_ADDRESSING);
1483 } else {
1484 if (!writable)
1485 cc = 1; /* Write not permitted ==> read-only */
1486 kvm_s390_set_psw_cc(vcpu, cc);
1487 /* Note: CC2 only occurs for storage keys (not supported yet) */
1488 }
1489out_unlock:
1490 if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_DAT)
1491 ipte_unlock(vcpu);
1492 return ret;
bb25b9ba
CB
1493}
1494
1495int kvm_s390_handle_e5(struct kvm_vcpu *vcpu)
1496{
6db4263f
CB
1497 switch (vcpu->arch.sie_block->ipa & 0x00ff) {
1498 case 0x01:
bb25b9ba 1499 return handle_tprot(vcpu);
6db4263f
CB
1500 default:
1501 return -EOPNOTSUPP;
1502 }
bb25b9ba
CB
1503}
1504
8c3f61e2
CH
1505static int handle_sckpf(struct kvm_vcpu *vcpu)
1506{
1507 u32 value;
1508
a37cb07a
CB
1509 vcpu->stat.instruction_sckpf++;
1510
8c3f61e2 1511 if (vcpu->arch.sie_block->gpsw.mask & PSW_MASK_PSTATE)
208dd756 1512 return kvm_s390_inject_program_int(vcpu, PGM_PRIVILEGED_OP);
8c3f61e2
CH
1513
1514 if (vcpu->run->s.regs.gprs[0] & 0x00000000ffff0000)
1515 return kvm_s390_inject_program_int(vcpu,
1516 PGM_SPECIFICATION);
1517
1518 value = vcpu->run->s.regs.gprs[0] & 0x000000000000ffff;
1519 vcpu->arch.sie_block->todpr = value;
1520
1521 return 0;
1522}
1523
9acc317b
DH
1524static int handle_ptff(struct kvm_vcpu *vcpu)
1525{
a37cb07a
CB
1526 vcpu->stat.instruction_ptff++;
1527
9acc317b
DH
1528 /* we don't emulate any control instructions yet */
1529 kvm_s390_set_psw_cc(vcpu, 3);
1530 return 0;
1531}
1532
8c3f61e2
CH
1533int kvm_s390_handle_01(struct kvm_vcpu *vcpu)
1534{
6db4263f
CB
1535 switch (vcpu->arch.sie_block->ipa & 0x00ff) {
1536 case 0x04:
1537 return handle_ptff(vcpu);
1538 case 0x07:
1539 return handle_sckpf(vcpu);
1540 default:
1541 return -EOPNOTSUPP;
1542 }
8c3f61e2 1543}