[thirdparty/kernel/linux.git] / arch / score / include / asm / asmmacro.h

/* SPDX-License-Identifier: GPL-2.0 */
#ifndef _ASM_SCORE_ASMMACRO_H
#define _ASM_SCORE_ASMMACRO_H

#include <asm/asm-offsets.h>

#ifdef __ASSEMBLY__

.macro	SAVE_ALL
	mfcr	r30, cr0
	mv	r31, r0
	nop
	/* if UMs == 1, change stack. */
	slli.c	r30, r30, 28
	bpl	1f
	la	r31, kernelsp
	lw	r31, [r31]
1:
	mv	r30, r0
	addri	r0, r31, -PT_SIZE

	sw	r30, [r0, PT_R0]
	.set	r1
	sw	r1, [r0, PT_R1]
	.set	nor1
	sw	r2, [r0, PT_R2]
	sw	r3, [r0, PT_R3]
	sw	r4, [r0, PT_R4]
	sw	r5, [r0, PT_R5]
	sw	r6, [r0, PT_R6]
	sw	r7, [r0, PT_R7]

	sw	r8, [r0, PT_R8]
	sw	r9, [r0, PT_R9]
	sw	r10, [r0, PT_R10]
	sw	r11, [r0, PT_R11]
	sw	r12, [r0, PT_R12]
	sw	r13, [r0, PT_R13]
	sw	r14, [r0, PT_R14]
	sw	r15, [r0, PT_R15]

	sw	r16, [r0, PT_R16]
	sw	r17, [r0, PT_R17]
	sw	r18, [r0, PT_R18]
	sw	r19, [r0, PT_R19]
	sw	r20, [r0, PT_R20]
	sw	r21, [r0, PT_R21]
	sw	r22, [r0, PT_R22]
	sw	r23, [r0, PT_R23]

	sw	r24, [r0, PT_R24]
	sw	r25, [r0, PT_R25]
	sw	r25, [r0, PT_R25]
	sw	r26, [r0, PT_R26]
	sw	r27, [r0, PT_R27]

	sw	r28, [r0, PT_R28]
	sw	r29, [r0, PT_R29]
	orri	r28, r0, 0x1fff
	li	r31, 0x00001fff
	xor	r28, r28, r31

	mfcehl	r30, r31
	sw	r30, [r0, PT_CEH]
	sw	r31, [r0, PT_CEL]

	mfcr	r31, cr0
	sw	r31, [r0, PT_PSR]

	mfcr	r31, cr1
	sw	r31, [r0, PT_CONDITION]

	mfcr	r31, cr2
	sw	r31, [r0, PT_ECR]
	
	mfcr	r31, cr5
	srli	r31, r31, 1
	slli	r31, r31, 1
	sw	r31, [r0, PT_EPC]
.endm

.macro	RESTORE_ALL_AND_RET
	mfcr	r30, cr0
	srli	r30, r30, 1
	slli	r30, r30, 1
	mtcr	r30, cr0
	nop
	nop
	nop
	nop
	nop

	.set	r1
	ldis	r1, 0x00ff
	and	r30, r30, r1
	not	r1, r1
	lw	r31, [r0, PT_PSR]
	and	r31, r31, r1
	.set	nor1
	or	r31, r31, r30
	mtcr	r31, cr0
	nop
	nop
	nop
	nop
	nop

	lw	r30, [r0, PT_CONDITION]
	mtcr	r30, cr1
	nop
	nop
	nop
	nop
	nop

	lw	r30, [r0, PT_CEH]
	lw	r31, [r0, PT_CEL]
	mtcehl	r30, r31

	.set	r1
	lw	r1, [r0, PT_R1]
	.set	nor1
	lw	r2, [r0, PT_R2]
	lw	r3, [r0, PT_R3]
	lw	r4, [r0, PT_R4]
	lw	r5, [r0, PT_R5]
	lw	r6, [r0, PT_R6]
	lw	r7, [r0, PT_R7]

	lw	r8, [r0, PT_R8]
	lw	r9, [r0, PT_R9]
	lw	r10, [r0, PT_R10]
	lw	r11, [r0, PT_R11]
	lw	r12, [r0, PT_R12]
	lw	r13, [r0, PT_R13]
	lw	r14, [r0, PT_R14]
	lw	r15, [r0, PT_R15]

	lw	r16, [r0, PT_R16]
	lw	r17, [r0, PT_R17]
	lw	r18, [r0, PT_R18]
	lw	r19, [r0, PT_R19]
	lw	r20, [r0, PT_R20]
	lw	r21, [r0, PT_R21]
	lw	r22, [r0, PT_R22]
	lw	r23, [r0, PT_R23]

	lw	r24, [r0, PT_R24]
	lw	r25, [r0, PT_R25]
	lw	r26, [r0, PT_R26]
	lw	r27, [r0, PT_R27]
	lw	r28, [r0, PT_R28]
	lw	r29, [r0, PT_R29]

	lw	r30, [r0, PT_EPC]
	lw	r0, [r0, PT_R0]
	mtcr	r30, cr5
	rte
.endm

#endif /* __ASSEMBLY__ */
#endif /* _ASM_SCORE_ASMMACRO_H */
Commit	Line	Data
b2441318	1	/* SPDX-License-Identifier: GPL-2.0 */
6bc9a396 CL	2	#ifndef _ASM_SCORE_ASMMACRO_H
	3	#define _ASM_SCORE_ASMMACRO_H
	4
	5	#include <asm/asm-offsets.h>
	6
	7	#ifdef __ASSEMBLY__
	8
	9	.macro SAVE_ALL
	10	mfcr r30, cr0
	11	mv r31, r0
	12	nop
	13	/* if UMs == 1, change stack. */
	14	slli.c r30, r30, 28
	15	bpl 1f
	16	la r31, kernelsp
	17	lw r31, [r31]
	18	1:
	19	mv r30, r0
	20	addri r0, r31, -PT_SIZE
	21
	22	sw r30, [r0, PT_R0]
	23	.set r1
	24	sw r1, [r0, PT_R1]
	25	.set nor1
	26	sw r2, [r0, PT_R2]
	27	sw r3, [r0, PT_R3]
	28	sw r4, [r0, PT_R4]
	29	sw r5, [r0, PT_R5]
	30	sw r6, [r0, PT_R6]
	31	sw r7, [r0, PT_R7]
	32
	33	sw r8, [r0, PT_R8]
	34	sw r9, [r0, PT_R9]
	35	sw r10, [r0, PT_R10]
	36	sw r11, [r0, PT_R11]
	37	sw r12, [r0, PT_R12]
	38	sw r13, [r0, PT_R13]
	39	sw r14, [r0, PT_R14]
	40	sw r15, [r0, PT_R15]
	41
	42	sw r16, [r0, PT_R16]
	43	sw r17, [r0, PT_R17]
	44	sw r18, [r0, PT_R18]
	45	sw r19, [r0, PT_R19]
	46	sw r20, [r0, PT_R20]
	47	sw r21, [r0, PT_R21]
	48	sw r22, [r0, PT_R22]
	49	sw r23, [r0, PT_R23]
	50
	51	sw r24, [r0, PT_R24]
	52	sw r25, [r0, PT_R25]
	53	sw r25, [r0, PT_R25]
	54	sw r26, [r0, PT_R26]
	55	sw r27, [r0, PT_R27]
	56
	57	sw r28, [r0, PT_R28]
	58	sw r29, [r0, PT_R29]
	59	orri r28, r0, 0x1fff
	60	li r31, 0x00001fff
	61	xor r28, r28, r31
	62
	63	mfcehl r30, r31
	64	sw r30, [r0, PT_CEH]
	65	sw r31, [r0, PT_CEL]
66
67	mfcr r31, cr0
68	sw r31, [r0, PT_PSR]
69
70	mfcr r31, cr1
71	sw r31, [r0, PT_CONDITION]
72
73	mfcr r31, cr2
74	sw r31, [r0, PT_ECR]
75
76	mfcr r31, cr5
77	srli r31, r31, 1
78	slli r31, r31, 1
79	sw r31, [r0, PT_EPC]
80	.endm
81
82	.macro RESTORE_ALL_AND_RET
83	mfcr r30, cr0
84	srli r30, r30, 1
85	slli r30, r30, 1
86	mtcr r30, cr0
87	nop
88	nop
89	nop
90	nop
91	nop
92
93	.set r1
94	ldis r1, 0x00ff
95	and r30, r30, r1
96	not r1, r1
97	lw r31, [r0, PT_PSR]
98	and r31, r31, r1
99	.set nor1
100	or r31, r31, r30
101	mtcr r31, cr0
102	nop
103	nop
104	nop
105	nop
106	nop
107
108	lw r30, [r0, PT_CONDITION]
109	mtcr r30, cr1
110	nop
111	nop
112	nop
113	nop
114	nop
115
116	lw r30, [r0, PT_CEH]
117	lw r31, [r0, PT_CEL]
118	mtcehl r30, r31
119
120	.set r1
121	lw r1, [r0, PT_R1]
122	.set nor1
123	lw r2, [r0, PT_R2]
124	lw r3, [r0, PT_R3]
125	lw r4, [r0, PT_R4]
126	lw r5, [r0, PT_R5]
127	lw r6, [r0, PT_R6]
128	lw r7, [r0, PT_R7]
129
130	lw r8, [r0, PT_R8]
131	lw r9, [r0, PT_R9]
132	lw r10, [r0, PT_R10]
133	lw r11, [r0, PT_R11]
134	lw r12, [r0, PT_R12]
135	lw r13, [r0, PT_R13]
136	lw r14, [r0, PT_R14]
137	lw r15, [r0, PT_R15]
138
139	lw r16, [r0, PT_R16]
140	lw r17, [r0, PT_R17]
141	lw r18, [r0, PT_R18]
142	lw r19, [r0, PT_R19]
143	lw r20, [r0, PT_R20]
144	lw r21, [r0, PT_R21]
145	lw r22, [r0, PT_R22]
146	lw r23, [r0, PT_R23]
147
148	lw r24, [r0, PT_R24]
149	lw r25, [r0, PT_R25]
150	lw r26, [r0, PT_R26]
151	lw r27, [r0, PT_R27]
152	lw r28, [r0, PT_R28]
153	lw r29, [r0, PT_R29]
154
155	lw r30, [r0, PT_EPC]
156	lw r0, [r0, PT_R0]
157	mtcr r30, cr5
158	rte
159	.endm
160
161	#endif /* __ASSEMBLY__ */
162	#endif /* _ASM_SCORE_ASMMACRO_H */