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4138b740 KM |
1 | /* |
2 | * Copyright (C) 2009 Renesas Solutions Corp. | |
3 | * | |
4 | * Kuninori Morimoto <morimoto.kuninori@renesas.com> | |
5 | * | |
6 | * This file is subject to the terms and conditions of the GNU General Public | |
7 | * License. See the file "COPYING" in the main directory of this archive | |
8 | * for more details. | |
9 | */ | |
10 | ||
11 | #include <linux/init.h> | |
12 | #include <linux/device.h> | |
13 | #include <linux/platform_device.h> | |
1238c684 YG |
14 | #include <linux/mmc/host.h> |
15 | #include <linux/mmc/sh_mmcif.h> | |
960b9e7e | 16 | #include <linux/mmc/sh_mobile_sdhi.h> |
4138b740 KM |
17 | #include <linux/mtd/physmap.h> |
18 | #include <linux/gpio.h> | |
19 | #include <linux/interrupt.h> | |
35a35408 KM |
20 | #include <linux/io.h> |
21 | #include <linux/delay.h> | |
907050a3 | 22 | #include <linux/usb/r8a66597.h> |
4907d57f | 23 | #include <linux/i2c.h> |
8810e055 | 24 | #include <linux/i2c/tsc2007.h> |
1ce4da7a MD |
25 | #include <linux/spi/spi.h> |
26 | #include <linux/spi/sh_msiof.h> | |
27 | #include <linux/spi/mmc_spi.h> | |
e9103e74 | 28 | #include <linux/input.h> |
fc1d003d | 29 | #include <linux/input/sh_keysc.h> |
fa3ba51b | 30 | #include <video/sh_mobile_lcdc.h> |
1980fdc4 | 31 | #include <sound/sh_fsi.h> |
2153ad32 | 32 | #include <media/sh_mobile_ceu.h> |
207efd07 | 33 | #include <media/tw9910.h> |
9aa25d64 | 34 | #include <media/mt9t112.h> |
4138b740 | 35 | #include <asm/heartbeat.h> |
35a35408 | 36 | #include <asm/sh_eth.h> |
a991801a | 37 | #include <asm/clock.h> |
eb0cd9e8 | 38 | #include <asm/suspend.h> |
4138b740 KM |
39 | #include <cpu/sh7724.h> |
40 | ||
41 | /* | |
b7056bc1 KM |
42 | * Address Interface BusWidth |
43 | *----------------------------------------- | |
44 | * 0x0000_0000 uboot 16bit | |
45 | * 0x0004_0000 Linux romImage 16bit | |
46 | * 0x0014_0000 MTD for Linux 16bit | |
47 | * 0x0400_0000 Internal I/O 16/32bit | |
48 | * 0x0800_0000 DRAM 32bit | |
49 | * 0x1800_0000 MFI 16bit | |
4138b740 KM |
50 | */ |
51 | ||
9c472c4d KM |
52 | /* SWITCH |
53 | *------------------------------ | |
54 | * DS2[1] = FlashROM write protect ON : write protect | |
55 | * OFF : No write protect | |
56 | * DS2[2] = RMII / TS, SCIF ON : RMII | |
57 | * OFF : TS, SCIF3 | |
58 | * DS2[3] = Camera / Video ON : Camera | |
59 | * OFF : NTSC/PAL (IN) | |
60 | * DS2[5] = NTSC_OUT Clock ON : On board OSC | |
61 | * OFF : SH7724 DV_CLK | |
62 | * DS2[6-7] = MMC / SD ON-OFF : SD | |
63 | * OFF-ON : MMC | |
64 | */ | |
65 | ||
4138b740 KM |
66 | /* Heartbeat */ |
67 | static unsigned char led_pos[] = { 0, 1, 2, 3 }; | |
a09d2831 | 68 | |
4138b740 | 69 | static struct heartbeat_data heartbeat_data = { |
4138b740 KM |
70 | .nr_bits = 4, |
71 | .bit_pos = led_pos, | |
72 | }; | |
73 | ||
a09d2831 PM |
74 | static struct resource heartbeat_resource = { |
75 | .start = 0xA405012C, /* PTG */ | |
76 | .end = 0xA405012E - 1, | |
77 | .flags = IORESOURCE_MEM | IORESOURCE_MEM_8BIT, | |
4138b740 KM |
78 | }; |
79 | ||
80 | static struct platform_device heartbeat_device = { | |
81 | .name = "heartbeat", | |
82 | .id = -1, | |
83 | .dev = { | |
84 | .platform_data = &heartbeat_data, | |
85 | }, | |
a09d2831 PM |
86 | .num_resources = 1, |
87 | .resource = &heartbeat_resource, | |
4138b740 KM |
88 | }; |
89 | ||
90 | /* MTD */ | |
91 | static struct mtd_partition nor_flash_partitions[] = { | |
92 | { | |
b7056bc1 | 93 | .name = "boot loader", |
4138b740 | 94 | .offset = 0, |
b7056bc1 | 95 | .size = (5 * 1024 * 1024), |
d5ce010c | 96 | .mask_flags = MTD_WRITEABLE, /* force read-only */ |
4138b740 KM |
97 | }, { |
98 | .name = "free-area", | |
99 | .offset = MTDPART_OFS_APPEND, | |
100 | .size = MTDPART_SIZ_FULL, | |
101 | }, | |
102 | }; | |
103 | ||
104 | static struct physmap_flash_data nor_flash_data = { | |
105 | .width = 2, | |
106 | .parts = nor_flash_partitions, | |
107 | .nr_parts = ARRAY_SIZE(nor_flash_partitions), | |
108 | }; | |
109 | ||
110 | static struct resource nor_flash_resources[] = { | |
111 | [0] = { | |
112 | .name = "NOR Flash", | |
113 | .start = 0x00000000, | |
114 | .end = 0x03ffffff, | |
115 | .flags = IORESOURCE_MEM, | |
116 | } | |
117 | }; | |
118 | ||
119 | static struct platform_device nor_flash_device = { | |
120 | .name = "physmap-flash", | |
121 | .resource = nor_flash_resources, | |
122 | .num_resources = ARRAY_SIZE(nor_flash_resources), | |
123 | .dev = { | |
124 | .platform_data = &nor_flash_data, | |
125 | }, | |
126 | }; | |
127 | ||
35a35408 KM |
128 | /* SH Eth */ |
129 | #define SH_ETH_ADDR (0xA4600000) | |
35a35408 KM |
130 | static struct resource sh_eth_resources[] = { |
131 | [0] = { | |
132 | .start = SH_ETH_ADDR, | |
133 | .end = SH_ETH_ADDR + 0x1FC, | |
134 | .flags = IORESOURCE_MEM, | |
135 | }, | |
136 | [1] = { | |
137 | .start = 91, | |
138 | .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL, | |
139 | }, | |
140 | }; | |
141 | ||
3ce09334 | 142 | static struct sh_eth_plat_data sh_eth_plat = { |
35a35408 KM |
143 | .phy = 0x1f, /* SMSC LAN8700 */ |
144 | .edmac_endian = EDMAC_LITTLE_ENDIAN, | |
9055f895 YS |
145 | .register_type = SH_ETH_REG_FAST_SH4, |
146 | .phy_interface = PHY_INTERFACE_MODE_MII, | |
acf3cc28 | 147 | .ether_link_active_low = 1 |
35a35408 KM |
148 | }; |
149 | ||
150 | static struct platform_device sh_eth_device = { | |
151 | .name = "sh-eth", | |
152 | .id = 0, | |
153 | .dev = { | |
154 | .platform_data = &sh_eth_plat, | |
155 | }, | |
156 | .num_resources = ARRAY_SIZE(sh_eth_resources), | |
157 | .resource = sh_eth_resources, | |
40e42318 MD |
158 | .archdata = { |
159 | .hwblk_id = HWBLK_ETHER, | |
160 | }, | |
35a35408 KM |
161 | }; |
162 | ||
907050a3 | 163 | /* USB0 host */ |
3ce09334 | 164 | static void usb0_port_power(int port, int power) |
907050a3 KM |
165 | { |
166 | gpio_set_value(GPIO_PTB4, power); | |
167 | } | |
168 | ||
169 | static struct r8a66597_platdata usb0_host_data = { | |
170 | .on_chip = 1, | |
171 | .port_power = usb0_port_power, | |
172 | }; | |
173 | ||
174 | static struct resource usb0_host_resources[] = { | |
175 | [0] = { | |
176 | .start = 0xa4d80000, | |
177 | .end = 0xa4d80124 - 1, | |
178 | .flags = IORESOURCE_MEM, | |
179 | }, | |
180 | [1] = { | |
181 | .start = 65, | |
182 | .end = 65, | |
183 | .flags = IORESOURCE_IRQ | IRQF_TRIGGER_LOW, | |
184 | }, | |
185 | }; | |
186 | ||
187 | static struct platform_device usb0_host_device = { | |
188 | .name = "r8a66597_hcd", | |
189 | .id = 0, | |
190 | .dev = { | |
191 | .dma_mask = NULL, /* not use dma */ | |
192 | .coherent_dma_mask = 0xffffffff, | |
193 | .platform_data = &usb0_host_data, | |
194 | }, | |
195 | .num_resources = ARRAY_SIZE(usb0_host_resources), | |
196 | .resource = usb0_host_resources, | |
197 | }; | |
198 | ||
3714a9a0 | 199 | /* USB1 host/function */ |
3ce09334 | 200 | static void usb1_port_power(int port, int power) |
907050a3 | 201 | { |
907050a3 KM |
202 | gpio_set_value(GPIO_PTB5, power); |
203 | } | |
204 | ||
3714a9a0 | 205 | static struct r8a66597_platdata usb1_common_data = { |
907050a3 KM |
206 | .on_chip = 1, |
207 | .port_power = usb1_port_power, | |
208 | }; | |
209 | ||
3714a9a0 | 210 | static struct resource usb1_common_resources[] = { |
907050a3 KM |
211 | [0] = { |
212 | .start = 0xa4d90000, | |
213 | .end = 0xa4d90124 - 1, | |
214 | .flags = IORESOURCE_MEM, | |
215 | }, | |
216 | [1] = { | |
217 | .start = 66, | |
218 | .end = 66, | |
219 | .flags = IORESOURCE_IRQ | IRQF_TRIGGER_LOW, | |
220 | }, | |
221 | }; | |
222 | ||
3714a9a0 KM |
223 | static struct platform_device usb1_common_device = { |
224 | /* .name will be added in arch_setup */ | |
907050a3 KM |
225 | .id = 1, |
226 | .dev = { | |
227 | .dma_mask = NULL, /* not use dma */ | |
228 | .coherent_dma_mask = 0xffffffff, | |
3714a9a0 | 229 | .platform_data = &usb1_common_data, |
907050a3 | 230 | }, |
3714a9a0 KM |
231 | .num_resources = ARRAY_SIZE(usb1_common_resources), |
232 | .resource = usb1_common_resources, | |
907050a3 KM |
233 | }; |
234 | ||
fa3ba51b | 235 | /* LCDC */ |
44432407 GL |
236 | const static struct fb_videomode ecovec_lcd_modes[] = { |
237 | { | |
238 | .name = "Panel", | |
239 | .xres = 800, | |
240 | .yres = 480, | |
241 | .left_margin = 220, | |
242 | .right_margin = 110, | |
243 | .hsync_len = 70, | |
244 | .upper_margin = 20, | |
245 | .lower_margin = 5, | |
246 | .vsync_len = 5, | |
247 | .sync = 0, /* hsync and vsync are active low */ | |
248 | }, | |
249 | }; | |
250 | ||
251 | const static struct fb_videomode ecovec_dvi_modes[] = { | |
252 | { | |
253 | .name = "DVI", | |
254 | .xres = 1280, | |
255 | .yres = 720, | |
256 | .left_margin = 220, | |
257 | .right_margin = 110, | |
258 | .hsync_len = 40, | |
259 | .upper_margin = 20, | |
260 | .lower_margin = 5, | |
261 | .vsync_len = 5, | |
262 | .sync = 0, /* hsync and vsync are active low */ | |
263 | }, | |
264 | }; | |
265 | ||
fa3ba51b KM |
266 | static struct sh_mobile_lcdc_info lcdc_info = { |
267 | .ch[0] = { | |
268 | .interface_type = RGB18, | |
269 | .chan = LCDC_CHAN_MAINLCD, | |
270 | .bpp = 16, | |
fa3ba51b KM |
271 | .lcd_size_cfg = { /* 7.0 inch */ |
272 | .width = 152, | |
273 | .height = 91, | |
274 | }, | |
275 | .board_cfg = { | |
276 | }, | |
277 | } | |
278 | }; | |
279 | ||
280 | static struct resource lcdc_resources[] = { | |
281 | [0] = { | |
282 | .name = "LCDC", | |
283 | .start = 0xfe940000, | |
a6f15ade | 284 | .end = 0xfe942fff, |
fa3ba51b KM |
285 | .flags = IORESOURCE_MEM, |
286 | }, | |
287 | [1] = { | |
288 | .start = 106, | |
289 | .flags = IORESOURCE_IRQ, | |
290 | }, | |
291 | }; | |
292 | ||
293 | static struct platform_device lcdc_device = { | |
294 | .name = "sh_mobile_lcdc_fb", | |
295 | .num_resources = ARRAY_SIZE(lcdc_resources), | |
296 | .resource = lcdc_resources, | |
297 | .dev = { | |
298 | .platform_data = &lcdc_info, | |
299 | }, | |
300 | .archdata = { | |
301 | .hwblk_id = HWBLK_LCDC, | |
302 | }, | |
303 | }; | |
304 | ||
2153ad32 KM |
305 | /* CEU0 */ |
306 | static struct sh_mobile_ceu_info sh_mobile_ceu0_info = { | |
307 | .flags = SH_CEU_FLAG_USE_8BIT_BUS, | |
308 | }; | |
309 | ||
310 | static struct resource ceu0_resources[] = { | |
311 | [0] = { | |
312 | .name = "CEU0", | |
313 | .start = 0xfe910000, | |
314 | .end = 0xfe91009f, | |
315 | .flags = IORESOURCE_MEM, | |
316 | }, | |
317 | [1] = { | |
318 | .start = 52, | |
319 | .flags = IORESOURCE_IRQ, | |
320 | }, | |
321 | [2] = { | |
322 | /* place holder for contiguous memory */ | |
323 | }, | |
324 | }; | |
325 | ||
326 | static struct platform_device ceu0_device = { | |
327 | .name = "sh_mobile_ceu", | |
328 | .id = 0, /* "ceu0" clock */ | |
329 | .num_resources = ARRAY_SIZE(ceu0_resources), | |
330 | .resource = ceu0_resources, | |
331 | .dev = { | |
332 | .platform_data = &sh_mobile_ceu0_info, | |
333 | }, | |
334 | .archdata = { | |
335 | .hwblk_id = HWBLK_CEU0, | |
336 | }, | |
337 | }; | |
338 | ||
339 | /* CEU1 */ | |
340 | static struct sh_mobile_ceu_info sh_mobile_ceu1_info = { | |
341 | .flags = SH_CEU_FLAG_USE_8BIT_BUS, | |
342 | }; | |
343 | ||
344 | static struct resource ceu1_resources[] = { | |
345 | [0] = { | |
346 | .name = "CEU1", | |
347 | .start = 0xfe914000, | |
348 | .end = 0xfe91409f, | |
349 | .flags = IORESOURCE_MEM, | |
350 | }, | |
351 | [1] = { | |
352 | .start = 63, | |
353 | .flags = IORESOURCE_IRQ, | |
354 | }, | |
355 | [2] = { | |
356 | /* place holder for contiguous memory */ | |
357 | }, | |
358 | }; | |
359 | ||
360 | static struct platform_device ceu1_device = { | |
361 | .name = "sh_mobile_ceu", | |
362 | .id = 1, /* "ceu1" clock */ | |
363 | .num_resources = ARRAY_SIZE(ceu1_resources), | |
364 | .resource = ceu1_resources, | |
365 | .dev = { | |
366 | .platform_data = &sh_mobile_ceu1_info, | |
367 | }, | |
368 | .archdata = { | |
369 | .hwblk_id = HWBLK_CEU1, | |
370 | }, | |
371 | }; | |
372 | ||
125ecce6 | 373 | /* I2C device */ |
1980fdc4 KM |
374 | static struct i2c_board_info i2c0_devices[] = { |
375 | { | |
376 | I2C_BOARD_INFO("da7210", 0x1a), | |
377 | }, | |
378 | }; | |
379 | ||
125ecce6 KM |
380 | static struct i2c_board_info i2c1_devices[] = { |
381 | { | |
382 | I2C_BOARD_INFO("r2025sd", 0x32), | |
383 | }, | |
ea440783 NH |
384 | { |
385 | I2C_BOARD_INFO("lis3lv02d", 0x1c), | |
386 | .irq = 33, | |
387 | } | |
125ecce6 KM |
388 | }; |
389 | ||
e9103e74 KM |
390 | /* KEYSC */ |
391 | static struct sh_keysc_info keysc_info = { | |
392 | .mode = SH_KEYSC_MODE_1, | |
393 | .scan_timing = 3, | |
394 | .delay = 50, | |
395 | .kycr2_delay = 100, | |
396 | .keycodes = { KEY_1, 0, 0, 0, 0, | |
397 | KEY_2, 0, 0, 0, 0, | |
398 | KEY_3, 0, 0, 0, 0, | |
399 | KEY_4, 0, 0, 0, 0, | |
400 | KEY_5, 0, 0, 0, 0, | |
401 | KEY_6, 0, 0, 0, 0, }, | |
402 | }; | |
403 | ||
404 | static struct resource keysc_resources[] = { | |
405 | [0] = { | |
406 | .name = "KEYSC", | |
407 | .start = 0x044b0000, | |
408 | .end = 0x044b000f, | |
409 | .flags = IORESOURCE_MEM, | |
410 | }, | |
411 | [1] = { | |
412 | .start = 79, | |
413 | .flags = IORESOURCE_IRQ, | |
414 | }, | |
415 | }; | |
416 | ||
417 | static struct platform_device keysc_device = { | |
418 | .name = "sh_keysc", | |
419 | .id = 0, /* keysc0 clock */ | |
420 | .num_resources = ARRAY_SIZE(keysc_resources), | |
421 | .resource = keysc_resources, | |
422 | .dev = { | |
423 | .platform_data = &keysc_info, | |
424 | }, | |
425 | .archdata = { | |
426 | .hwblk_id = HWBLK_KEYSC, | |
427 | }, | |
428 | }; | |
429 | ||
8810e055 KM |
430 | /* TouchScreen */ |
431 | #define IRQ0 32 | |
5d75b3a2 PM |
432 | static int ts_get_pendown_state(void) |
433 | { | |
434 | int val = 0; | |
435 | gpio_free(GPIO_FN_INTC_IRQ0); | |
436 | gpio_request(GPIO_PTZ0, NULL); | |
437 | gpio_direction_input(GPIO_PTZ0); | |
438 | ||
439 | val = gpio_get_value(GPIO_PTZ0); | |
440 | ||
441 | gpio_free(GPIO_PTZ0); | |
442 | gpio_request(GPIO_FN_INTC_IRQ0, NULL); | |
443 | ||
444 | return val ? 0 : 1; | |
445 | } | |
446 | ||
447 | static int ts_init(void) | |
448 | { | |
449 | gpio_request(GPIO_FN_INTC_IRQ0, NULL); | |
450 | return 0; | |
451 | } | |
452 | ||
3ce09334 | 453 | static struct tsc2007_platform_data tsc2007_info = { |
8810e055 | 454 | .model = 2007, |
5d75b3a2 PM |
455 | .x_plate_ohms = 180, |
456 | .get_pendown_state = ts_get_pendown_state, | |
457 | .init_platform_hw = ts_init, | |
8810e055 KM |
458 | }; |
459 | ||
460 | static struct i2c_board_info ts_i2c_clients = { | |
461 | I2C_BOARD_INFO("tsc2007", 0x48), | |
462 | .type = "tsc2007", | |
463 | .platform_data = &tsc2007_info, | |
464 | .irq = IRQ0, | |
465 | }; | |
466 | ||
4fbc5ece | 467 | #if defined(CONFIG_MMC_TMIO) || defined(CONFIG_MMC_TMIO_MODULE) |
1238c684 | 468 | /* SDHI0 */ |
98779ad8 MD |
469 | static void sdhi0_set_pwr(struct platform_device *pdev, int state) |
470 | { | |
471 | gpio_set_value(GPIO_PTB6, state); | |
472 | } | |
473 | ||
474 | static struct sh_mobile_sdhi_info sdhi0_info = { | |
815f1995 GL |
475 | .dma_slave_tx = SHDMA_SLAVE_SDHI0_TX, |
476 | .dma_slave_rx = SHDMA_SLAVE_SDHI0_RX, | |
477 | .set_pwr = sdhi0_set_pwr, | |
e8a50ae3 | 478 | .tmio_caps = MMC_CAP_SDIO_IRQ | MMC_CAP_POWER_OFF_CARD, |
98779ad8 MD |
479 | }; |
480 | ||
96987d96 KM |
481 | static struct resource sdhi0_resources[] = { |
482 | [0] = { | |
483 | .name = "SDHI0", | |
484 | .start = 0x04ce0000, | |
d80e9221 | 485 | .end = 0x04ce00ff, |
96987d96 KM |
486 | .flags = IORESOURCE_MEM, |
487 | }, | |
488 | [1] = { | |
3844eadc | 489 | .start = 100, |
96987d96 KM |
490 | .flags = IORESOURCE_IRQ, |
491 | }, | |
492 | }; | |
493 | ||
494 | static struct platform_device sdhi0_device = { | |
495 | .name = "sh_mobile_sdhi", | |
496 | .num_resources = ARRAY_SIZE(sdhi0_resources), | |
497 | .resource = sdhi0_resources, | |
498 | .id = 0, | |
98779ad8 MD |
499 | .dev = { |
500 | .platform_data = &sdhi0_info, | |
501 | }, | |
96987d96 KM |
502 | .archdata = { |
503 | .hwblk_id = HWBLK_SDHI0, | |
504 | }, | |
505 | }; | |
506 | ||
1238c684 YG |
507 | #if !defined(CONFIG_MMC_SH_MMCIF) |
508 | /* SDHI1 */ | |
98779ad8 MD |
509 | static void sdhi1_set_pwr(struct platform_device *pdev, int state) |
510 | { | |
511 | gpio_set_value(GPIO_PTB7, state); | |
512 | } | |
513 | ||
514 | static struct sh_mobile_sdhi_info sdhi1_info = { | |
815f1995 GL |
515 | .dma_slave_tx = SHDMA_SLAVE_SDHI1_TX, |
516 | .dma_slave_rx = SHDMA_SLAVE_SDHI1_RX, | |
e8a50ae3 | 517 | .tmio_caps = MMC_CAP_SDIO_IRQ | MMC_CAP_POWER_OFF_CARD, |
815f1995 | 518 | .set_pwr = sdhi1_set_pwr, |
98779ad8 MD |
519 | }; |
520 | ||
96987d96 KM |
521 | static struct resource sdhi1_resources[] = { |
522 | [0] = { | |
523 | .name = "SDHI1", | |
524 | .start = 0x04cf0000, | |
d80e9221 | 525 | .end = 0x04cf00ff, |
96987d96 KM |
526 | .flags = IORESOURCE_MEM, |
527 | }, | |
528 | [1] = { | |
3844eadc | 529 | .start = 23, |
96987d96 KM |
530 | .flags = IORESOURCE_IRQ, |
531 | }, | |
532 | }; | |
533 | ||
534 | static struct platform_device sdhi1_device = { | |
535 | .name = "sh_mobile_sdhi", | |
536 | .num_resources = ARRAY_SIZE(sdhi1_resources), | |
537 | .resource = sdhi1_resources, | |
538 | .id = 1, | |
98779ad8 MD |
539 | .dev = { |
540 | .platform_data = &sdhi1_info, | |
541 | }, | |
96987d96 KM |
542 | .archdata = { |
543 | .hwblk_id = HWBLK_SDHI1, | |
544 | }, | |
545 | }; | |
1238c684 | 546 | #endif /* CONFIG_MMC_SH_MMCIF */ |
96987d96 | 547 | |
1ce4da7a MD |
548 | #else |
549 | ||
9503e891 | 550 | /* MMC SPI */ |
1ce4da7a MD |
551 | static int mmc_spi_get_ro(struct device *dev) |
552 | { | |
553 | return gpio_get_value(GPIO_PTY6); | |
554 | } | |
555 | ||
556 | static int mmc_spi_get_cd(struct device *dev) | |
557 | { | |
558 | return !gpio_get_value(GPIO_PTY7); | |
559 | } | |
560 | ||
561 | static void mmc_spi_setpower(struct device *dev, unsigned int maskval) | |
562 | { | |
563 | gpio_set_value(GPIO_PTB6, maskval ? 1 : 0); | |
564 | } | |
565 | ||
566 | static struct mmc_spi_platform_data mmc_spi_info = { | |
567 | .get_ro = mmc_spi_get_ro, | |
568 | .get_cd = mmc_spi_get_cd, | |
569 | .caps = MMC_CAP_NEEDS_POLL, | |
570 | .ocr_mask = MMC_VDD_32_33 | MMC_VDD_33_34, /* 3.3V only */ | |
571 | .setpower = mmc_spi_setpower, | |
572 | }; | |
573 | ||
574 | static struct spi_board_info spi_bus[] = { | |
575 | { | |
576 | .modalias = "mmc_spi", | |
577 | .platform_data = &mmc_spi_info, | |
578 | .max_speed_hz = 5000000, | |
579 | .mode = SPI_MODE_0, | |
580 | .controller_data = (void *) GPIO_PTM4, | |
581 | }, | |
582 | }; | |
583 | ||
9503e891 | 584 | /* MSIOF0 */ |
1ce4da7a MD |
585 | static struct sh_msiof_spi_info msiof0_data = { |
586 | .num_chipselect = 1, | |
587 | }; | |
588 | ||
589 | static struct resource msiof0_resources[] = { | |
590 | [0] = { | |
591 | .name = "MSIOF0", | |
592 | .start = 0xa4c40000, | |
593 | .end = 0xa4c40063, | |
594 | .flags = IORESOURCE_MEM, | |
595 | }, | |
596 | [1] = { | |
597 | .start = 84, | |
598 | .flags = IORESOURCE_IRQ, | |
599 | }, | |
600 | }; | |
601 | ||
602 | static struct platform_device msiof0_device = { | |
603 | .name = "spi_sh_msiof", | |
604 | .id = 0, /* MSIOF0 */ | |
605 | .dev = { | |
606 | .platform_data = &msiof0_data, | |
607 | }, | |
608 | .num_resources = ARRAY_SIZE(msiof0_resources), | |
609 | .resource = msiof0_resources, | |
610 | .archdata = { | |
611 | .hwblk_id = HWBLK_MSIOF0, | |
612 | }, | |
613 | }; | |
614 | ||
615 | #endif | |
616 | ||
9aa25d64 | 617 | /* I2C Video/Camera */ |
207efd07 KM |
618 | static struct i2c_board_info i2c_camera[] = { |
619 | { | |
620 | I2C_BOARD_INFO("tw9910", 0x45), | |
621 | }, | |
9aa25d64 KM |
622 | { |
623 | /* 1st camera */ | |
624 | I2C_BOARD_INFO("mt9t112", 0x3c), | |
625 | }, | |
626 | { | |
627 | /* 2nd camera */ | |
628 | I2C_BOARD_INFO("mt9t112", 0x3c), | |
629 | }, | |
207efd07 KM |
630 | }; |
631 | ||
632 | /* tw9910 */ | |
633 | static int tw9910_power(struct device *dev, int mode) | |
634 | { | |
635 | int val = mode ? 0 : 1; | |
636 | ||
637 | gpio_set_value(GPIO_PTU2, val); | |
638 | if (mode) | |
639 | mdelay(100); | |
640 | ||
641 | return 0; | |
642 | } | |
643 | ||
644 | static struct tw9910_video_info tw9910_info = { | |
645 | .buswidth = SOCAM_DATAWIDTH_8, | |
646 | .mpout = TW9910_MPO_FIELD, | |
647 | }; | |
648 | ||
649 | static struct soc_camera_link tw9910_link = { | |
650 | .i2c_adapter_id = 0, | |
651 | .bus_id = 1, | |
652 | .power = tw9910_power, | |
653 | .board_info = &i2c_camera[0], | |
207efd07 KM |
654 | .priv = &tw9910_info, |
655 | }; | |
656 | ||
9aa25d64 KM |
657 | /* mt9t112 */ |
658 | static int mt9t112_power1(struct device *dev, int mode) | |
659 | { | |
660 | gpio_set_value(GPIO_PTA3, mode); | |
661 | if (mode) | |
662 | mdelay(100); | |
663 | ||
664 | return 0; | |
665 | } | |
666 | ||
667 | static struct mt9t112_camera_info mt9t112_info1 = { | |
668 | .flags = MT9T112_FLAG_PCLK_RISING_EDGE | MT9T112_FLAG_DATAWIDTH_8, | |
669 | .divider = { 0x49, 0x6, 0, 6, 0, 9, 9, 6, 0 }, /* for 24MHz */ | |
670 | }; | |
671 | ||
672 | static struct soc_camera_link mt9t112_link1 = { | |
673 | .i2c_adapter_id = 0, | |
674 | .power = mt9t112_power1, | |
675 | .bus_id = 0, | |
676 | .board_info = &i2c_camera[1], | |
9aa25d64 KM |
677 | .priv = &mt9t112_info1, |
678 | }; | |
679 | ||
680 | static int mt9t112_power2(struct device *dev, int mode) | |
681 | { | |
682 | gpio_set_value(GPIO_PTA4, mode); | |
683 | if (mode) | |
684 | mdelay(100); | |
685 | ||
686 | return 0; | |
687 | } | |
688 | ||
689 | static struct mt9t112_camera_info mt9t112_info2 = { | |
690 | .flags = MT9T112_FLAG_PCLK_RISING_EDGE | MT9T112_FLAG_DATAWIDTH_8, | |
691 | .divider = { 0x49, 0x6, 0, 6, 0, 9, 9, 6, 0 }, /* for 24MHz */ | |
692 | }; | |
693 | ||
694 | static struct soc_camera_link mt9t112_link2 = { | |
695 | .i2c_adapter_id = 1, | |
696 | .power = mt9t112_power2, | |
697 | .bus_id = 1, | |
698 | .board_info = &i2c_camera[2], | |
9aa25d64 KM |
699 | .priv = &mt9t112_info2, |
700 | }; | |
207efd07 KM |
701 | |
702 | static struct platform_device camera_devices[] = { | |
703 | { | |
704 | .name = "soc-camera-pdrv", | |
705 | .id = 0, | |
706 | .dev = { | |
707 | .platform_data = &tw9910_link, | |
708 | }, | |
709 | }, | |
9aa25d64 KM |
710 | { |
711 | .name = "soc-camera-pdrv", | |
712 | .id = 1, | |
713 | .dev = { | |
714 | .platform_data = &mt9t112_link1, | |
715 | }, | |
716 | }, | |
717 | { | |
718 | .name = "soc-camera-pdrv", | |
719 | .id = 2, | |
720 | .dev = { | |
721 | .platform_data = &mt9t112_link2, | |
722 | }, | |
723 | }, | |
207efd07 KM |
724 | }; |
725 | ||
1980fdc4 | 726 | /* FSI */ |
3ce09334 | 727 | static struct sh_fsi_platform_info fsi_info = { |
f17c13ca | 728 | .portb_flags = SH_FSI_BRS_INV, |
1980fdc4 KM |
729 | }; |
730 | ||
731 | static struct resource fsi_resources[] = { | |
732 | [0] = { | |
733 | .name = "FSI", | |
734 | .start = 0xFE3C0000, | |
735 | .end = 0xFE3C021d, | |
736 | .flags = IORESOURCE_MEM, | |
737 | }, | |
738 | [1] = { | |
739 | .start = 108, | |
740 | .flags = IORESOURCE_IRQ, | |
741 | }, | |
742 | }; | |
743 | ||
744 | static struct platform_device fsi_device = { | |
745 | .name = "sh_fsi", | |
746 | .id = 0, | |
747 | .num_resources = ARRAY_SIZE(fsi_resources), | |
748 | .resource = fsi_resources, | |
749 | .dev = { | |
750 | .platform_data = &fsi_info, | |
751 | }, | |
752 | .archdata = { | |
753 | .hwblk_id = HWBLK_SPU, /* FSI needs SPU hwblk */ | |
754 | }, | |
755 | }; | |
756 | ||
26365716 KM |
757 | /* IrDA */ |
758 | static struct resource irda_resources[] = { | |
759 | [0] = { | |
760 | .name = "IrDA", | |
761 | .start = 0xA45D0000, | |
762 | .end = 0xA45D0049, | |
763 | .flags = IORESOURCE_MEM, | |
764 | }, | |
765 | [1] = { | |
766 | .start = 20, | |
767 | .flags = IORESOURCE_IRQ, | |
768 | }, | |
769 | }; | |
770 | ||
771 | static struct platform_device irda_device = { | |
772 | .name = "sh_sir", | |
773 | .num_resources = ARRAY_SIZE(irda_resources), | |
774 | .resource = irda_resources, | |
775 | }; | |
776 | ||
aee5ab0b GL |
777 | #include <media/ak881x.h> |
778 | #include <media/sh_vou.h> | |
779 | ||
3ce09334 | 780 | static struct ak881x_pdata ak881x_pdata = { |
aee5ab0b GL |
781 | .flags = AK881X_IF_MODE_SLAVE, |
782 | }; | |
783 | ||
784 | static struct i2c_board_info ak8813 = { | |
785 | I2C_BOARD_INFO("ak8813", 0x20), | |
786 | .platform_data = &ak881x_pdata, | |
787 | }; | |
788 | ||
3ce09334 | 789 | static struct sh_vou_pdata sh_vou_pdata = { |
aee5ab0b GL |
790 | .bus_fmt = SH_VOU_BUS_8BIT, |
791 | .flags = SH_VOU_HSYNC_LOW | SH_VOU_VSYNC_LOW, | |
792 | .board_info = &ak8813, | |
793 | .i2c_adap = 0, | |
aee5ab0b GL |
794 | }; |
795 | ||
796 | static struct resource sh_vou_resources[] = { | |
797 | [0] = { | |
798 | .start = 0xfe960000, | |
799 | .end = 0xfe962043, | |
800 | .flags = IORESOURCE_MEM, | |
801 | }, | |
802 | [1] = { | |
803 | .start = 55, | |
804 | .flags = IORESOURCE_IRQ, | |
805 | }, | |
806 | }; | |
807 | ||
808 | static struct platform_device vou_device = { | |
809 | .name = "sh-vou", | |
810 | .id = -1, | |
811 | .num_resources = ARRAY_SIZE(sh_vou_resources), | |
812 | .resource = sh_vou_resources, | |
813 | .dev = { | |
814 | .platform_data = &sh_vou_pdata, | |
815 | }, | |
816 | .archdata = { | |
817 | .hwblk_id = HWBLK_VOU, | |
818 | }, | |
819 | }; | |
820 | ||
1238c684 YG |
821 | #if defined(CONFIG_MMC_SH_MMCIF) |
822 | /* SH_MMCIF */ | |
823 | static void mmcif_set_pwr(struct platform_device *pdev, int state) | |
824 | { | |
825 | gpio_set_value(GPIO_PTB7, state); | |
826 | } | |
827 | ||
828 | static void mmcif_down_pwr(struct platform_device *pdev) | |
829 | { | |
830 | gpio_set_value(GPIO_PTB7, 0); | |
831 | } | |
832 | ||
833 | static struct resource sh_mmcif_resources[] = { | |
834 | [0] = { | |
835 | .name = "SH_MMCIF", | |
836 | .start = 0xA4CA0000, | |
837 | .end = 0xA4CA00FF, | |
838 | .flags = IORESOURCE_MEM, | |
839 | }, | |
840 | [1] = { | |
841 | /* MMC2I */ | |
842 | .start = 29, | |
843 | .flags = IORESOURCE_IRQ, | |
844 | }, | |
845 | [2] = { | |
846 | /* MMC3I */ | |
847 | .start = 30, | |
848 | .flags = IORESOURCE_IRQ, | |
849 | }, | |
850 | }; | |
851 | ||
3ce09334 | 852 | static struct sh_mmcif_plat_data sh_mmcif_plat = { |
1238c684 YG |
853 | .set_pwr = mmcif_set_pwr, |
854 | .down_pwr = mmcif_down_pwr, | |
855 | .sup_pclk = 0, /* SH7724: Max Pclk/2 */ | |
856 | .caps = MMC_CAP_4_BIT_DATA | | |
857 | MMC_CAP_8_BIT_DATA | | |
858 | MMC_CAP_NEEDS_POLL, | |
859 | .ocr = MMC_VDD_32_33 | MMC_VDD_33_34, | |
860 | }; | |
861 | ||
862 | static struct platform_device sh_mmcif_device = { | |
863 | .name = "sh_mmcif", | |
864 | .id = 0, | |
865 | .dev = { | |
866 | .platform_data = &sh_mmcif_plat, | |
867 | }, | |
868 | .num_resources = ARRAY_SIZE(sh_mmcif_resources), | |
869 | .resource = sh_mmcif_resources, | |
870 | }; | |
871 | #endif | |
872 | ||
4138b740 KM |
873 | static struct platform_device *ecovec_devices[] __initdata = { |
874 | &heartbeat_device, | |
875 | &nor_flash_device, | |
35a35408 | 876 | &sh_eth_device, |
907050a3 | 877 | &usb0_host_device, |
3714a9a0 | 878 | &usb1_common_device, |
fa3ba51b | 879 | &lcdc_device, |
2153ad32 KM |
880 | &ceu0_device, |
881 | &ceu1_device, | |
e9103e74 | 882 | &keysc_device, |
4fbc5ece | 883 | #if defined(CONFIG_MMC_TMIO) || defined(CONFIG_MMC_TMIO_MODULE) |
96987d96 | 884 | &sdhi0_device, |
1238c684 | 885 | #if !defined(CONFIG_MMC_SH_MMCIF) |
96987d96 | 886 | &sdhi1_device, |
1238c684 | 887 | #endif |
1ce4da7a MD |
888 | #else |
889 | &msiof0_device, | |
890 | #endif | |
207efd07 | 891 | &camera_devices[0], |
9aa25d64 KM |
892 | &camera_devices[1], |
893 | &camera_devices[2], | |
1980fdc4 | 894 | &fsi_device, |
26365716 | 895 | &irda_device, |
aee5ab0b | 896 | &vou_device, |
1238c684 YG |
897 | #if defined(CONFIG_MMC_SH_MMCIF) |
898 | &sh_mmcif_device, | |
899 | #endif | |
4138b740 KM |
900 | }; |
901 | ||
6b3b5575 | 902 | #ifdef CONFIG_I2C |
4907d57f KM |
903 | #define EEPROM_ADDR 0x50 |
904 | static u8 mac_read(struct i2c_adapter *a, u8 command) | |
905 | { | |
906 | struct i2c_msg msg[2]; | |
907 | u8 buf; | |
908 | int ret; | |
909 | ||
910 | msg[0].addr = EEPROM_ADDR; | |
911 | msg[0].flags = 0; | |
912 | msg[0].len = 1; | |
913 | msg[0].buf = &command; | |
914 | ||
915 | msg[1].addr = EEPROM_ADDR; | |
916 | msg[1].flags = I2C_M_RD; | |
917 | msg[1].len = 1; | |
918 | msg[1].buf = &buf; | |
919 | ||
920 | ret = i2c_transfer(a, msg, 2); | |
921 | if (ret < 0) { | |
922 | printk(KERN_ERR "error %d\n", ret); | |
923 | buf = 0xff; | |
924 | } | |
925 | ||
926 | return buf; | |
927 | } | |
928 | ||
376abbb4 | 929 | static void __init sh_eth_init(struct sh_eth_plat_data *pd) |
4907d57f KM |
930 | { |
931 | struct i2c_adapter *a = i2c_get_adapter(1); | |
4907d57f KM |
932 | int i; |
933 | ||
934 | if (!a) { | |
935 | pr_err("can not get I2C 1\n"); | |
936 | return; | |
937 | } | |
938 | ||
25985edc | 939 | /* read MAC address from EEPROM */ |
376abbb4 MD |
940 | for (i = 0; i < sizeof(pd->mac_addr); i++) { |
941 | pd->mac_addr[i] = mac_read(a, 0x10 + i); | |
4907d57f KM |
942 | msleep(10); |
943 | } | |
b230eb32 KM |
944 | |
945 | i2c_put_adapter(a); | |
4907d57f | 946 | } |
6b3b5575 MD |
947 | #else |
948 | static void __init sh_eth_init(struct sh_eth_plat_data *pd) | |
949 | { | |
950 | pr_err("unable to read sh_eth MAC address\n"); | |
951 | } | |
952 | #endif | |
4907d57f | 953 | |
fa3ba51b | 954 | #define PORT_HIZA 0xA4050158 |
ea15edb2 | 955 | #define IODRIVEA 0xA405018A |
eb0cd9e8 MD |
956 | |
957 | extern char ecovec24_sdram_enter_start; | |
958 | extern char ecovec24_sdram_enter_end; | |
959 | extern char ecovec24_sdram_leave_start; | |
960 | extern char ecovec24_sdram_leave_end; | |
961 | ||
4907d57f | 962 | static int __init arch_setup(void) |
4138b740 | 963 | { |
1980fdc4 KM |
964 | struct clk *clk; |
965 | ||
eb0cd9e8 | 966 | /* register board specific self-refresh code */ |
2839bd61 MD |
967 | sh_mobile_register_self_refresh(SUSP_SH_STANDBY | SUSP_SH_SF | |
968 | SUSP_SH_RSTANDBY, | |
eb0cd9e8 MD |
969 | &ecovec24_sdram_enter_start, |
970 | &ecovec24_sdram_enter_end, | |
971 | &ecovec24_sdram_leave_start, | |
972 | &ecovec24_sdram_leave_end); | |
973 | ||
f78bab30 MD |
974 | /* enable STATUS0, STATUS2 and PDSTATUS */ |
975 | gpio_request(GPIO_FN_STATUS0, NULL); | |
976 | gpio_request(GPIO_FN_STATUS2, NULL); | |
977 | gpio_request(GPIO_FN_PDSTATUS, NULL); | |
978 | ||
4138b740 KM |
979 | /* enable SCIFA0 */ |
980 | gpio_request(GPIO_FN_SCIF0_TXD, NULL); | |
981 | gpio_request(GPIO_FN_SCIF0_RXD, NULL); | |
4138b740 KM |
982 | |
983 | /* enable debug LED */ | |
984 | gpio_request(GPIO_PTG0, NULL); | |
985 | gpio_request(GPIO_PTG1, NULL); | |
986 | gpio_request(GPIO_PTG2, NULL); | |
987 | gpio_request(GPIO_PTG3, NULL); | |
b7056bc1 KM |
988 | gpio_direction_output(GPIO_PTG0, 0); |
989 | gpio_direction_output(GPIO_PTG1, 0); | |
990 | gpio_direction_output(GPIO_PTG2, 0); | |
991 | gpio_direction_output(GPIO_PTG3, 0); | |
9d56dd3b | 992 | __raw_writew((__raw_readw(PORT_HIZA) & ~(0x1 << 1)) , PORT_HIZA); |
4138b740 | 993 | |
35a35408 KM |
994 | /* enable SH-Eth */ |
995 | gpio_request(GPIO_PTA1, NULL); | |
996 | gpio_direction_output(GPIO_PTA1, 1); | |
997 | mdelay(20); | |
998 | ||
999 | gpio_request(GPIO_FN_RMII_RXD0, NULL); | |
1000 | gpio_request(GPIO_FN_RMII_RXD1, NULL); | |
1001 | gpio_request(GPIO_FN_RMII_TXD0, NULL); | |
1002 | gpio_request(GPIO_FN_RMII_TXD1, NULL); | |
1003 | gpio_request(GPIO_FN_RMII_REF_CLK, NULL); | |
1004 | gpio_request(GPIO_FN_RMII_TX_EN, NULL); | |
1005 | gpio_request(GPIO_FN_RMII_RX_ER, NULL); | |
1006 | gpio_request(GPIO_FN_RMII_CRS_DV, NULL); | |
1007 | gpio_request(GPIO_FN_MDIO, NULL); | |
1008 | gpio_request(GPIO_FN_MDC, NULL); | |
1009 | gpio_request(GPIO_FN_LNKSTA, NULL); | |
1010 | ||
907050a3 | 1011 | /* enable USB */ |
9d56dd3b PM |
1012 | __raw_writew(0x0000, 0xA4D80000); |
1013 | __raw_writew(0x0000, 0xA4D90000); | |
907050a3 KM |
1014 | gpio_request(GPIO_PTB3, NULL); |
1015 | gpio_request(GPIO_PTB4, NULL); | |
1016 | gpio_request(GPIO_PTB5, NULL); | |
1017 | gpio_direction_input(GPIO_PTB3); | |
1018 | gpio_direction_output(GPIO_PTB4, 0); | |
1019 | gpio_direction_output(GPIO_PTB5, 0); | |
9d56dd3b PM |
1020 | __raw_writew(0x0600, 0xa40501d4); |
1021 | __raw_writew(0x0600, 0xa4050192); | |
907050a3 | 1022 | |
3714a9a0 KM |
1023 | if (gpio_get_value(GPIO_PTB3)) { |
1024 | printk(KERN_INFO "USB1 function is selected\n"); | |
1025 | usb1_common_device.name = "r8a66597_udc"; | |
1026 | } else { | |
1027 | printk(KERN_INFO "USB1 host is selected\n"); | |
1028 | usb1_common_device.name = "r8a66597_hcd"; | |
1029 | } | |
1030 | ||
fa3ba51b KM |
1031 | /* enable LCDC */ |
1032 | gpio_request(GPIO_FN_LCDD23, NULL); | |
1033 | gpio_request(GPIO_FN_LCDD22, NULL); | |
1034 | gpio_request(GPIO_FN_LCDD21, NULL); | |
1035 | gpio_request(GPIO_FN_LCDD20, NULL); | |
1036 | gpio_request(GPIO_FN_LCDD19, NULL); | |
1037 | gpio_request(GPIO_FN_LCDD18, NULL); | |
1038 | gpio_request(GPIO_FN_LCDD17, NULL); | |
1039 | gpio_request(GPIO_FN_LCDD16, NULL); | |
1040 | gpio_request(GPIO_FN_LCDD15, NULL); | |
1041 | gpio_request(GPIO_FN_LCDD14, NULL); | |
1042 | gpio_request(GPIO_FN_LCDD13, NULL); | |
1043 | gpio_request(GPIO_FN_LCDD12, NULL); | |
1044 | gpio_request(GPIO_FN_LCDD11, NULL); | |
1045 | gpio_request(GPIO_FN_LCDD10, NULL); | |
1046 | gpio_request(GPIO_FN_LCDD9, NULL); | |
1047 | gpio_request(GPIO_FN_LCDD8, NULL); | |
1048 | gpio_request(GPIO_FN_LCDD7, NULL); | |
1049 | gpio_request(GPIO_FN_LCDD6, NULL); | |
1050 | gpio_request(GPIO_FN_LCDD5, NULL); | |
1051 | gpio_request(GPIO_FN_LCDD4, NULL); | |
1052 | gpio_request(GPIO_FN_LCDD3, NULL); | |
1053 | gpio_request(GPIO_FN_LCDD2, NULL); | |
1054 | gpio_request(GPIO_FN_LCDD1, NULL); | |
1055 | gpio_request(GPIO_FN_LCDD0, NULL); | |
1056 | gpio_request(GPIO_FN_LCDDISP, NULL); | |
1057 | gpio_request(GPIO_FN_LCDHSYN, NULL); | |
1058 | gpio_request(GPIO_FN_LCDDCK, NULL); | |
1059 | gpio_request(GPIO_FN_LCDVSYN, NULL); | |
1060 | gpio_request(GPIO_FN_LCDDON, NULL); | |
1061 | gpio_request(GPIO_FN_LCDLCLK, NULL); | |
9d56dd3b | 1062 | __raw_writew((__raw_readw(PORT_HIZA) & ~0x0001), PORT_HIZA); |
fa3ba51b KM |
1063 | |
1064 | gpio_request(GPIO_PTE6, NULL); | |
1065 | gpio_request(GPIO_PTU1, NULL); | |
1066 | gpio_request(GPIO_PTR1, NULL); | |
1067 | gpio_request(GPIO_PTA2, NULL); | |
1068 | gpio_direction_input(GPIO_PTE6); | |
1069 | gpio_direction_output(GPIO_PTU1, 0); | |
1070 | gpio_direction_output(GPIO_PTR1, 0); | |
1071 | gpio_direction_output(GPIO_PTA2, 0); | |
1072 | ||
82b33221 | 1073 | /* I/O buffer drive ability is high */ |
9d56dd3b | 1074 | __raw_writew((__raw_readw(IODRIVEA) & ~0x00c0) | 0x0080 , IODRIVEA); |
ea15edb2 | 1075 | |
fa3ba51b KM |
1076 | if (gpio_get_value(GPIO_PTE6)) { |
1077 | /* DVI */ | |
1078 | lcdc_info.clock_source = LCDC_CLK_EXTERNAL; | |
44432407 GL |
1079 | lcdc_info.ch[0].clock_divider = 1; |
1080 | lcdc_info.ch[0].lcd_cfg = ecovec_dvi_modes; | |
1081 | lcdc_info.ch[0].num_cfg = ARRAY_SIZE(ecovec_dvi_modes); | |
fa3ba51b KM |
1082 | |
1083 | gpio_set_value(GPIO_PTA2, 1); | |
1084 | gpio_set_value(GPIO_PTU1, 1); | |
1085 | } else { | |
1086 | /* Panel */ | |
ea15edb2 | 1087 | lcdc_info.clock_source = LCDC_CLK_PERIPHERAL; |
44432407 GL |
1088 | lcdc_info.ch[0].clock_divider = 2; |
1089 | lcdc_info.ch[0].lcd_cfg = ecovec_lcd_modes; | |
1090 | lcdc_info.ch[0].num_cfg = ARRAY_SIZE(ecovec_lcd_modes); | |
ea15edb2 KM |
1091 | |
1092 | gpio_set_value(GPIO_PTR1, 1); | |
1093 | ||
1094 | /* FIXME | |
1095 | * | |
1096 | * LCDDON control is needed for Panel, | |
1097 | * but current sh_mobile_lcdc driver doesn't control it. | |
1098 | * It is temporary correspondence | |
1099 | */ | |
1100 | gpio_request(GPIO_PTF4, NULL); | |
1101 | gpio_direction_output(GPIO_PTF4, 1); | |
8810e055 KM |
1102 | |
1103 | /* enable TouchScreen */ | |
1104 | i2c_register_board_info(0, &ts_i2c_clients, 1); | |
fcb8918f | 1105 | irq_set_irq_type(IRQ0, IRQ_TYPE_LEVEL_LOW); |
fa3ba51b KM |
1106 | } |
1107 | ||
2153ad32 KM |
1108 | /* enable CEU0 */ |
1109 | gpio_request(GPIO_FN_VIO0_D15, NULL); | |
1110 | gpio_request(GPIO_FN_VIO0_D14, NULL); | |
1111 | gpio_request(GPIO_FN_VIO0_D13, NULL); | |
1112 | gpio_request(GPIO_FN_VIO0_D12, NULL); | |
1113 | gpio_request(GPIO_FN_VIO0_D11, NULL); | |
1114 | gpio_request(GPIO_FN_VIO0_D10, NULL); | |
1115 | gpio_request(GPIO_FN_VIO0_D9, NULL); | |
1116 | gpio_request(GPIO_FN_VIO0_D8, NULL); | |
1117 | gpio_request(GPIO_FN_VIO0_D7, NULL); | |
1118 | gpio_request(GPIO_FN_VIO0_D6, NULL); | |
1119 | gpio_request(GPIO_FN_VIO0_D5, NULL); | |
1120 | gpio_request(GPIO_FN_VIO0_D4, NULL); | |
1121 | gpio_request(GPIO_FN_VIO0_D3, NULL); | |
1122 | gpio_request(GPIO_FN_VIO0_D2, NULL); | |
1123 | gpio_request(GPIO_FN_VIO0_D1, NULL); | |
1124 | gpio_request(GPIO_FN_VIO0_D0, NULL); | |
1125 | gpio_request(GPIO_FN_VIO0_VD, NULL); | |
1126 | gpio_request(GPIO_FN_VIO0_CLK, NULL); | |
1127 | gpio_request(GPIO_FN_VIO0_FLD, NULL); | |
1128 | gpio_request(GPIO_FN_VIO0_HD, NULL); | |
1129 | platform_resource_setup_memory(&ceu0_device, "ceu0", 4 << 20); | |
1130 | ||
1131 | /* enable CEU1 */ | |
1132 | gpio_request(GPIO_FN_VIO1_D7, NULL); | |
1133 | gpio_request(GPIO_FN_VIO1_D6, NULL); | |
1134 | gpio_request(GPIO_FN_VIO1_D5, NULL); | |
1135 | gpio_request(GPIO_FN_VIO1_D4, NULL); | |
1136 | gpio_request(GPIO_FN_VIO1_D3, NULL); | |
1137 | gpio_request(GPIO_FN_VIO1_D2, NULL); | |
1138 | gpio_request(GPIO_FN_VIO1_D1, NULL); | |
1139 | gpio_request(GPIO_FN_VIO1_D0, NULL); | |
1140 | gpio_request(GPIO_FN_VIO1_FLD, NULL); | |
1141 | gpio_request(GPIO_FN_VIO1_HD, NULL); | |
1142 | gpio_request(GPIO_FN_VIO1_VD, NULL); | |
1143 | gpio_request(GPIO_FN_VIO1_CLK, NULL); | |
1144 | platform_resource_setup_memory(&ceu1_device, "ceu1", 4 << 20); | |
1145 | ||
e9103e74 KM |
1146 | /* enable KEYSC */ |
1147 | gpio_request(GPIO_FN_KEYOUT5_IN5, NULL); | |
1148 | gpio_request(GPIO_FN_KEYOUT4_IN6, NULL); | |
1149 | gpio_request(GPIO_FN_KEYOUT3, NULL); | |
1150 | gpio_request(GPIO_FN_KEYOUT2, NULL); | |
1151 | gpio_request(GPIO_FN_KEYOUT1, NULL); | |
1152 | gpio_request(GPIO_FN_KEYOUT0, NULL); | |
1153 | gpio_request(GPIO_FN_KEYIN0, NULL); | |
1154 | ||
064a16dc KM |
1155 | /* enable user debug switch */ |
1156 | gpio_request(GPIO_PTR0, NULL); | |
1157 | gpio_request(GPIO_PTR4, NULL); | |
1158 | gpio_request(GPIO_PTR5, NULL); | |
1159 | gpio_request(GPIO_PTR6, NULL); | |
1160 | gpio_direction_input(GPIO_PTR0); | |
1161 | gpio_direction_input(GPIO_PTR4); | |
1162 | gpio_direction_input(GPIO_PTR5); | |
1163 | gpio_direction_input(GPIO_PTR6); | |
1164 | ||
4fbc5ece | 1165 | #if defined(CONFIG_MMC_TMIO) || defined(CONFIG_MMC_TMIO_MODULE) |
1ce4da7a | 1166 | /* enable SDHI0 on CN11 (needs DS2.4 set to ON) */ |
96987d96 KM |
1167 | gpio_request(GPIO_FN_SDHI0CD, NULL); |
1168 | gpio_request(GPIO_FN_SDHI0WP, NULL); | |
1169 | gpio_request(GPIO_FN_SDHI0CMD, NULL); | |
1170 | gpio_request(GPIO_FN_SDHI0CLK, NULL); | |
1171 | gpio_request(GPIO_FN_SDHI0D3, NULL); | |
1172 | gpio_request(GPIO_FN_SDHI0D2, NULL); | |
1173 | gpio_request(GPIO_FN_SDHI0D1, NULL); | |
1174 | gpio_request(GPIO_FN_SDHI0D0, NULL); | |
98779ad8 MD |
1175 | gpio_request(GPIO_PTB6, NULL); |
1176 | gpio_direction_output(GPIO_PTB6, 0); | |
96987d96 | 1177 | |
1238c684 | 1178 | #if !defined(CONFIG_MMC_SH_MMCIF) |
1ce4da7a | 1179 | /* enable SDHI1 on CN12 (needs DS2.6,7 set to ON,OFF) */ |
96987d96 KM |
1180 | gpio_request(GPIO_FN_SDHI1CD, NULL); |
1181 | gpio_request(GPIO_FN_SDHI1WP, NULL); | |
1182 | gpio_request(GPIO_FN_SDHI1CMD, NULL); | |
1183 | gpio_request(GPIO_FN_SDHI1CLK, NULL); | |
1184 | gpio_request(GPIO_FN_SDHI1D3, NULL); | |
1185 | gpio_request(GPIO_FN_SDHI1D2, NULL); | |
1186 | gpio_request(GPIO_FN_SDHI1D1, NULL); | |
1187 | gpio_request(GPIO_FN_SDHI1D0, NULL); | |
96987d96 | 1188 | gpio_request(GPIO_PTB7, NULL); |
98779ad8 | 1189 | gpio_direction_output(GPIO_PTB7, 0); |
96987d96 KM |
1190 | |
1191 | /* I/O buffer drive ability is high for SDHI1 */ | |
9d56dd3b | 1192 | __raw_writew((__raw_readw(IODRIVEA) & ~0x3000) | 0x2000 , IODRIVEA); |
1238c684 | 1193 | #endif /* CONFIG_MMC_SH_MMCIF */ |
1ce4da7a MD |
1194 | #else |
1195 | /* enable MSIOF0 on CN11 (needs DS2.4 set to OFF) */ | |
1196 | gpio_request(GPIO_FN_MSIOF0_TXD, NULL); | |
1197 | gpio_request(GPIO_FN_MSIOF0_RXD, NULL); | |
1198 | gpio_request(GPIO_FN_MSIOF0_TSCK, NULL); | |
1199 | gpio_request(GPIO_PTM4, NULL); /* software CS control of TSYNC pin */ | |
1200 | gpio_direction_output(GPIO_PTM4, 1); /* active low CS */ | |
1201 | gpio_request(GPIO_PTB6, NULL); /* 3.3V power control */ | |
1202 | gpio_direction_output(GPIO_PTB6, 0); /* disable power by default */ | |
1203 | gpio_request(GPIO_PTY6, NULL); /* write protect */ | |
1204 | gpio_direction_input(GPIO_PTY6); | |
1205 | gpio_request(GPIO_PTY7, NULL); /* card detect */ | |
1206 | gpio_direction_input(GPIO_PTY7); | |
1207 | ||
1208 | spi_register_board_info(spi_bus, ARRAY_SIZE(spi_bus)); | |
1209 | #endif | |
96987d96 | 1210 | |
207efd07 KM |
1211 | /* enable Video */ |
1212 | gpio_request(GPIO_PTU2, NULL); | |
1213 | gpio_direction_output(GPIO_PTU2, 1); | |
1214 | ||
9aa25d64 KM |
1215 | /* enable Camera */ |
1216 | gpio_request(GPIO_PTA3, NULL); | |
1217 | gpio_request(GPIO_PTA4, NULL); | |
1218 | gpio_direction_output(GPIO_PTA3, 0); | |
1219 | gpio_direction_output(GPIO_PTA4, 0); | |
1220 | ||
1980fdc4 KM |
1221 | /* enable FSI */ |
1222 | gpio_request(GPIO_FN_FSIMCKB, NULL); | |
1223 | gpio_request(GPIO_FN_FSIIBSD, NULL); | |
1224 | gpio_request(GPIO_FN_FSIOBSD, NULL); | |
1225 | gpio_request(GPIO_FN_FSIIBBCK, NULL); | |
1226 | gpio_request(GPIO_FN_FSIIBLRCK, NULL); | |
1227 | gpio_request(GPIO_FN_FSIOBBCK, NULL); | |
1228 | gpio_request(GPIO_FN_FSIOBLRCK, NULL); | |
1229 | gpio_request(GPIO_FN_CLKAUDIOBO, NULL); | |
1230 | ||
16afc9fb KM |
1231 | /* set SPU2 clock to 83.4 MHz */ |
1232 | clk = clk_get(NULL, "spu_clk"); | |
56ea5109 | 1233 | if (!IS_ERR(clk)) { |
10305853 KM |
1234 | clk_set_rate(clk, clk_round_rate(clk, 83333333)); |
1235 | clk_put(clk); | |
1236 | } | |
16afc9fb | 1237 | |
1980fdc4 KM |
1238 | /* change parent of FSI B */ |
1239 | clk = clk_get(NULL, "fsib_clk"); | |
56ea5109 | 1240 | if (!IS_ERR(clk)) { |
4bd5d259 KM |
1241 | /* 48kHz dummy clock was used to make sure 1/1 divide */ |
1242 | clk_set_rate(&sh7724_fsimckb_clk, 48000); | |
1243 | clk_set_parent(clk, &sh7724_fsimckb_clk); | |
1244 | clk_set_rate(clk, 48000); | |
10305853 KM |
1245 | clk_put(clk); |
1246 | } | |
1980fdc4 KM |
1247 | |
1248 | gpio_request(GPIO_PTU0, NULL); | |
1249 | gpio_direction_output(GPIO_PTU0, 0); | |
1250 | mdelay(20); | |
1251 | ||
ea440783 NH |
1252 | /* enable motion sensor */ |
1253 | gpio_request(GPIO_FN_INTC_IRQ1, NULL); | |
1254 | gpio_direction_input(GPIO_FN_INTC_IRQ1); | |
1255 | ||
6f26d19f MD |
1256 | /* set VPU clock to 166 MHz */ |
1257 | clk = clk_get(NULL, "vpu_clk"); | |
56ea5109 | 1258 | if (!IS_ERR(clk)) { |
10305853 KM |
1259 | clk_set_rate(clk, clk_round_rate(clk, 166000000)); |
1260 | clk_put(clk); | |
1261 | } | |
6f26d19f | 1262 | |
26365716 KM |
1263 | /* enable IrDA */ |
1264 | gpio_request(GPIO_FN_IRDA_OUT, NULL); | |
1265 | gpio_request(GPIO_FN_IRDA_IN, NULL); | |
1266 | gpio_request(GPIO_PTU5, NULL); | |
1267 | gpio_direction_output(GPIO_PTU5, 0); | |
1268 | ||
1238c684 YG |
1269 | #if defined(CONFIG_MMC_SH_MMCIF) |
1270 | /* enable MMCIF (needs DS2.6,7 set to OFF,ON) */ | |
1271 | gpio_request(GPIO_FN_MMC_D7, NULL); | |
1272 | gpio_request(GPIO_FN_MMC_D6, NULL); | |
1273 | gpio_request(GPIO_FN_MMC_D5, NULL); | |
1274 | gpio_request(GPIO_FN_MMC_D4, NULL); | |
1275 | gpio_request(GPIO_FN_MMC_D3, NULL); | |
1276 | gpio_request(GPIO_FN_MMC_D2, NULL); | |
1277 | gpio_request(GPIO_FN_MMC_D1, NULL); | |
1278 | gpio_request(GPIO_FN_MMC_D0, NULL); | |
1279 | gpio_request(GPIO_FN_MMC_CLK, NULL); | |
1280 | gpio_request(GPIO_FN_MMC_CMD, NULL); | |
1281 | gpio_request(GPIO_PTB7, NULL); | |
1282 | gpio_direction_output(GPIO_PTB7, 0); | |
1283 | ||
1284 | /* I/O buffer drive ability is high for MMCIF */ | |
1285 | __raw_writew((__raw_readw(IODRIVEA) & ~0x3000) | 0x2000 , IODRIVEA); | |
1286 | #endif | |
1287 | ||
125ecce6 | 1288 | /* enable I2C device */ |
1980fdc4 KM |
1289 | i2c_register_board_info(0, i2c0_devices, |
1290 | ARRAY_SIZE(i2c0_devices)); | |
1291 | ||
125ecce6 KM |
1292 | i2c_register_board_info(1, i2c1_devices, |
1293 | ARRAY_SIZE(i2c1_devices)); | |
1294 | ||
92359a70 | 1295 | #if defined(CONFIG_VIDEO_SH_VOU) || defined(CONFIG_VIDEO_SH_VOU_MODULE) |
aee5ab0b GL |
1296 | /* VOU */ |
1297 | gpio_request(GPIO_FN_DV_D15, NULL); | |
1298 | gpio_request(GPIO_FN_DV_D14, NULL); | |
1299 | gpio_request(GPIO_FN_DV_D13, NULL); | |
1300 | gpio_request(GPIO_FN_DV_D12, NULL); | |
1301 | gpio_request(GPIO_FN_DV_D11, NULL); | |
1302 | gpio_request(GPIO_FN_DV_D10, NULL); | |
1303 | gpio_request(GPIO_FN_DV_D9, NULL); | |
1304 | gpio_request(GPIO_FN_DV_D8, NULL); | |
1305 | gpio_request(GPIO_FN_DV_CLKI, NULL); | |
1306 | gpio_request(GPIO_FN_DV_CLK, NULL); | |
1307 | gpio_request(GPIO_FN_DV_VSYNC, NULL); | |
1308 | gpio_request(GPIO_FN_DV_HSYNC, NULL); | |
1309 | ||
1310 | /* AK8813 power / reset sequence */ | |
1311 | gpio_request(GPIO_PTG4, NULL); | |
1312 | gpio_request(GPIO_PTU3, NULL); | |
1313 | /* Reset */ | |
1314 | gpio_direction_output(GPIO_PTG4, 0); | |
1315 | /* Power down */ | |
1316 | gpio_direction_output(GPIO_PTU3, 1); | |
1317 | ||
1318 | udelay(10); | |
1319 | ||
1320 | /* Power up, reset */ | |
1321 | gpio_set_value(GPIO_PTU3, 0); | |
1322 | ||
1323 | udelay(10); | |
1324 | ||
1325 | /* Remove reset */ | |
1326 | gpio_set_value(GPIO_PTG4, 1); | |
92359a70 | 1327 | #endif |
aee5ab0b | 1328 | |
4138b740 KM |
1329 | return platform_add_devices(ecovec_devices, |
1330 | ARRAY_SIZE(ecovec_devices)); | |
1331 | } | |
4907d57f KM |
1332 | arch_initcall(arch_setup); |
1333 | ||
1334 | static int __init devices_setup(void) | |
1335 | { | |
376abbb4 | 1336 | sh_eth_init(&sh_eth_plat); |
4907d57f KM |
1337 | return 0; |
1338 | } | |
1339 | device_initcall(devices_setup); | |
1340 | ||
4138b740 KM |
1341 | static struct sh_machine_vector mv_ecovec __initmv = { |
1342 | .mv_name = "R0P7724 (EcoVec)", | |
1343 | }; |