projects / thirdparty / linux.git / blame
| Commit | Line | Data |
|---|---|---|
| b2441318 | 1 | // SPDX-License-Identifier: GPL-2.0 |
| 1da177e4 LT |
2 | /* |
| 3 | * linux/arch/sh/boards/se/770x/irq.c | |
| 4 | * | |
| 5 | * Copyright (C) 2000 Kazumoto Kojima | |
| aa4a5db5 | 6 | * Copyright (C) 2006 Nobuhiro Iwamatsu |
| 1da177e4 LT |
7 | * |
| 8 | * Hitachi SolutionEngine Support. | |
| 9 | * | |
| 10 | */ | |
| 11 | ||
| 1da177e4 | 12 | #include <linux/init.h> |
| aa4a5db5 | 13 | #include <linux/interrupt.h> |
| 1da177e4 LT |
14 | #include <linux/irq.h> |
| 15 | #include <asm/irq.h> | |
| 16 | #include <asm/io.h> | |
| 939a24a6 | 17 | #include <mach-se/mach/se.h> |
| 1da177e4 | 18 | |
| 68abdbbb | 19 | static struct ipr_data ipr_irq_table[] = { |
| 9465a54f NI |
20 | /* |
| 21 | * Super I/O (Just mimic PC): | |
| 22 | * 1: keyboard | |
| 23 | * 3: serial 0 | |
| 24 | * 4: serial 1 | |
| 25 | * 5: printer | |
| 26 | * 6: floppy | |
| 27 | * 8: rtc | |
| 28 | * 12: mouse | |
| 29 | * 14: ide0 | |
| 2a8ff459 | 30 | */ |
| bd71ab88 JL |
31 | #if defined(CONFIG_CPU_SUBTYPE_SH7705) |
| 32 | /* This is default value */ | |
| 68abdbbb MD |
33 | { 13, 0, 8, 0x0f-13, }, |
| 34 | { 5 , 0, 4, 0x0f- 5, }, | |
| 35 | { 10, 1, 0, 0x0f-10, }, | |
| 36 | { 7 , 2, 4, 0x0f- 7, }, | |
| 37 | { 3 , 2, 0, 0x0f- 3, }, | |
| 38 | { 1 , 3, 12, 0x0f- 1, }, | |
| 39 | { 12, 3, 4, 0x0f-12, }, /* LAN */ | |
| 40 | { 2 , 4, 8, 0x0f- 2, }, /* PCIRQ2 */ | |
| 41 | { 6 , 4, 4, 0x0f- 6, }, /* PCIRQ1 */ | |
| 42 | { 14, 4, 0, 0x0f-14, }, /* PCIRQ0 */ | |
| 43 | { 0 , 5, 12, 0x0f , }, | |
| 44 | { 4 , 5, 4, 0x0f- 4, }, | |
| 45 | { 8 , 6, 12, 0x0f- 8, }, | |
| 46 | { 9 , 6, 8, 0x0f- 9, }, | |
| 47 | { 11, 6, 4, 0x0f-11, }, | |
| bd71ab88 | 48 | #else |
| 68abdbbb MD |
49 | { 14, 0, 8, 0x0f-14, }, |
| 50 | { 12, 0, 4, 0x0f-12, }, | |
| 51 | { 8, 1, 4, 0x0f- 8, }, | |
| 52 | { 6, 2, 12, 0x0f- 6, }, | |
| 53 | { 5, 2, 8, 0x0f- 5, }, | |
| 54 | { 4, 2, 4, 0x0f- 4, }, | |
| 55 | { 3, 2, 0, 0x0f- 3, }, | |
| 56 | { 1, 3, 12, 0x0f- 1, }, | |
| 9465a54f | 57 | #if defined(CONFIG_STNIC) |
| aa4a5db5 | 58 | /* ST NIC */ |
| 68abdbbb | 59 | { 10, 3, 4, 0x0f-10, }, /* LAN */ |
| 9465a54f | 60 | #endif |
| aa4a5db5 | 61 | /* MRSHPC IRQs setting */ |
| 68abdbbb MD |
62 | { 0, 4, 12, 0x0f- 0, }, /* PCIRQ3 */ |
| 63 | { 11, 4, 8, 0x0f-11, }, /* PCIRQ2 */ | |
| 64 | { 9, 4, 4, 0x0f- 9, }, /* PCIRQ1 */ | |
| 65 | { 7, 4, 0, 0x0f- 7, }, /* PCIRQ0 */ | |
| bd71ab88 JL |
66 | /* #2, #13 are allocated for SLOT IRQ #1 and #2 (for now) */ |
| 67 | /* NOTE: #2 and #13 are not used on PC */ | |
| 68abdbbb MD |
68 | { 13, 6, 4, 0x0f-13, }, /* SLOTIRQ2 */ |
| 69 | { 2, 6, 0, 0x0f- 2, }, /* SLOTIRQ1 */ | |
| bd71ab88 JL |
70 | #endif |
| 71 | }; | |
| 72 | ||
| 68abdbbb MD |
73 | static unsigned long ipr_offsets[] = { |
| 74 | BCR_ILCRA, | |
| 75 | BCR_ILCRB, | |
| 76 | BCR_ILCRC, | |
| 77 | BCR_ILCRD, | |
| 78 | BCR_ILCRE, | |
| 79 | BCR_ILCRF, | |
| 80 | BCR_ILCRG, | |
| 81 | }; | |
| 82 | ||
| 83 | static struct ipr_desc ipr_irq_desc = { | |
| 84 | .ipr_offsets = ipr_offsets, | |
| 85 | .nr_offsets = ARRAY_SIZE(ipr_offsets), | |
| 86 | ||
| 87 | .ipr_data = ipr_irq_table, | |
| 88 | .nr_irqs = ARRAY_SIZE(ipr_irq_table), | |
| 89 | .chip = { | |
| 90 | .name = "IPR-se770x", | |
| 91 | }, | |
| 92 | }; | |
| 93 | ||
| 1da177e4 LT |
94 | /* |
| 95 | * Initialize IRQ setting | |
| 96 | */ | |
| 97 | void __init init_se_IRQ(void) | |
| 98 | { | |
| 1da177e4 | 99 | /* Disable all interrupts */ |
| 9d56dd3b PM |
100 | __raw_writew(0, BCR_ILCRA); |
| 101 | __raw_writew(0, BCR_ILCRB); | |
| 102 | __raw_writew(0, BCR_ILCRC); | |
| 103 | __raw_writew(0, BCR_ILCRD); | |
| 104 | __raw_writew(0, BCR_ILCRE); | |
| 105 | __raw_writew(0, BCR_ILCRF); | |
| 106 | __raw_writew(0, BCR_ILCRG); | |
| 9465a54f | 107 | |
| 68abdbbb | 108 | register_ipr_controller(&ipr_irq_desc); |
| 1da177e4 | 109 | } |