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[thirdparty/kernel/linux.git] / arch / sh / boards / mach-se / 770x / setup.c
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b2441318 1// SPDX-License-Identifier: GPL-2.0
aa4a5db5 2/*
1da177e4
LT
3 * linux/arch/sh/boards/se/770x/setup.c
4 *
5 * Copyright (C) 2000 Kazumoto Kojima
6 *
7 * Hitachi SolutionEngine Support.
8 *
9 */
1da177e4 10#include <linux/init.h>
3b4d9539 11#include <linux/platform_device.h>
939a24a6 12#include <mach-se/mach/se.h>
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13#include <mach-se/mach/mrshpc.h>
14#include <asm/machvec.h>
711fa809 15#include <asm/io.h>
0c91c1a7 16#include <asm/smc37c93x.h>
8786c952 17#include <asm/heartbeat.h>
2c7834a6 18
1da177e4
LT
19/*
20 * Configure the Super I/O chip
21 */
22static void __init smsc_config(int index, int data)
23{
24 outb_p(index, INDEX_PORT);
25 outb_p(data, DATA_PORT);
26}
27
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28/* XXX: Another candidate for a more generic cchip machine vector */
29static void __init smsc_setup(char **cmdline_p)
1da177e4
LT
30{
31 outb_p(CONFIG_ENTER, CONFIG_PORT);
32 outb_p(CONFIG_ENTER, CONFIG_PORT);
33
34 /* FDC */
35 smsc_config(CURRENT_LDN_INDEX, LDN_FDC);
36 smsc_config(ACTIVATE_INDEX, 0x01);
37 smsc_config(IRQ_SELECT_INDEX, 6); /* IRQ6 */
38
1da177e4
LT
39 /* AUXIO (GPIO): to use IDE1 */
40 smsc_config(CURRENT_LDN_INDEX, LDN_AUXIO);
41 smsc_config(GPIO46_INDEX, 0x00); /* nIOROP */
42 smsc_config(GPIO47_INDEX, 0x00); /* nIOWOP */
43
44 /* COM1 */
45 smsc_config(CURRENT_LDN_INDEX, LDN_COM1);
46 smsc_config(ACTIVATE_INDEX, 0x01);
47 smsc_config(IO_BASE_HI_INDEX, 0x03);
48 smsc_config(IO_BASE_LO_INDEX, 0xf8);
49 smsc_config(IRQ_SELECT_INDEX, 4); /* IRQ4 */
50
51 /* COM2 */
52 smsc_config(CURRENT_LDN_INDEX, LDN_COM2);
53 smsc_config(ACTIVATE_INDEX, 0x01);
54 smsc_config(IO_BASE_HI_INDEX, 0x02);
55 smsc_config(IO_BASE_LO_INDEX, 0xf8);
56 smsc_config(IRQ_SELECT_INDEX, 3); /* IRQ3 */
57
58 /* RTC */
59 smsc_config(CURRENT_LDN_INDEX, LDN_RTC);
60 smsc_config(ACTIVATE_INDEX, 0x01);
61 smsc_config(IRQ_SELECT_INDEX, 8); /* IRQ8 */
62
63 /* XXX: PARPORT, KBD, and MOUSE will come here... */
64 outb_p(CONFIG_EXIT, CONFIG_PORT);
65}
66
f987fc88
NI
67
68static struct resource cf_ide_resources[] = {
69 [0] = {
70 .start = PA_MRSHPC_IO + 0x1f0,
71 .end = PA_MRSHPC_IO + 0x1f0 + 8,
72 .flags = IORESOURCE_MEM,
73 },
74 [1] = {
75 .start = PA_MRSHPC_IO + 0x1f0 + 0x206,
787d9d7e 76 .end = PA_MRSHPC_IO + 0x1f0 + 8 + 0x206 + 8,
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77 .flags = IORESOURCE_MEM,
78 },
79 [2] = {
2a8ff459 80 .start = IRQ_CFCARD,
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81 .flags = IORESOURCE_IRQ,
82 },
83};
84
85static struct platform_device cf_ide_device = {
86 .name = "pata_platform",
87 .id = -1,
88 .num_resources = ARRAY_SIZE(cf_ide_resources),
89 .resource = cf_ide_resources,
90};
91
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92static unsigned char heartbeat_bit_pos[] = { 8, 9, 10, 11, 12, 13, 14, 15 };
93
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94static struct heartbeat_data heartbeat_data = {
95 .bit_pos = heartbeat_bit_pos,
96 .nr_bits = ARRAY_SIZE(heartbeat_bit_pos),
97};
98
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99static struct resource heartbeat_resource = {
100 .start = PA_LED,
101 .end = PA_LED,
102 .flags = IORESOURCE_MEM | IORESOURCE_MEM_16BIT,
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103};
104
105static struct platform_device heartbeat_device = {
106 .name = "heartbeat",
107 .id = -1,
108 .dev = {
a1fd306b 109 .platform_data = &heartbeat_data,
3b4d9539 110 },
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111 .num_resources = 1,
112 .resource = &heartbeat_resource,
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113};
114
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115#if defined(CONFIG_CPU_SUBTYPE_SH7710) ||\
116 defined(CONFIG_CPU_SUBTYPE_SH7712)
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117/* SH771X Ethernet driver */
118static struct resource sh_eth0_resources[] = {
119 [0] = {
120 .start = SH_ETH0_BASE,
121 .end = SH_ETH0_BASE + 0x1B8,
122 .flags = IORESOURCE_MEM,
123 },
124 [1] = {
125 .start = SH_ETH0_IRQ,
126 .end = SH_ETH0_IRQ,
127 .flags = IORESOURCE_IRQ,
128 },
129};
130
131static struct platform_device sh_eth0_device = {
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SS
132 .name = "sh771x-ether",
133 .id = 0,
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134 .dev = {
135 .platform_data = PHY_ID,
136 },
137 .num_resources = ARRAY_SIZE(sh_eth0_resources),
138 .resource = sh_eth0_resources,
139};
140
141static struct resource sh_eth1_resources[] = {
142 [0] = {
143 .start = SH_ETH1_BASE,
144 .end = SH_ETH1_BASE + 0x1B8,
145 .flags = IORESOURCE_MEM,
146 },
147 [1] = {
148 .start = SH_ETH1_IRQ,
149 .end = SH_ETH1_IRQ,
150 .flags = IORESOURCE_IRQ,
151 },
152};
153
154static struct platform_device sh_eth1_device = {
7bbe150d
SS
155 .name = "sh771x-ether",
156 .id = 1,
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157 .dev = {
158 .platform_data = PHY_ID,
159 },
160 .num_resources = ARRAY_SIZE(sh_eth1_resources),
161 .resource = sh_eth1_resources,
162};
4864841a 163#endif
ffb91ad2 164
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165static struct platform_device *se_devices[] __initdata = {
166 &heartbeat_device,
f987fc88 167 &cf_ide_device,
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168#if defined(CONFIG_CPU_SUBTYPE_SH7710) ||\
169 defined(CONFIG_CPU_SUBTYPE_SH7712)
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170 &sh_eth0_device,
171 &sh_eth1_device,
4864841a 172#endif
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173};
174
175static int __init se_devices_setup(void)
176{
073da9c0 177 mrshpc_setup_windows();
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178 return platform_add_devices(se_devices, ARRAY_SIZE(se_devices));
179}
9465a54f 180device_initcall(se_devices_setup);
3b4d9539 181
1da177e4 182/*
2c7834a6 183 * The Machine Vector
1da177e4 184 */
82f81f47 185static struct sh_machine_vector mv_se __initmv = {
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186 .mv_name = "SolutionEngine",
187 .mv_setup = smsc_setup,
2c7834a6 188 .mv_init_irq = init_se_IRQ,
2c7834a6 189};