]> git.ipfire.org Git - people/ms/u-boot.git/blame - arch/sh/cpu/u-boot.lds
Merge git://git.denx.de/u-boot-mmc
[people/ms/u-boot.git] / arch / sh / cpu / u-boot.lds
CommitLineData
3313e0e2 1/*
8371dabb
VZ
2 * Copyright (C) 2016 Vladimir Zapolskiy <vz@mleia.com>
3 * Copyright (C) 2008-2009 Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com>
4 * Copyright (C) 2008 Mark Jonas <mark.jonas@de.bosch.com>
5 * Copyright (C) 2007 Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
1aeed8d7 6 *
1a459660 7 * SPDX-License-Identifier: GPL-2.0+
3313e0e2
MJ
8 */
9
3f8b5391
VZ
10#include "config.h"
11
90340c87
TP
12#ifdef CONFIG_SYS_BIG_ENDIAN
13OUTPUT_FORMAT("elf32-shbig-linux", "elf32-shbig-linux", "elf32-sh-linux")
14#else
3313e0e2 15OUTPUT_FORMAT("elf32-sh-linux", "elf32-sh-linux", "elf32-sh-linux")
90340c87
TP
16#endif
17
3313e0e2 18OUTPUT_ARCH(sh)
8371dabb
VZ
19
20MEMORY
21{
22 ram : ORIGIN = CONFIG_SYS_SDRAM_BASE, LENGTH = CONFIG_SYS_SDRAM_SIZE
23}
24
3313e0e2
MJ
25ENTRY(_start)
26
27SECTIONS
28{
b26d2507 29 reloc_dst = .;
3313e0e2
MJ
30
31 PROVIDE (_ftext = .);
32 PROVIDE (_fcode = .);
33 PROVIDE (_start = .);
34
35 .text :
36 {
afc3929f 37 KEEP(*/start.o (.text))
9ec4a67e 38 KEEP(CONFIG_BOARDDIR/lowlevel_init.o (.text .spiboot1.text))
3f8b5391 39 KEEP(*(.spiboot2.text))
3313e0e2 40 . = ALIGN(8192);
34f98a3d
TR
41#ifdef CONFIG_ENV_IS_IN_FLASH
42 env/embedded.o (.doesnotexist)
43 . = ALIGN(8192);
44#endif
3313e0e2
MJ
45 *(.text)
46 . = ALIGN(4);
8371dabb 47 } >ram =0xFF
3313e0e2
MJ
48 PROVIDE (_ecode = .);
49 .rodata :
50 {
f62fb999 51 *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*)))
3313e0e2 52 . = ALIGN(4);
8371dabb 53 } >ram
3313e0e2
MJ
54 PROVIDE (_etext = .);
55
56
57 PROVIDE (_fdata = .);
58 .data :
59 {
60 *(.data)
61 . = ALIGN(4);
8371dabb 62 } >ram
3313e0e2
MJ
63 PROVIDE (_edata = .);
64
65 PROVIDE (_fgot = .);
66 .got :
67 {
76a55989 68 *(.got.plt) *(.got)
3313e0e2 69 . = ALIGN(4);
8371dabb 70 } >ram
3313e0e2
MJ
71 PROVIDE (_egot = .);
72
55675142 73 .u_boot_list : {
ef123c52 74 KEEP(*(SORT(.u_boot_list*)));
8371dabb 75 } >ram
55675142 76
f41e6088 77 PROVIDE (__init_end = .);
3313e0e2 78 PROVIDE (reloc_dst_end = .);
3313e0e2
MJ
79
80 PROVIDE (bss_start = .);
81 PROVIDE (__bss_start = .);
82 .bss :
83 {
84 *(.bss)
85 . = ALIGN(4);
8371dabb 86 } >ram
3313e0e2 87 PROVIDE (bss_end = .);
3929fb0a 88 PROVIDE (__bss_end = .);
3313e0e2 89}