[thirdparty/kernel/linux.git] / arch / sh / kernel / cpu / proc.c

// SPDX-License-Identifier: GPL-2.0
#include <linux/seq_file.h>
#include <linux/kernel.h>
#include <linux/module.h>
#include <asm/machvec.h>
#include <asm/processor.h>

static const char *cpu_name[] = {
	[CPU_SH7201]	= "SH7201",
	[CPU_SH7203]	= "SH7203",	[CPU_SH7263]	= "SH7263",
	[CPU_SH7264]	= "SH7264",	[CPU_SH7269]	= "SH7269",
	[CPU_SH7206]	= "SH7206",	[CPU_SH7619]	= "SH7619",
	[CPU_SH7705]	= "SH7705",	[CPU_SH7706]	= "SH7706",
	[CPU_SH7707]	= "SH7707",	[CPU_SH7708]	= "SH7708",
	[CPU_SH7709]	= "SH7709",	[CPU_SH7710]	= "SH7710",
	[CPU_SH7712]	= "SH7712",	[CPU_SH7720]	= "SH7720",
	[CPU_SH7721]	= "SH7721",	[CPU_SH7729]	= "SH7729",
	[CPU_SH7750]	= "SH7750",	[CPU_SH7750S]	= "SH7750S",
	[CPU_SH7750R]	= "SH7750R",	[CPU_SH7751]	= "SH7751",
	[CPU_SH7751R]	= "SH7751R",	[CPU_SH7760]	= "SH7760",
	[CPU_SH4_202]	= "SH4-202",	[CPU_SH4_501]	= "SH4-501",
	[CPU_SH7763]	= "SH7763",	[CPU_SH7770]	= "SH7770",
	[CPU_SH7780]	= "SH7780",	[CPU_SH7781]	= "SH7781",
	[CPU_SH7343]	= "SH7343",	[CPU_SH7785]	= "SH7785",
	[CPU_SH7786]	= "SH7786",	[CPU_SH7757]	= "SH7757",
	[CPU_SH7722]	= "SH7722",	[CPU_SHX3]	= "SH-X3",
	[CPU_SH5_101]	= "SH5-101",	[CPU_SH5_103]	= "SH5-103",
	[CPU_MXG]	= "MX-G",	[CPU_SH7723]	= "SH7723",
	[CPU_SH7366]	= "SH7366",	[CPU_SH7724]	= "SH7724",
	[CPU_SH7372]	= "SH7372",	[CPU_SH7734]	= "SH7734",
	[CPU_J2]	= "J2",
	[CPU_SH_NONE]	= "Unknown"
};

const char *get_cpu_subtype(struct sh_cpuinfo *c)
{
	return cpu_name[c->type];
}
EXPORT_SYMBOL(get_cpu_subtype);

#ifdef CONFIG_PROC_FS
/* Symbolic CPU flags, keep in sync with asm/cpu-features.h */
static const char *cpu_flags[] = {
	"none", "fpu", "p2flush", "mmuassoc", "dsp", "perfctr",
	"ptea", "llsc", "l2", "op32", "pteaex", NULL
};

static void show_cpuflags(struct seq_file *m, struct sh_cpuinfo *c)
{
	unsigned long i;

	seq_printf(m, "cpu flags\t:");

	if (!c->flags) {
		seq_printf(m, " %s\n", cpu_flags[0]);
		return;
	}

	for (i = 0; cpu_flags[i]; i++)
		if ((c->flags & (1 << i)))
			seq_printf(m, " %s", cpu_flags[i+1]);

	seq_printf(m, "\n");
}

static void show_cacheinfo(struct seq_file *m, const char *type,
			   struct cache_info info)
{
	unsigned int cache_size;

	cache_size = info.ways * info.sets * info.linesz;

	seq_printf(m, "%s size\t: %2dKiB (%d-way)\n",
		   type, cache_size >> 10, info.ways);
}

/*
 *	Get CPU information for use by the procfs.
 */
static int show_cpuinfo(struct seq_file *m, void *v)
{
	struct sh_cpuinfo *c = v;
	unsigned int cpu = c - cpu_data;

	if (!cpu_online(cpu))
		return 0;

	if (cpu == 0)
		seq_printf(m, "machine\t\t: %s\n", get_system_type());
	else
		seq_printf(m, "\n");

	seq_printf(m, "processor\t: %d\n", cpu);
	seq_printf(m, "cpu family\t: %s\n", init_utsname()->machine);
	seq_printf(m, "cpu type\t: %s\n", get_cpu_subtype(c));
	if (c->cut_major == -1)
		seq_printf(m, "cut\t\t: unknown\n");
	else if (c->cut_minor == -1)
		seq_printf(m, "cut\t\t: %d.x\n", c->cut_major);
	else
		seq_printf(m, "cut\t\t: %d.%d\n", c->cut_major, c->cut_minor);

	show_cpuflags(m, c);

	seq_printf(m, "cache type\t: ");

	/*
	 * Check for what type of cache we have, we support both the
	 * unified cache on the SH-2 and SH-3, as well as the harvard
	 * style cache on the SH-4.
	 */
	if (c->icache.flags & SH_CACHE_COMBINED) {
		seq_printf(m, "unified\n");
		show_cacheinfo(m, "cache", c->icache);
	} else {
		seq_printf(m, "split (harvard)\n");
		show_cacheinfo(m, "icache", c->icache);
		show_cacheinfo(m, "dcache", c->dcache);
	}

	/* Optional secondary cache */
	if (c->flags & CPU_HAS_L2_CACHE)
		show_cacheinfo(m, "scache", c->scache);

	seq_printf(m, "address sizes\t: %u bits physical\n", c->phys_bits);

	seq_printf(m, "bogomips\t: %lu.%02lu\n",
		     c->loops_per_jiffy/(500000/HZ),
		     (c->loops_per_jiffy/(5000/HZ)) % 100);

	return 0;
}

static void *c_start(struct seq_file *m, loff_t *pos)
{
	return *pos < NR_CPUS ? cpu_data + *pos : NULL;
}
static void *c_next(struct seq_file *m, void *v, loff_t *pos)
{
	++*pos;
	return c_start(m, pos);
}
static void c_stop(struct seq_file *m, void *v)
{
}
const struct seq_operations cpuinfo_op = {
	.start	= c_start,
	.next	= c_next,
	.stop	= c_stop,
	.show	= show_cpuinfo,
};
#endif /* CONFIG_PROC_FS */
Commit	Line	Data
b2441318	1	// SPDX-License-Identifier: GPL-2.0
a9b27bcc PM	2	#include <linux/seq_file.h>
	3	#include <linux/kernel.h>
	4	#include <linux/module.h>
	5	#include <asm/machvec.h>
	6	#include <asm/processor.h>
	7
	8	static const char *cpu_name[] = {
	9	[CPU_SH7201] = "SH7201",
	10	[CPU_SH7203] = "SH7203", [CPU_SH7263] = "SH7263",
0b25b7c8	11	[CPU_SH7264] = "SH7264", [CPU_SH7269] = "SH7269",
a9b27bcc PM	12	[CPU_SH7206] = "SH7206", [CPU_SH7619] = "SH7619",
	13	[CPU_SH7705] = "SH7705", [CPU_SH7706] = "SH7706",
	14	[CPU_SH7707] = "SH7707", [CPU_SH7708] = "SH7708",
	15	[CPU_SH7709] = "SH7709", [CPU_SH7710] = "SH7710",
	16	[CPU_SH7712] = "SH7712", [CPU_SH7720] = "SH7720",
	17	[CPU_SH7721] = "SH7721", [CPU_SH7729] = "SH7729",
	18	[CPU_SH7750] = "SH7750", [CPU_SH7750S] = "SH7750S",
	19	[CPU_SH7750R] = "SH7750R", [CPU_SH7751] = "SH7751",
	20	[CPU_SH7751R] = "SH7751R", [CPU_SH7760] = "SH7760",
	21	[CPU_SH4_202] = "SH4-202", [CPU_SH4_501] = "SH4-501",
	22	[CPU_SH7763] = "SH7763", [CPU_SH7770] = "SH7770",
	23	[CPU_SH7780] = "SH7780", [CPU_SH7781] = "SH7781",
	24	[CPU_SH7343] = "SH7343", [CPU_SH7785] = "SH7785",
	25	[CPU_SH7786] = "SH7786", [CPU_SH7757] = "SH7757",
	26	[CPU_SH7722] = "SH7722", [CPU_SHX3] = "SH-X3",
	27	[CPU_SH5_101] = "SH5-101", [CPU_SH5_103] = "SH5-103",
	28	[CPU_MXG] = "MX-G", [CPU_SH7723] = "SH7723",
	29	[CPU_SH7366] = "SH7366", [CPU_SH7724] = "SH7724",
fea88a0c	30	[CPU_SH7372] = "SH7372", [CPU_SH7734] = "SH7734",
5a846aba	31	[CPU_J2] = "J2",
fea88a0c	32	[CPU_SH_NONE] = "Unknown"
a9b27bcc PM	33	};
	34
	35	const char get_cpu_subtype(struct sh_cpuinfo c)
	36	{
	37	return cpu_name[c->type];
	38	}
	39	EXPORT_SYMBOL(get_cpu_subtype);
	40
	41	#ifdef CONFIG_PROC_FS
	42	/* Symbolic CPU flags, keep in sync with asm/cpu-features.h */
	43	static const char *cpu_flags[] = {
	44	"none", "fpu", "p2flush", "mmuassoc", "dsp", "perfctr",
	45	"ptea", "llsc", "l2", "op32", "pteaex", NULL
	46	};
	47
	48	static void show_cpuflags(struct seq_file m, struct sh_cpuinfo c)
	49	{
	50	unsigned long i;
	51
	52	seq_printf(m, "cpu flags\t:");
	53
	54	if (!c->flags) {
	55	seq_printf(m, " %s\n", cpu_flags[0]);
	56	return;
	57	}
	58
	59	for (i = 0; cpu_flags[i]; i++)
	60	if ((c->flags & (1 << i)))
	61	seq_printf(m, " %s", cpu_flags[i+1]);
	62
	63	seq_printf(m, "\n");
	64	}
	65
	66	static void show_cacheinfo(struct seq_file m, const char type,
	67	struct cache_info info)
	68	{
	69	unsigned int cache_size;
	70
	71	cache_size = info.ways * info.sets * info.linesz;
	72
	73	seq_printf(m, "%s size\t: %2dKiB (%d-way)\n",
	74	type, cache_size >> 10, info.ways);
	75	}
	76
	77	/*
	78	* Get CPU information for use by the procfs.
	79	*/
	80	static int show_cpuinfo(struct seq_file m, void v)
	81	{
	82	struct sh_cpuinfo *c = v;
	83	unsigned int cpu = c - cpu_data;
	84
	85	if (!cpu_online(cpu))
	86	return 0;
	87
	88	if (cpu == 0)
	89	seq_printf(m, "machine\t\t: %s\n", get_system_type());
	90	else
	91	seq_printf(m, "\n");
	92
	93	seq_printf(m, "processor\t: %d\n", cpu);
	94	seq_printf(m, "cpu family\t: %s\n", init_utsname()->machine);
	95	seq_printf(m, "cpu type\t: %s\n", get_cpu_subtype(c));
	96	if (c->cut_major == -1)
97	seq_printf(m, "cut\t\t: unknown\n");
98	else if (c->cut_minor == -1)
99	seq_printf(m, "cut\t\t: %d.x\n", c->cut_major);
100	else
101	seq_printf(m, "cut\t\t: %d.%d\n", c->cut_major, c->cut_minor);
102
103	show_cpuflags(m, c);
104
105	seq_printf(m, "cache type\t: ");
106
107	/*
108	* Check for what type of cache we have, we support both the
109	* unified cache on the SH-2 and SH-3, as well as the harvard
110	* style cache on the SH-4.
111	*/
112	if (c->icache.flags & SH_CACHE_COMBINED) {
113	seq_printf(m, "unified\n");
114	show_cacheinfo(m, "cache", c->icache);
115	} else {
116	seq_printf(m, "split (harvard)\n");
117	show_cacheinfo(m, "icache", c->icache);
118	show_cacheinfo(m, "dcache", c->dcache);
119	}
120
121	/* Optional secondary cache */
122	if (c->flags & CPU_HAS_L2_CACHE)
123	show_cacheinfo(m, "scache", c->scache);
124
125	seq_printf(m, "address sizes\t: %u bits physical\n", c->phys_bits);
126
127	seq_printf(m, "bogomips\t: %lu.%02lu\n",
128	c->loops_per_jiffy/(500000/HZ),
129	(c->loops_per_jiffy/(5000/HZ)) % 100);
130
131	return 0;
132	}
133
134	static void c_start(struct seq_file m, loff_t *pos)
135	{
136	return pos < NR_CPUS ? cpu_data + pos : NULL;
137	}
138	static void c_next(struct seq_file m, void v, loff_t pos)
139	{
140	++*pos;
141	return c_start(m, pos);
142	}
143	static void c_stop(struct seq_file m, void v)
144	{
145	}
146	const struct seq_operations cpuinfo_op = {
147	.start = c_start,
148	.next = c_next,
149	.stop = c_stop,
150	.show = show_cpuinfo,
151	};
152	#endif /* CONFIG_PROC_FS */