[thirdparty/kernel/linux.git] / arch / sparc / include / asm / leon_amba.h

/* SPDX-License-Identifier: GPL-2.0 */
/*
*Copyright (C) 2004 Konrad Eisele (eiselekd@web.de,konrad@gaisler.com), Gaisler Research
*Copyright (C) 2004 Stefan Holst (mail@s-holst.de), Uni-Stuttgart
*Copyright (C) 2009 Daniel Hellstrom (daniel@gaisler.com),Konrad Eisele (konrad@gaisler.com) Aeroflex Gaisler AB
*/

#ifndef LEON_AMBA_H_INCLUDE
#define LEON_AMBA_H_INCLUDE

#ifndef __ASSEMBLY__

struct amba_prom_registers {
	unsigned int phys_addr;	/* The physical address of this register */
	unsigned int reg_size;	/* How many bytes does this register take up? */
};

#endif

/*
 *  The following defines the bits in the LEON UART Status Registers.
 */

#define LEON_REG_UART_STATUS_DR   0x00000001	/* Data Ready */
#define LEON_REG_UART_STATUS_TSE  0x00000002	/* TX Send Register Empty */
#define LEON_REG_UART_STATUS_THE  0x00000004	/* TX Hold Register Empty */
#define LEON_REG_UART_STATUS_BR   0x00000008	/* Break Error */
#define LEON_REG_UART_STATUS_OE   0x00000010	/* RX Overrun Error */
#define LEON_REG_UART_STATUS_PE   0x00000020	/* RX Parity Error */
#define LEON_REG_UART_STATUS_FE   0x00000040	/* RX Framing Error */
#define LEON_REG_UART_STATUS_ERR  0x00000078	/* Error Mask */

/*
 *  The following defines the bits in the LEON UART Ctrl Registers.
 */

#define LEON_REG_UART_CTRL_RE     0x00000001	/* Receiver enable */
#define LEON_REG_UART_CTRL_TE     0x00000002	/* Transmitter enable */
#define LEON_REG_UART_CTRL_RI     0x00000004	/* Receiver interrupt enable */
#define LEON_REG_UART_CTRL_TI     0x00000008	/* Transmitter irq */
#define LEON_REG_UART_CTRL_PS     0x00000010	/* Parity select */
#define LEON_REG_UART_CTRL_PE     0x00000020	/* Parity enable */
#define LEON_REG_UART_CTRL_FL     0x00000040	/* Flow control enable */
#define LEON_REG_UART_CTRL_LB     0x00000080	/* Loop Back enable */

#define LEON3_GPTIMER_EN 1
#define LEON3_GPTIMER_RL 2
#define LEON3_GPTIMER_LD 4
#define LEON3_GPTIMER_IRQEN 8
#define LEON3_GPTIMER_SEPIRQ 8
#define LEON3_GPTIMER_TIMERS 0x7

#define LEON23_REG_TIMER_CONTROL_EN    0x00000001 /* 1 = enable counting */
/* 0 = hold scalar and counter */
#define LEON23_REG_TIMER_CONTROL_RL    0x00000002 /* 1 = reload at 0 */
						  /* 0 = stop at 0 */
#define LEON23_REG_TIMER_CONTROL_LD    0x00000004 /* 1 = load counter */
						  /* 0 = no function */
#define LEON23_REG_TIMER_CONTROL_IQ    0x00000008 /* 1 = irq enable */
						  /* 0 = no function */

/*
 *  The following defines the bits in the LEON PS/2 Status Registers.
 */

#define LEON_REG_PS2_STATUS_DR   0x00000001	/* Data Ready */
#define LEON_REG_PS2_STATUS_PE   0x00000002	/* Parity error */
#define LEON_REG_PS2_STATUS_FE   0x00000004	/* Framing error */
#define LEON_REG_PS2_STATUS_KI   0x00000008	/* Keyboard inhibit */
#define LEON_REG_PS2_STATUS_RF   0x00000010	/* RX buffer full */
#define LEON_REG_PS2_STATUS_TF   0x00000020	/* TX buffer full */

/*
 *  The following defines the bits in the LEON PS/2 Ctrl Registers.
 */

#define LEON_REG_PS2_CTRL_RE 0x00000001	/* Receiver enable */
#define LEON_REG_PS2_CTRL_TE 0x00000002	/* Transmitter enable */
#define LEON_REG_PS2_CTRL_RI 0x00000004	/* Keyboard receive irq  */
#define LEON_REG_PS2_CTRL_TI 0x00000008	/* Keyboard transmit irq */

#define LEON3_IRQMPSTATUS_CPUNR     28
#define LEON3_IRQMPSTATUS_BROADCAST 27

#define GPTIMER_CONFIG_IRQNT(a)          (((a) >> 3) & 0x1f)
#define GPTIMER_CONFIG_ISSEP(a)          ((a) & (1 << 8))
#define GPTIMER_CONFIG_NTIMERS(a)        ((a) & (0x7))
#define LEON3_GPTIMER_CTRL_PENDING       0x10
#define LEON3_GPTIMER_CONFIG_NRTIMERS(c) ((c)->config & 0x7)
#define LEON3_GPTIMER_CTRL_ISPENDING(r)  (((r)&LEON3_GPTIMER_CTRL_PENDING) ? 1 : 0)

#ifndef __ASSEMBLY__

struct leon3_irqctrl_regs_map {
	u32 ilevel;
	u32 ipend;
	u32 iforce;
	u32 iclear;
	u32 mpstatus;
	u32 mpbroadcast;
	u32 notused02;
	u32 notused03;
	u32 ampctrl;
	u32 icsel[2];
	u32 notused13;
	u32 notused20;
	u32 notused21;
	u32 notused22;
	u32 notused23;
	u32 mask[16];
	u32 force[16];
	/* Extended IRQ registers */
	u32 intid[16];	/* 0xc0 */
	u32 unused[(0x1000-0x100)/4];
};

struct leon3_apbuart_regs_map {
	u32 data;
	u32 status;
	u32 ctrl;
	u32 scaler;
};

struct leon3_gptimerelem_regs_map {
	u32 val;
	u32 rld;
	u32 ctrl;
	u32 unused;
};

struct leon3_gptimer_regs_map {
	u32 scalar;
	u32 scalar_reload;
	u32 config;
	u32 unused;
	struct leon3_gptimerelem_regs_map e[8];
};

/*
 *  Types and structure used for AMBA Plug & Play bus scanning
 */

#define AMBA_MAXAPB_DEVS 64
#define AMBA_MAXAPB_DEVS_PERBUS 16

struct amba_device_table {
	int devnr;		   /* number of devices on AHB or APB bus */
	unsigned int *addr[16];    /* addresses to the devices configuration tables */
	unsigned int allocbits[1]; /* 0=unallocated, 1=allocated driver */
};

struct amba_apbslv_device_table {
	int devnr;		                  /* number of devices on AHB or APB bus */
	unsigned int *addr[AMBA_MAXAPB_DEVS];     /* addresses to the devices configuration tables */
	unsigned int apbmst[AMBA_MAXAPB_DEVS];    /* apb master if a entry is a apb slave */
	unsigned int apbmstidx[AMBA_MAXAPB_DEVS]; /* apb master idx if a entry is a apb slave */
	unsigned int allocbits[4];                /* 0=unallocated, 1=allocated driver */
};

struct amba_confarea_type {
	struct amba_confarea_type *next;/* next bus in chain */
	struct amba_device_table ahbmst;
	struct amba_device_table ahbslv;
	struct amba_apbslv_device_table apbslv;
	unsigned int apbmst;
};

/* collect apb slaves */
struct amba_apb_device {
	unsigned int start, irq, bus_id;
	struct amba_confarea_type *bus;
};

/* collect ahb slaves */
struct amba_ahb_device {
	unsigned int start[4], irq, bus_id;
	struct amba_confarea_type *bus;
};

struct device_node;
void _amba_init(struct device_node *dp, struct device_node ***nextp);

extern unsigned long amba_system_id;
extern struct leon3_irqctrl_regs_map *leon3_irqctrl_regs;
extern struct leon3_gptimer_regs_map *leon3_gptimer_regs;
extern struct amba_apb_device leon_percpu_timer_dev[16];
extern int leondebug_irq_disable;
extern int leon_debug_irqout;
extern unsigned long leon3_gptimer_irq;
extern unsigned int sparc_leon_eirq;

#endif /* __ASSEMBLY__ */

#define LEON3_IO_AREA 0xfff00000
#define LEON3_CONF_AREA 0xff000
#define LEON3_AHB_SLAVE_CONF_AREA (1 << 11)

#define LEON3_AHB_CONF_WORDS 8
#define LEON3_APB_CONF_WORDS 2
#define LEON3_AHB_MASTERS 16
#define LEON3_AHB_SLAVES 16
#define LEON3_APB_SLAVES 16
#define LEON3_APBUARTS 8

/* Vendor codes */
#define VENDOR_GAISLER   1
#define VENDOR_PENDER    2
#define VENDOR_ESA       4
#define VENDOR_OPENCORES 8

/* Gaisler Research device id's */
#define GAISLER_LEON3    0x003
#define GAISLER_LEON3DSU 0x004
#define GAISLER_ETHAHB   0x005
#define GAISLER_APBMST   0x006
#define GAISLER_AHBUART  0x007
#define GAISLER_SRCTRL   0x008
#define GAISLER_SDCTRL   0x009
#define GAISLER_APBUART  0x00C
#define GAISLER_IRQMP    0x00D
#define GAISLER_AHBRAM   0x00E
#define GAISLER_GPTIMER  0x011
#define GAISLER_PCITRG   0x012
#define GAISLER_PCISBRG  0x013
#define GAISLER_PCIFBRG  0x014
#define GAISLER_PCITRACE 0x015
#define GAISLER_PCIDMA   0x016
#define GAISLER_AHBTRACE 0x017
#define GAISLER_ETHDSU   0x018
#define GAISLER_PIOPORT  0x01A
#define GAISLER_GRGPIO   0x01A
#define GAISLER_AHBJTAG  0x01c
#define GAISLER_ETHMAC   0x01D
#define GAISLER_AHB2AHB  0x020
#define GAISLER_USBDC    0x021
#define GAISLER_ATACTRL  0x024
#define GAISLER_DDRSPA   0x025
#define GAISLER_USBEHC   0x026
#define GAISLER_USBUHC   0x027
#define GAISLER_I2CMST   0x028
#define GAISLER_SPICTRL  0x02D
#define GAISLER_DDR2SPA  0x02E
#define GAISLER_SPIMCTRL 0x045
#define GAISLER_LEON4    0x048
#define GAISLER_LEON4DSU 0x049
#define GAISLER_AHBSTAT  0x052
#define GAISLER_FTMCTRL  0x054
#define GAISLER_KBD      0x060
#define GAISLER_VGA      0x061
#define GAISLER_SVGA     0x063
#define GAISLER_GRSYSMON 0x066
#define GAISLER_GRACECTRL 0x067

#define GAISLER_L2TIME   0xffd	/* internal device: leon2 timer */
#define GAISLER_L2C      0xffe	/* internal device: leon2compat */
#define GAISLER_PLUGPLAY 0xfff	/* internal device: plug & play configarea */

/* Chip IDs */
#define AEROFLEX_UT699    0x0699
#define LEON4_NEXTREME1   0x0102
#define GAISLER_GR712RC   0x0712

#define amba_vendor(x) (((x) >> 24) & 0xff)

#define amba_device(x) (((x) >> 12) & 0xfff)

#endif
Commit	Line	Data
b2441318	1	/* SPDX-License-Identifier: GPL-2.0 */
5213a780 KE	2	/*
	3	*Copyright (C) 2004 Konrad Eisele (eiselekd@web.de,konrad@gaisler.com), Gaisler Research
	4	*Copyright (C) 2004 Stefan Holst (mail@s-holst.de), Uni-Stuttgart
	5	*Copyright (C) 2009 Daniel Hellstrom (daniel@gaisler.com),Konrad Eisele (konrad@gaisler.com) Aeroflex Gaisler AB
	6	*/
	7
	8	#ifndef LEON_AMBA_H_INCLUDE
	9	#define LEON_AMBA_H_INCLUDE
	10
	11	#ifndef __ASSEMBLY__
	12
	13	struct amba_prom_registers {
	14	unsigned int phys_addr; /* The physical address of this register */
	15	unsigned int reg_size; /* How many bytes does this register take up? */
	16	};
	17
	18	#endif
	19
	20	/*
	21	* The following defines the bits in the LEON UART Status Registers.
	22	*/
	23
	24	#define LEON_REG_UART_STATUS_DR 0x00000001 /* Data Ready */
	25	#define LEON_REG_UART_STATUS_TSE 0x00000002 /* TX Send Register Empty */
	26	#define LEON_REG_UART_STATUS_THE 0x00000004 /* TX Hold Register Empty */
	27	#define LEON_REG_UART_STATUS_BR 0x00000008 /* Break Error */
	28	#define LEON_REG_UART_STATUS_OE 0x00000010 /* RX Overrun Error */
	29	#define LEON_REG_UART_STATUS_PE 0x00000020 /* RX Parity Error */
	30	#define LEON_REG_UART_STATUS_FE 0x00000040 /* RX Framing Error */
	31	#define LEON_REG_UART_STATUS_ERR 0x00000078 /* Error Mask */
	32
	33	/*
	34	* The following defines the bits in the LEON UART Ctrl Registers.
	35	*/
	36
	37	#define LEON_REG_UART_CTRL_RE 0x00000001 /* Receiver enable */
	38	#define LEON_REG_UART_CTRL_TE 0x00000002 /* Transmitter enable */
	39	#define LEON_REG_UART_CTRL_RI 0x00000004 /* Receiver interrupt enable */
	40	#define LEON_REG_UART_CTRL_TI 0x00000008 /* Transmitter irq */
	41	#define LEON_REG_UART_CTRL_PS 0x00000010 /* Parity select */
	42	#define LEON_REG_UART_CTRL_PE 0x00000020 /* Parity enable */
	43	#define LEON_REG_UART_CTRL_FL 0x00000040 /* Flow control enable */
	44	#define LEON_REG_UART_CTRL_LB 0x00000080 /* Loop Back enable */
	45
	46	#define LEON3_GPTIMER_EN 1
	47	#define LEON3_GPTIMER_RL 2
	48	#define LEON3_GPTIMER_LD 4
	49	#define LEON3_GPTIMER_IRQEN 8
	50	#define LEON3_GPTIMER_SEPIRQ 8
1ffbc51a	51	#define LEON3_GPTIMER_TIMERS 0x7
5213a780 KE	52
	53	#define LEON23_REG_TIMER_CONTROL_EN 0x00000001 /* 1 = enable counting */
	54	/* 0 = hold scalar and counter */
	55	#define LEON23_REG_TIMER_CONTROL_RL 0x00000002 /* 1 = reload at 0 */
	56	/* 0 = stop at 0 */
	57	#define LEON23_REG_TIMER_CONTROL_LD 0x00000004 /* 1 = load counter */
	58	/* 0 = no function */
	59	#define LEON23_REG_TIMER_CONTROL_IQ 0x00000008 /* 1 = irq enable */
	60	/* 0 = no function */
	61
	62	/*
	63	* The following defines the bits in the LEON PS/2 Status Registers.
	64	*/
	65
	66	#define LEON_REG_PS2_STATUS_DR 0x00000001 /* Data Ready */
	67	#define LEON_REG_PS2_STATUS_PE 0x00000002 /* Parity error */
	68	#define LEON_REG_PS2_STATUS_FE 0x00000004 /* Framing error */
	69	#define LEON_REG_PS2_STATUS_KI 0x00000008 /* Keyboard inhibit */
	70	#define LEON_REG_PS2_STATUS_RF 0x00000010 /* RX buffer full */
	71	#define LEON_REG_PS2_STATUS_TF 0x00000020 /* TX buffer full */
	72
	73	/*
	74	* The following defines the bits in the LEON PS/2 Ctrl Registers.
	75	*/
	76
	77	#define LEON_REG_PS2_CTRL_RE 0x00000001 /* Receiver enable */
	78	#define LEON_REG_PS2_CTRL_TE 0x00000002 /* Transmitter enable */
	79	#define LEON_REG_PS2_CTRL_RI 0x00000004 /* Keyboard receive irq */
	80	#define LEON_REG_PS2_CTRL_TI 0x00000008 /* Keyboard transmit irq */
	81
	82	#define LEON3_IRQMPSTATUS_CPUNR 28
	83	#define LEON3_IRQMPSTATUS_BROADCAST 27
	84
	85	#define GPTIMER_CONFIG_IRQNT(a) (((a) >> 3) & 0x1f)
	86	#define GPTIMER_CONFIG_ISSEP(a) ((a) & (1 << 8))
	87	#define GPTIMER_CONFIG_NTIMERS(a) ((a) & (0x7))
	88	#define LEON3_GPTIMER_CTRL_PENDING 0x10
	89	#define LEON3_GPTIMER_CONFIG_NRTIMERS(c) ((c)->config & 0x7)
	90	#define LEON3_GPTIMER_CTRL_ISPENDING(r) (((r)&LEON3_GPTIMER_CTRL_PENDING) ? 1 : 0)
	91
5213a780 KE	92	#ifndef __ASSEMBLY__
	93
	94	struct leon3_irqctrl_regs_map {
	95	u32 ilevel;
	96	u32 ipend;
	97	u32 iforce;
	98	u32 iclear;
	99	u32 mpstatus;
	100	u32 mpbroadcast;
	101	u32 notused02;
	102	u32 notused03;
e2305e37 DH	103	u32 ampctrl;
e2305e37 DH	104	u32 icsel[2];
5213a780 KE	105	u32 notused13;
	106	u32 notused20;
	107	u32 notused21;
	108	u32 notused22;
	109	u32 notused23;
	110	u32 mask[16];
	111	u32 force[16];
	112	/* Extended IRQ registers */
	113	u32 intid[16]; /* 0xc0 */
e2305e37	114	u32 unused[(0x1000-0x100)/4];
5213a780 KE	115	};
	116
	117	struct leon3_apbuart_regs_map {
	118	u32 data;
	119	u32 status;
	120	u32 ctrl;
	121	u32 scaler;
	122	};
	123
	124	struct leon3_gptimerelem_regs_map {
	125	u32 val;
	126	u32 rld;
	127	u32 ctrl;
	128	u32 unused;
	129	};
	130
	131	struct leon3_gptimer_regs_map {
	132	u32 scalar;
	133	u32 scalar_reload;
	134	u32 config;
	135	u32 unused;
	136	struct leon3_gptimerelem_regs_map e[8];
	137	};
	138
	139	/*
	140	* Types and structure used for AMBA Plug & Play bus scanning
	141	*/
	142
	143	#define AMBA_MAXAPB_DEVS 64
	144	#define AMBA_MAXAPB_DEVS_PERBUS 16
	145
	146	struct amba_device_table {
	147	int devnr; /* number of devices on AHB or APB bus */
	148	unsigned int addr[16]; / addresses to the devices configuration tables */
	149	unsigned int allocbits[1]; /* 0=unallocated, 1=allocated driver */
	150	};
	151
	152	struct amba_apbslv_device_table {
	153	int devnr; /* number of devices on AHB or APB bus */
	154	unsigned int addr[AMBA_MAXAPB_DEVS]; / addresses to the devices configuration tables */
	155	unsigned int apbmst[AMBA_MAXAPB_DEVS]; /* apb master if a entry is a apb slave */
	156	unsigned int apbmstidx[AMBA_MAXAPB_DEVS]; /* apb master idx if a entry is a apb slave */
	157	unsigned int allocbits[4]; /* 0=unallocated, 1=allocated driver */
	158	};
	159
	160	struct amba_confarea_type {
	161	struct amba_confarea_type next;/ next bus in chain */
	162	struct amba_device_table ahbmst;
	163	struct amba_device_table ahbslv;
	164	struct amba_apbslv_device_table apbslv;
	165	unsigned int apbmst;
	166	};
	167
	168	/* collect apb slaves */
	169	struct amba_apb_device {
	170	unsigned int start, irq, bus_id;
	171	struct amba_confarea_type *bus;
	172	};
	173
	174	/* collect ahb slaves */
	175	struct amba_ahb_device {
	176	unsigned int start[4], irq, bus_id;
	177	struct amba_confarea_type *bus;
	178	};
179
180	struct device_node;
181	void _amba_init(struct device_node dp, struct device_node **nextp);
182
7279b82c	183	extern unsigned long amba_system_id;
5213a780 KE	184	extern struct leon3_irqctrl_regs_map *leon3_irqctrl_regs;
	185	extern struct leon3_gptimer_regs_map *leon3_gptimer_regs;
	186	extern struct amba_apb_device leon_percpu_timer_dev[16];
	187	extern int leondebug_irq_disable;
	188	extern int leon_debug_irqout;
	189	extern unsigned long leon3_gptimer_irq;
	190	extern unsigned int sparc_leon_eirq;
	191
	192	#endif /* __ASSEMBLY__ */
	193
	194	#define LEON3_IO_AREA 0xfff00000
	195	#define LEON3_CONF_AREA 0xff000
	196	#define LEON3_AHB_SLAVE_CONF_AREA (1 << 11)
	197
	198	#define LEON3_AHB_CONF_WORDS 8
	199	#define LEON3_APB_CONF_WORDS 2
	200	#define LEON3_AHB_MASTERS 16
	201	#define LEON3_AHB_SLAVES 16
	202	#define LEON3_APB_SLAVES 16
	203	#define LEON3_APBUARTS 8
	204
	205	/* Vendor codes */
	206	#define VENDOR_GAISLER 1
	207	#define VENDOR_PENDER 2
	208	#define VENDOR_ESA 4
	209	#define VENDOR_OPENCORES 8
	210
	211	/* Gaisler Research device id's */
	212	#define GAISLER_LEON3 0x003
	213	#define GAISLER_LEON3DSU 0x004
	214	#define GAISLER_ETHAHB 0x005
	215	#define GAISLER_APBMST 0x006
	216	#define GAISLER_AHBUART 0x007
	217	#define GAISLER_SRCTRL 0x008
	218	#define GAISLER_SDCTRL 0x009
	219	#define GAISLER_APBUART 0x00C
	220	#define GAISLER_IRQMP 0x00D
	221	#define GAISLER_AHBRAM 0x00E
	222	#define GAISLER_GPTIMER 0x011
	223	#define GAISLER_PCITRG 0x012
	224	#define GAISLER_PCISBRG 0x013
	225	#define GAISLER_PCIFBRG 0x014
	226	#define GAISLER_PCITRACE 0x015
	227	#define GAISLER_PCIDMA 0x016
	228	#define GAISLER_AHBTRACE 0x017
	229	#define GAISLER_ETHDSU 0x018
	230	#define GAISLER_PIOPORT 0x01A
	231	#define GAISLER_GRGPIO 0x01A
	232	#define GAISLER_AHBJTAG 0x01c
	233	#define GAISLER_ETHMAC 0x01D
	234	#define GAISLER_AHB2AHB 0x020
	235	#define GAISLER_USBDC 0x021
	236	#define GAISLER_ATACTRL 0x024
	237	#define GAISLER_DDRSPA 0x025
	238	#define GAISLER_USBEHC 0x026
	239	#define GAISLER_USBUHC 0x027
	240	#define GAISLER_I2CMST 0x028
	241	#define GAISLER_SPICTRL 0x02D
	242	#define GAISLER_DDR2SPA 0x02E
	243	#define GAISLER_SPIMCTRL 0x045
	244	#define GAISLER_LEON4 0x048
	245	#define GAISLER_LEON4DSU 0x049
	246	#define GAISLER_AHBSTAT 0x052
	247	#define GAISLER_FTMCTRL 0x054
248	#define GAISLER_KBD 0x060
249	#define GAISLER_VGA 0x061
250	#define GAISLER_SVGA 0x063
251	#define GAISLER_GRSYSMON 0x066
252	#define GAISLER_GRACECTRL 0x067
253
254	#define GAISLER_L2TIME 0xffd /* internal device: leon2 timer */
255	#define GAISLER_L2C 0xffe /* internal device: leon2compat */
256	#define GAISLER_PLUGPLAY 0xfff /* internal device: plug & play configarea */
257
7279b82c DH	258	/* Chip IDs */
	259	#define AEROFLEX_UT699 0x0699
	260	#define LEON4_NEXTREME1 0x0102
	261	#define GAISLER_GR712RC 0x0712
	262
5213a780 KE	263	#define amba_vendor(x) (((x) >> 24) & 0xff)
	264
	265	#define amba_device(x) (((x) >> 12) & 0xfff)
	266
5213a780	267	#endif