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b2441318 | 1 | /* SPDX-License-Identifier: GPL-2.0 */ |
a00736e9 SR |
2 | /* parport.h: sparc64 specific parport initialization and dma. |
3 | * | |
4 | * Copyright (C) 1999 Eddie C. Dost (ecd@skynet.be) | |
5 | */ | |
6 | ||
7 | #ifndef _ASM_SPARC64_PARPORT_H | |
8 | #define _ASM_SPARC64_PARPORT_H 1 | |
9 | ||
764f2579 SR |
10 | #include <linux/of_device.h> |
11 | ||
aae7fb87 | 12 | #include <asm/ebus_dma.h> |
a00736e9 | 13 | #include <asm/ns87303.h> |
a00736e9 SR |
14 | #include <asm/prom.h> |
15 | ||
16 | #define PARPORT_PC_MAX_PORTS PARPORT_MAX | |
17 | ||
18 | /* | |
19 | * While sparc64 doesn't have an ISA DMA API, we provide something that looks | |
20 | * close enough to make parport_pc happy | |
21 | */ | |
22 | #define HAS_DMA | |
23 | ||
24 | static DEFINE_SPINLOCK(dma_spin_lock); | |
25 | ||
26 | #define claim_dma_lock() \ | |
27 | ({ unsigned long flags; \ | |
28 | spin_lock_irqsave(&dma_spin_lock, flags); \ | |
29 | flags; \ | |
30 | }) | |
31 | ||
32 | #define release_dma_lock(__flags) \ | |
33 | spin_unlock_irqrestore(&dma_spin_lock, __flags); | |
34 | ||
35 | static struct sparc_ebus_info { | |
36 | struct ebus_dma_info info; | |
37 | unsigned int addr; | |
38 | unsigned int count; | |
39 | int lock; | |
40 | ||
41 | struct parport *port; | |
42 | } sparc_ebus_dmas[PARPORT_PC_MAX_PORTS]; | |
43 | ||
44 | static DECLARE_BITMAP(dma_slot_map, PARPORT_PC_MAX_PORTS); | |
45 | ||
46 | static inline int request_dma(unsigned int dmanr, const char *device_id) | |
47 | { | |
48 | if (dmanr >= PARPORT_PC_MAX_PORTS) | |
49 | return -EINVAL; | |
50 | if (xchg(&sparc_ebus_dmas[dmanr].lock, 1) != 0) | |
51 | return -EBUSY; | |
52 | return 0; | |
53 | } | |
54 | ||
55 | static inline void free_dma(unsigned int dmanr) | |
56 | { | |
57 | if (dmanr >= PARPORT_PC_MAX_PORTS) { | |
58 | printk(KERN_WARNING "Trying to free DMA%d\n", dmanr); | |
59 | return; | |
60 | } | |
61 | if (xchg(&sparc_ebus_dmas[dmanr].lock, 0) == 0) { | |
62 | printk(KERN_WARNING "Trying to free free DMA%d\n", dmanr); | |
63 | return; | |
64 | } | |
65 | } | |
66 | ||
67 | static inline void enable_dma(unsigned int dmanr) | |
68 | { | |
69 | ebus_dma_enable(&sparc_ebus_dmas[dmanr].info, 1); | |
70 | ||
71 | if (ebus_dma_request(&sparc_ebus_dmas[dmanr].info, | |
72 | sparc_ebus_dmas[dmanr].addr, | |
73 | sparc_ebus_dmas[dmanr].count)) | |
74 | BUG(); | |
75 | } | |
76 | ||
77 | static inline void disable_dma(unsigned int dmanr) | |
78 | { | |
79 | ebus_dma_enable(&sparc_ebus_dmas[dmanr].info, 0); | |
80 | } | |
81 | ||
82 | static inline void clear_dma_ff(unsigned int dmanr) | |
83 | { | |
84 | /* nothing */ | |
85 | } | |
86 | ||
87 | static inline void set_dma_mode(unsigned int dmanr, char mode) | |
88 | { | |
89 | ebus_dma_prepare(&sparc_ebus_dmas[dmanr].info, (mode != DMA_MODE_WRITE)); | |
90 | } | |
91 | ||
92 | static inline void set_dma_addr(unsigned int dmanr, unsigned int addr) | |
93 | { | |
94 | sparc_ebus_dmas[dmanr].addr = addr; | |
95 | } | |
96 | ||
97 | static inline void set_dma_count(unsigned int dmanr, unsigned int count) | |
98 | { | |
99 | sparc_ebus_dmas[dmanr].count = count; | |
100 | } | |
101 | ||
102 | static inline unsigned int get_dma_residue(unsigned int dmanr) | |
103 | { | |
104 | return ebus_dma_residue(&sparc_ebus_dmas[dmanr].info); | |
105 | } | |
106 | ||
7c9503b8 | 107 | static int ecpp_probe(struct platform_device *op) |
a00736e9 SR |
108 | { |
109 | unsigned long base = op->resource[0].start; | |
110 | unsigned long config = op->resource[1].start; | |
111 | unsigned long d_base = op->resource[2].start; | |
112 | unsigned long d_len; | |
113 | struct device_node *parent; | |
114 | struct parport *p; | |
115 | int slot, err; | |
116 | ||
61c7a080 | 117 | parent = op->dev.of_node->parent; |
a00736e9 SR |
118 | if (!strcmp(parent->name, "dma")) { |
119 | p = parport_pc_probe_port(base, base + 0x400, | |
1636f8ac | 120 | op->archdata.irqs[0], PARPORT_DMA_NOFIFO, |
28783eb5 | 121 | op->dev.parent->parent, 0); |
a00736e9 SR |
122 | if (!p) |
123 | return -ENOMEM; | |
124 | dev_set_drvdata(&op->dev, p); | |
125 | return 0; | |
126 | } | |
127 | ||
128 | for (slot = 0; slot < PARPORT_PC_MAX_PORTS; slot++) { | |
129 | if (!test_and_set_bit(slot, dma_slot_map)) | |
130 | break; | |
131 | } | |
132 | err = -ENODEV; | |
133 | if (slot >= PARPORT_PC_MAX_PORTS) | |
134 | goto out_err; | |
135 | ||
136 | spin_lock_init(&sparc_ebus_dmas[slot].info.lock); | |
137 | ||
138 | d_len = (op->resource[2].end - d_base) + 1UL; | |
139 | sparc_ebus_dmas[slot].info.regs = | |
140 | of_ioremap(&op->resource[2], 0, d_len, "ECPP DMA"); | |
141 | ||
142 | if (!sparc_ebus_dmas[slot].info.regs) | |
143 | goto out_clear_map; | |
144 | ||
145 | sparc_ebus_dmas[slot].info.flags = 0; | |
146 | sparc_ebus_dmas[slot].info.callback = NULL; | |
147 | sparc_ebus_dmas[slot].info.client_cookie = NULL; | |
148 | sparc_ebus_dmas[slot].info.irq = 0xdeadbeef; | |
149 | strcpy(sparc_ebus_dmas[slot].info.name, "parport"); | |
150 | if (ebus_dma_register(&sparc_ebus_dmas[slot].info)) | |
151 | goto out_unmap_regs; | |
152 | ||
153 | ebus_dma_irq_enable(&sparc_ebus_dmas[slot].info, 1); | |
154 | ||
155 | /* Configure IRQ to Push Pull, Level Low */ | |
156 | /* Enable ECP, set bit 2 of the CTR first */ | |
157 | outb(0x04, base + 0x02); | |
158 | ns87303_modify(config, PCR, | |
159 | PCR_EPP_ENABLE | | |
160 | PCR_IRQ_ODRAIN, | |
161 | PCR_ECP_ENABLE | | |
162 | PCR_ECP_CLK_ENA | | |
163 | PCR_IRQ_POLAR); | |
164 | ||
165 | /* CTR bit 5 controls direction of port */ | |
166 | ns87303_modify(config, PTR, | |
167 | 0, PTR_LPT_REG_DIR); | |
168 | ||
169 | p = parport_pc_probe_port(base, base + 0x400, | |
1636f8ac | 170 | op->archdata.irqs[0], |
a00736e9 | 171 | slot, |
28783eb5 AC |
172 | op->dev.parent, |
173 | 0); | |
a00736e9 SR |
174 | err = -ENOMEM; |
175 | if (!p) | |
176 | goto out_disable_irq; | |
177 | ||
178 | dev_set_drvdata(&op->dev, p); | |
179 | ||
180 | return 0; | |
181 | ||
182 | out_disable_irq: | |
183 | ebus_dma_irq_enable(&sparc_ebus_dmas[slot].info, 0); | |
184 | ebus_dma_unregister(&sparc_ebus_dmas[slot].info); | |
185 | ||
186 | out_unmap_regs: | |
187 | of_iounmap(&op->resource[2], sparc_ebus_dmas[slot].info.regs, d_len); | |
188 | ||
189 | out_clear_map: | |
190 | clear_bit(slot, dma_slot_map); | |
191 | ||
192 | out_err: | |
193 | return err; | |
194 | } | |
195 | ||
7c9503b8 | 196 | static int ecpp_remove(struct platform_device *op) |
a00736e9 SR |
197 | { |
198 | struct parport *p = dev_get_drvdata(&op->dev); | |
199 | int slot = p->dma; | |
200 | ||
201 | parport_pc_unregister_port(p); | |
202 | ||
203 | if (slot != PARPORT_DMA_NOFIFO) { | |
204 | unsigned long d_base = op->resource[2].start; | |
205 | unsigned long d_len; | |
206 | ||
207 | d_len = (op->resource[2].end - d_base) + 1UL; | |
208 | ||
209 | ebus_dma_irq_enable(&sparc_ebus_dmas[slot].info, 0); | |
210 | ebus_dma_unregister(&sparc_ebus_dmas[slot].info); | |
211 | of_iounmap(&op->resource[2], | |
212 | sparc_ebus_dmas[slot].info.regs, | |
213 | d_len); | |
214 | clear_bit(slot, dma_slot_map); | |
215 | } | |
216 | ||
217 | return 0; | |
218 | } | |
219 | ||
fd098316 | 220 | static const struct of_device_id ecpp_match[] = { |
a00736e9 SR |
221 | { |
222 | .name = "ecpp", | |
223 | }, | |
224 | { | |
225 | .name = "parallel", | |
226 | .compatible = "ecpp", | |
227 | }, | |
228 | { | |
229 | .name = "parallel", | |
230 | .compatible = "ns87317-ecpp", | |
231 | }, | |
c8837434 DM |
232 | { |
233 | .name = "parallel", | |
234 | .compatible = "pnpALI,1533,3", | |
235 | }, | |
a00736e9 SR |
236 | {}, |
237 | }; | |
238 | ||
4ebb24f7 | 239 | static struct platform_driver ecpp_driver = { |
4018294b GL |
240 | .driver = { |
241 | .name = "ecpp", | |
4018294b GL |
242 | .of_match_table = ecpp_match, |
243 | }, | |
a00736e9 | 244 | .probe = ecpp_probe, |
7c9503b8 | 245 | .remove = ecpp_remove, |
a00736e9 SR |
246 | }; |
247 | ||
248 | static int parport_pc_find_nonpci_ports(int autoirq, int autodma) | |
249 | { | |
4ebb24f7 | 250 | return platform_driver_register(&ecpp_driver); |
a00736e9 SR |
251 | } |
252 | ||
253 | #endif /* !(_ASM_SPARC64_PARPORT_H */ |