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b2441318 | 1 | // SPDX-License-Identifier: GPL-2.0 |
cf3d7c1e | 2 | /* time.c: UltraSparc timer and TOD clock support. |
1da177e4 | 3 | * |
cf3d7c1e | 4 | * Copyright (C) 1997, 2008 David S. Miller (davem@davemloft.net) |
1da177e4 LT |
5 | * Copyright (C) 1998 Eddie C. Dost (ecd@skynet.be) |
6 | * | |
7 | * Based largely on code which is: | |
8 | * | |
9 | * Copyright (C) 1996 Thomas K. Dyas (tdyas@eden.rutgers.edu) | |
10 | */ | |
11 | ||
1da177e4 | 12 | #include <linux/errno.h> |
066bcaca | 13 | #include <linux/export.h> |
1da177e4 LT |
14 | #include <linux/sched.h> |
15 | #include <linux/kernel.h> | |
16 | #include <linux/param.h> | |
17 | #include <linux/string.h> | |
18 | #include <linux/mm.h> | |
19 | #include <linux/interrupt.h> | |
20 | #include <linux/time.h> | |
21 | #include <linux/timex.h> | |
22 | #include <linux/init.h> | |
23 | #include <linux/ioport.h> | |
24 | #include <linux/mc146818rtc.h> | |
25 | #include <linux/delay.h> | |
26 | #include <linux/profile.h> | |
27 | #include <linux/bcd.h> | |
28 | #include <linux/jiffies.h> | |
29 | #include <linux/cpufreq.h> | |
30 | #include <linux/percpu.h> | |
8ba706a9 | 31 | #include <linux/miscdevice.h> |
1518e7ed | 32 | #include <linux/rtc/m48t59.h> |
777a4475 | 33 | #include <linux/kernel_stat.h> |
112f4871 DM |
34 | #include <linux/clockchips.h> |
35 | #include <linux/clocksource.h> | |
1518e7ed | 36 | #include <linux/platform_device.h> |
9960e9e8 | 37 | #include <linux/ftrace.h> |
1da177e4 LT |
38 | |
39 | #include <asm/oplib.h> | |
1da177e4 | 40 | #include <asm/timer.h> |
82268da1 | 41 | #include <asm/irq.h> |
1da177e4 | 42 | #include <asm/io.h> |
ff0d2fc6 | 43 | #include <asm/prom.h> |
1da177e4 LT |
44 | #include <asm/starfire.h> |
45 | #include <asm/smp.h> | |
46 | #include <asm/sections.h> | |
47 | #include <asm/cpudata.h> | |
7c0f6ba6 | 48 | #include <linux/uaccess.h> |
63540ba3 | 49 | #include <asm/irq_regs.h> |
4929c83a | 50 | #include <asm/cacheflush.h> |
1da177e4 | 51 | |
cf3d7c1e | 52 | #include "entry.h" |
83e8eb99 | 53 | #include "kernel.h" |
cf3d7c1e | 54 | |
1da177e4 | 55 | DEFINE_SPINLOCK(rtc_lock); |
1da177e4 | 56 | |
1da177e4 LT |
57 | #ifdef CONFIG_SMP |
58 | unsigned long profile_pc(struct pt_regs *regs) | |
59 | { | |
60 | unsigned long pc = instruction_pointer(regs); | |
61 | ||
62 | if (in_lock_functions(pc)) | |
63 | return regs->u_regs[UREG_RETPC]; | |
64 | return pc; | |
65 | } | |
66 | EXPORT_SYMBOL(profile_pc); | |
67 | #endif | |
68 | ||
69 | static void tick_disable_protection(void) | |
70 | { | |
71 | /* Set things up so user can access tick register for profiling | |
72 | * purposes. Also workaround BB_ERRATA_1 by doing a dummy | |
73 | * read back of %tick after writing it. | |
74 | */ | |
75 | __asm__ __volatile__( | |
76 | " ba,pt %%xcc, 1f\n" | |
77 | " nop\n" | |
78 | " .align 64\n" | |
79 | "1: rd %%tick, %%g2\n" | |
80 | " add %%g2, 6, %%g2\n" | |
81 | " andn %%g2, %0, %%g2\n" | |
82 | " wrpr %%g2, 0, %%tick\n" | |
83 | " rdpr %%tick, %%g0" | |
84 | : /* no outputs */ | |
85 | : "r" (TICK_PRIV_BIT) | |
86 | : "g2"); | |
87 | } | |
88 | ||
112f4871 | 89 | static void tick_disable_irq(void) |
1da177e4 | 90 | { |
1da177e4 | 91 | __asm__ __volatile__( |
1da177e4 | 92 | " ba,pt %%xcc, 1f\n" |
112f4871 | 93 | " nop\n" |
1da177e4 | 94 | " .align 64\n" |
112f4871 | 95 | "1: wr %0, 0x0, %%tick_cmpr\n" |
1da177e4 LT |
96 | " rd %%tick_cmpr, %%g0" |
97 | : /* no outputs */ | |
112f4871 DM |
98 | : "r" (TICKCMP_IRQ_BIT)); |
99 | } | |
100 | ||
101 | static void tick_init_tick(void) | |
102 | { | |
103 | tick_disable_protection(); | |
104 | tick_disable_irq(); | |
1da177e4 LT |
105 | } |
106 | ||
90181136 | 107 | static unsigned long long tick_get_tick(void) |
1da177e4 LT |
108 | { |
109 | unsigned long ret; | |
110 | ||
111 | __asm__ __volatile__("rd %%tick, %0\n\t" | |
112 | "mov %0, %0" | |
113 | : "=r" (ret)); | |
114 | ||
115 | return ret & ~TICK_PRIV_BIT; | |
116 | } | |
117 | ||
112f4871 | 118 | static int tick_add_compare(unsigned long adj) |
1da177e4 | 119 | { |
112f4871 | 120 | unsigned long orig_tick, new_tick, new_compare; |
1da177e4 | 121 | |
112f4871 DM |
122 | __asm__ __volatile__("rd %%tick, %0" |
123 | : "=r" (orig_tick)); | |
1da177e4 | 124 | |
112f4871 | 125 | orig_tick &= ~TICKCMP_IRQ_BIT; |
1da177e4 LT |
126 | |
127 | /* Workaround for Spitfire Errata (#54 I think??), I discovered | |
128 | * this via Sun BugID 4008234, mentioned in Solaris-2.5.1 patch | |
129 | * number 103640. | |
130 | * | |
131 | * On Blackbird writes to %tick_cmpr can fail, the | |
132 | * workaround seems to be to execute the wr instruction | |
133 | * at the start of an I-cache line, and perform a dummy | |
134 | * read back from %tick_cmpr right after writing to it. -DaveM | |
135 | */ | |
112f4871 DM |
136 | __asm__ __volatile__("ba,pt %%xcc, 1f\n\t" |
137 | " add %1, %2, %0\n\t" | |
1da177e4 LT |
138 | ".align 64\n" |
139 | "1:\n\t" | |
140 | "wr %0, 0, %%tick_cmpr\n\t" | |
112f4871 DM |
141 | "rd %%tick_cmpr, %%g0\n\t" |
142 | : "=r" (new_compare) | |
143 | : "r" (orig_tick), "r" (adj)); | |
144 | ||
145 | __asm__ __volatile__("rd %%tick, %0" | |
146 | : "=r" (new_tick)); | |
147 | new_tick &= ~TICKCMP_IRQ_BIT; | |
1da177e4 | 148 | |
112f4871 | 149 | return ((long)(new_tick - (orig_tick+adj))) > 0L; |
1da177e4 LT |
150 | } |
151 | ||
112f4871 | 152 | static unsigned long tick_add_tick(unsigned long adj) |
1da177e4 | 153 | { |
112f4871 | 154 | unsigned long new_tick; |
1da177e4 LT |
155 | |
156 | /* Also need to handle Blackbird bug here too. */ | |
157 | __asm__ __volatile__("rd %%tick, %0\n\t" | |
112f4871 | 158 | "add %0, %1, %0\n\t" |
1da177e4 | 159 | "wrpr %0, 0, %%tick\n\t" |
112f4871 DM |
160 | : "=&r" (new_tick) |
161 | : "r" (adj)); | |
1da177e4 LT |
162 | |
163 | return new_tick; | |
164 | } | |
165 | ||
eea98334 PT |
166 | /* Searches for cpu clock frequency with given cpuid in OpenBoot tree */ |
167 | static unsigned long cpuid_to_freq(phandle node, int cpuid) | |
168 | { | |
169 | bool is_cpu_node = false; | |
170 | unsigned long freq = 0; | |
171 | char type[128]; | |
172 | ||
173 | if (!node) | |
174 | return freq; | |
175 | ||
176 | if (prom_getproperty(node, "device_type", type, sizeof(type)) != -1) | |
177 | is_cpu_node = (strcmp(type, "cpu") == 0); | |
178 | ||
a718d139 PT |
179 | /* try upa-portid then cpuid to get cpuid, see prom_64.c */ |
180 | if (is_cpu_node && (prom_getint(node, "upa-portid") == cpuid || | |
eea98334 PT |
181 | prom_getint(node, "cpuid") == cpuid)) |
182 | freq = prom_getintdefault(node, "clock-frequency", 0); | |
183 | if (!freq) | |
184 | freq = cpuid_to_freq(prom_getchild(node), cpuid); | |
185 | if (!freq) | |
186 | freq = cpuid_to_freq(prom_getsibling(node), cpuid); | |
187 | ||
188 | return freq; | |
189 | } | |
190 | ||
89108c34 PT |
191 | static unsigned long tick_get_frequency(void) |
192 | { | |
eea98334 | 193 | return cpuid_to_freq(prom_root_node, hard_smp_processor_id()); |
89108c34 PT |
194 | } |
195 | ||
178bf2b9 | 196 | static struct sparc64_tick_ops tick_operations __cacheline_aligned = { |
112f4871 | 197 | .name = "tick", |
1da177e4 | 198 | .init_tick = tick_init_tick, |
112f4871 | 199 | .disable_irq = tick_disable_irq, |
1da177e4 | 200 | .get_tick = tick_get_tick, |
1da177e4 LT |
201 | .add_tick = tick_add_tick, |
202 | .add_compare = tick_add_compare, | |
89108c34 | 203 | .get_frequency = tick_get_frequency, |
1da177e4 LT |
204 | .softint_mask = 1UL << 0, |
205 | }; | |
206 | ||
fc321495 | 207 | struct sparc64_tick_ops *tick_ops __read_mostly = &tick_operations; |
917c3660 | 208 | EXPORT_SYMBOL(tick_ops); |
fc321495 | 209 | |
112f4871 DM |
210 | static void stick_disable_irq(void) |
211 | { | |
212 | __asm__ __volatile__( | |
213 | "wr %0, 0x0, %%asr25" | |
214 | : /* no outputs */ | |
215 | : "r" (TICKCMP_IRQ_BIT)); | |
216 | } | |
217 | ||
218 | static void stick_init_tick(void) | |
1da177e4 | 219 | { |
7aa62645 DM |
220 | /* Writes to the %tick and %stick register are not |
221 | * allowed on sun4v. The Hypervisor controls that | |
222 | * bit, per-strand. | |
223 | */ | |
224 | if (tlb_type != hypervisor) { | |
225 | tick_disable_protection(); | |
112f4871 | 226 | tick_disable_irq(); |
7aa62645 DM |
227 | |
228 | /* Let the user get at STICK too. */ | |
229 | __asm__ __volatile__( | |
230 | " rd %%asr24, %%g2\n" | |
231 | " andn %%g2, %0, %%g2\n" | |
232 | " wr %%g2, 0, %%asr24" | |
233 | : /* no outputs */ | |
234 | : "r" (TICK_PRIV_BIT) | |
235 | : "g1", "g2"); | |
236 | } | |
1da177e4 | 237 | |
112f4871 | 238 | stick_disable_irq(); |
1da177e4 LT |
239 | } |
240 | ||
90181136 | 241 | static unsigned long long stick_get_tick(void) |
1da177e4 LT |
242 | { |
243 | unsigned long ret; | |
244 | ||
245 | __asm__ __volatile__("rd %%asr24, %0" | |
246 | : "=r" (ret)); | |
247 | ||
248 | return ret & ~TICK_PRIV_BIT; | |
249 | } | |
250 | ||
112f4871 | 251 | static unsigned long stick_add_tick(unsigned long adj) |
1da177e4 | 252 | { |
112f4871 | 253 | unsigned long new_tick; |
1da177e4 LT |
254 | |
255 | __asm__ __volatile__("rd %%asr24, %0\n\t" | |
112f4871 | 256 | "add %0, %1, %0\n\t" |
1da177e4 | 257 | "wr %0, 0, %%asr24\n\t" |
112f4871 DM |
258 | : "=&r" (new_tick) |
259 | : "r" (adj)); | |
1da177e4 LT |
260 | |
261 | return new_tick; | |
262 | } | |
263 | ||
112f4871 | 264 | static int stick_add_compare(unsigned long adj) |
1da177e4 | 265 | { |
112f4871 | 266 | unsigned long orig_tick, new_tick; |
1da177e4 | 267 | |
112f4871 DM |
268 | __asm__ __volatile__("rd %%asr24, %0" |
269 | : "=r" (orig_tick)); | |
270 | orig_tick &= ~TICKCMP_IRQ_BIT; | |
271 | ||
272 | __asm__ __volatile__("wr %0, 0, %%asr25" | |
273 | : /* no outputs */ | |
274 | : "r" (orig_tick + adj)); | |
275 | ||
276 | __asm__ __volatile__("rd %%asr24, %0" | |
277 | : "=r" (new_tick)); | |
278 | new_tick &= ~TICKCMP_IRQ_BIT; | |
1da177e4 | 279 | |
112f4871 | 280 | return ((long)(new_tick - (orig_tick+adj))) > 0L; |
1da177e4 LT |
281 | } |
282 | ||
89108c34 PT |
283 | static unsigned long stick_get_frequency(void) |
284 | { | |
fca4afe4 | 285 | return prom_getintdefault(prom_root_node, "stick-frequency", 0); |
89108c34 PT |
286 | } |
287 | ||
d369ddd2 | 288 | static struct sparc64_tick_ops stick_operations __read_mostly = { |
112f4871 | 289 | .name = "stick", |
1da177e4 | 290 | .init_tick = stick_init_tick, |
112f4871 | 291 | .disable_irq = stick_disable_irq, |
1da177e4 | 292 | .get_tick = stick_get_tick, |
1da177e4 LT |
293 | .add_tick = stick_add_tick, |
294 | .add_compare = stick_add_compare, | |
89108c34 | 295 | .get_frequency = stick_get_frequency, |
1da177e4 LT |
296 | .softint_mask = 1UL << 16, |
297 | }; | |
298 | ||
299 | /* On Hummingbird the STICK/STICK_CMPR register is implemented | |
300 | * in I/O space. There are two 64-bit registers each, the | |
301 | * first holds the low 32-bits of the value and the second holds | |
302 | * the high 32-bits. | |
303 | * | |
304 | * Since STICK is constantly updating, we have to access it carefully. | |
305 | * | |
306 | * The sequence we use to read is: | |
9eb3394b RM |
307 | * 1) read high |
308 | * 2) read low | |
309 | * 3) read high again, if it rolled re-read both low and high again. | |
1da177e4 LT |
310 | * |
311 | * Writing STICK safely is also tricky: | |
312 | * 1) write low to zero | |
313 | * 2) write high | |
314 | * 3) write low | |
315 | */ | |
1da177e4 LT |
316 | static unsigned long __hbird_read_stick(void) |
317 | { | |
318 | unsigned long ret, tmp1, tmp2, tmp3; | |
9eb3394b | 319 | unsigned long addr = HBIRD_STICK_ADDR+8; |
1da177e4 | 320 | |
9eb3394b RM |
321 | __asm__ __volatile__("ldxa [%1] %5, %2\n" |
322 | "1:\n\t" | |
1da177e4 | 323 | "sub %1, 0x8, %1\n\t" |
9eb3394b RM |
324 | "ldxa [%1] %5, %3\n\t" |
325 | "add %1, 0x8, %1\n\t" | |
1da177e4 LT |
326 | "ldxa [%1] %5, %4\n\t" |
327 | "cmp %4, %2\n\t" | |
9eb3394b RM |
328 | "bne,a,pn %%xcc, 1b\n\t" |
329 | " mov %4, %2\n\t" | |
330 | "sllx %4, 32, %4\n\t" | |
1da177e4 LT |
331 | "or %3, %4, %0\n\t" |
332 | : "=&r" (ret), "=&r" (addr), | |
333 | "=&r" (tmp1), "=&r" (tmp2), "=&r" (tmp3) | |
334 | : "i" (ASI_PHYS_BYPASS_EC_E), "1" (addr)); | |
335 | ||
336 | return ret; | |
337 | } | |
338 | ||
1da177e4 LT |
339 | static void __hbird_write_stick(unsigned long val) |
340 | { | |
341 | unsigned long low = (val & 0xffffffffUL); | |
342 | unsigned long high = (val >> 32UL); | |
343 | unsigned long addr = HBIRD_STICK_ADDR; | |
344 | ||
345 | __asm__ __volatile__("stxa %%g0, [%0] %4\n\t" | |
346 | "add %0, 0x8, %0\n\t" | |
347 | "stxa %3, [%0] %4\n\t" | |
348 | "sub %0, 0x8, %0\n\t" | |
349 | "stxa %2, [%0] %4" | |
350 | : "=&r" (addr) | |
351 | : "0" (addr), "r" (low), "r" (high), | |
352 | "i" (ASI_PHYS_BYPASS_EC_E)); | |
353 | } | |
354 | ||
355 | static void __hbird_write_compare(unsigned long val) | |
356 | { | |
357 | unsigned long low = (val & 0xffffffffUL); | |
358 | unsigned long high = (val >> 32UL); | |
359 | unsigned long addr = HBIRD_STICKCMP_ADDR + 0x8UL; | |
360 | ||
361 | __asm__ __volatile__("stxa %3, [%0] %4\n\t" | |
362 | "sub %0, 0x8, %0\n\t" | |
363 | "stxa %2, [%0] %4" | |
364 | : "=&r" (addr) | |
365 | : "0" (addr), "r" (low), "r" (high), | |
366 | "i" (ASI_PHYS_BYPASS_EC_E)); | |
367 | } | |
368 | ||
112f4871 | 369 | static void hbtick_disable_irq(void) |
1da177e4 | 370 | { |
112f4871 DM |
371 | __hbird_write_compare(TICKCMP_IRQ_BIT); |
372 | } | |
1da177e4 | 373 | |
112f4871 DM |
374 | static void hbtick_init_tick(void) |
375 | { | |
1da177e4 LT |
376 | tick_disable_protection(); |
377 | ||
378 | /* XXX This seems to be necessary to 'jumpstart' Hummingbird | |
379 | * XXX into actually sending STICK interrupts. I think because | |
380 | * XXX of how we store %tick_cmpr in head.S this somehow resets the | |
381 | * XXX {TICK + STICK} interrupt mux. -DaveM | |
382 | */ | |
383 | __hbird_write_stick(__hbird_read_stick()); | |
384 | ||
112f4871 | 385 | hbtick_disable_irq(); |
1da177e4 LT |
386 | } |
387 | ||
90181136 | 388 | static unsigned long long hbtick_get_tick(void) |
1da177e4 LT |
389 | { |
390 | return __hbird_read_stick() & ~TICK_PRIV_BIT; | |
391 | } | |
392 | ||
112f4871 | 393 | static unsigned long hbtick_add_tick(unsigned long adj) |
1da177e4 LT |
394 | { |
395 | unsigned long val; | |
396 | ||
397 | val = __hbird_read_stick() + adj; | |
398 | __hbird_write_stick(val); | |
399 | ||
1da177e4 LT |
400 | return val; |
401 | } | |
402 | ||
112f4871 | 403 | static int hbtick_add_compare(unsigned long adj) |
1da177e4 | 404 | { |
112f4871 DM |
405 | unsigned long val = __hbird_read_stick(); |
406 | unsigned long val2; | |
1da177e4 | 407 | |
112f4871 DM |
408 | val &= ~TICKCMP_IRQ_BIT; |
409 | val += adj; | |
1da177e4 LT |
410 | __hbird_write_compare(val); |
411 | ||
112f4871 DM |
412 | val2 = __hbird_read_stick() & ~TICKCMP_IRQ_BIT; |
413 | ||
414 | return ((long)(val2 - val)) > 0L; | |
1da177e4 LT |
415 | } |
416 | ||
89108c34 PT |
417 | static unsigned long hbtick_get_frequency(void) |
418 | { | |
fca4afe4 | 419 | return prom_getintdefault(prom_root_node, "stick-frequency", 0); |
89108c34 PT |
420 | } |
421 | ||
d369ddd2 | 422 | static struct sparc64_tick_ops hbtick_operations __read_mostly = { |
112f4871 | 423 | .name = "hbtick", |
1da177e4 | 424 | .init_tick = hbtick_init_tick, |
112f4871 | 425 | .disable_irq = hbtick_disable_irq, |
1da177e4 | 426 | .get_tick = hbtick_get_tick, |
1da177e4 LT |
427 | .add_tick = hbtick_add_tick, |
428 | .add_compare = hbtick_add_compare, | |
89108c34 | 429 | .get_frequency = hbtick_get_frequency, |
1da177e4 LT |
430 | .softint_mask = 1UL << 0, |
431 | }; | |
432 | ||
da86783d DM |
433 | unsigned long cmos_regs; |
434 | EXPORT_SYMBOL(cmos_regs); | |
690c8fd3 | 435 | |
d8ada0a2 | 436 | static struct resource rtc_cmos_resource; |
da86783d DM |
437 | |
438 | static struct platform_device rtc_cmos_device = { | |
439 | .name = "rtc_cmos", | |
440 | .id = -1, | |
441 | .resource = &rtc_cmos_resource, | |
442 | .num_resources = 1, | |
443 | }; | |
690c8fd3 | 444 | |
7c9503b8 | 445 | static int rtc_probe(struct platform_device *op) |
690c8fd3 | 446 | { |
da86783d | 447 | struct resource *r; |
690c8fd3 | 448 | |
90181136 | 449 | printk(KERN_INFO "%s: RTC regs at 0x%llx\n", |
61c7a080 | 450 | op->dev.of_node->full_name, op->resource[0].start); |
d037e053 | 451 | |
da86783d DM |
452 | /* The CMOS RTC driver only accepts IORESOURCE_IO, so cons |
453 | * up a fake resource so that the probe works for all cases. | |
454 | * When the RTC is behind an ISA bus it will have IORESOURCE_IO | |
455 | * already, whereas when it's behind EBUS is will be IORESOURCE_MEM. | |
456 | */ | |
457 | ||
458 | r = &rtc_cmos_resource; | |
459 | r->flags = IORESOURCE_IO; | |
460 | r->name = op->resource[0].name; | |
461 | r->start = op->resource[0].start; | |
462 | r->end = op->resource[0].end; | |
463 | ||
464 | cmos_regs = op->resource[0].start; | |
465 | return platform_device_register(&rtc_cmos_device); | |
466 | } | |
467 | ||
3628aa06 | 468 | static const struct of_device_id rtc_match[] = { |
da86783d DM |
469 | { |
470 | .name = "rtc", | |
471 | .compatible = "m5819", | |
472 | }, | |
473 | { | |
474 | .name = "rtc", | |
475 | .compatible = "isa-m5819p", | |
476 | }, | |
477 | { | |
478 | .name = "rtc", | |
479 | .compatible = "isa-m5823p", | |
480 | }, | |
481 | { | |
482 | .name = "rtc", | |
483 | .compatible = "ds1287", | |
484 | }, | |
485 | {}, | |
486 | }; | |
487 | ||
4ebb24f7 | 488 | static struct platform_driver rtc_driver = { |
da86783d | 489 | .probe = rtc_probe, |
4018294b GL |
490 | .driver = { |
491 | .name = "rtc", | |
4018294b | 492 | .of_match_table = rtc_match, |
da86783d DM |
493 | }, |
494 | }; | |
91521485 | 495 | |
29b503f1 DM |
496 | static struct platform_device rtc_bq4802_device = { |
497 | .name = "rtc-bq4802", | |
498 | .id = -1, | |
499 | .num_resources = 1, | |
500 | }; | |
501 | ||
7c9503b8 | 502 | static int bq4802_probe(struct platform_device *op) |
da86783d | 503 | { |
690c8fd3 | 504 | |
90181136 | 505 | printk(KERN_INFO "%s: BQ4802 regs at 0x%llx\n", |
61c7a080 | 506 | op->dev.of_node->full_name, op->resource[0].start); |
690c8fd3 | 507 | |
29b503f1 DM |
508 | rtc_bq4802_device.resource = &op->resource[0]; |
509 | return platform_device_register(&rtc_bq4802_device); | |
690c8fd3 | 510 | } |
690c8fd3 | 511 | |
3628aa06 | 512 | static const struct of_device_id bq4802_match[] = { |
ee5caf0e | 513 | { |
1518e7ed | 514 | .name = "rtc", |
da86783d | 515 | .compatible = "bq4802", |
1518e7ed | 516 | }, |
770a4241 | 517 | {}, |
1518e7ed DM |
518 | }; |
519 | ||
4ebb24f7 | 520 | static struct platform_driver bq4802_driver = { |
da86783d | 521 | .probe = bq4802_probe, |
4018294b GL |
522 | .driver = { |
523 | .name = "bq4802", | |
4018294b | 524 | .of_match_table = bq4802_match, |
ee5caf0e | 525 | }, |
1518e7ed DM |
526 | }; |
527 | ||
528 | static unsigned char mostek_read_byte(struct device *dev, u32 ofs) | |
529 | { | |
530 | struct platform_device *pdev = to_platform_device(dev); | |
12a9ee3c KH |
531 | void __iomem *regs = (void __iomem *) pdev->resource[0].start; |
532 | ||
533 | return readb(regs + ofs); | |
1518e7ed DM |
534 | } |
535 | ||
536 | static void mostek_write_byte(struct device *dev, u32 ofs, u8 val) | |
537 | { | |
538 | struct platform_device *pdev = to_platform_device(dev); | |
12a9ee3c KH |
539 | void __iomem *regs = (void __iomem *) pdev->resource[0].start; |
540 | ||
1518e7ed DM |
541 | writeb(val, regs + ofs); |
542 | } | |
543 | ||
544 | static struct m48t59_plat_data m48t59_data = { | |
545 | .read_byte = mostek_read_byte, | |
546 | .write_byte = mostek_write_byte, | |
547 | }; | |
548 | ||
549 | static struct platform_device m48t59_rtc = { | |
550 | .name = "rtc-m48t59", | |
551 | .id = 0, | |
552 | .num_resources = 1, | |
553 | .dev = { | |
554 | .platform_data = &m48t59_data, | |
555 | }, | |
556 | }; | |
557 | ||
7c9503b8 | 558 | static int mostek_probe(struct platform_device *op) |
1518e7ed | 559 | { |
61c7a080 | 560 | struct device_node *dp = op->dev.of_node; |
1518e7ed DM |
561 | |
562 | /* On an Enterprise system there can be multiple mostek clocks. | |
563 | * We should only match the one that is on the central FHC bus. | |
564 | */ | |
565 | if (!strcmp(dp->parent->name, "fhc") && | |
566 | strcmp(dp->parent->parent->name, "central") != 0) | |
567 | return -ENODEV; | |
568 | ||
90181136 | 569 | printk(KERN_INFO "%s: Mostek regs at 0x%llx\n", |
1518e7ed DM |
570 | dp->full_name, op->resource[0].start); |
571 | ||
572 | m48t59_rtc.resource = &op->resource[0]; | |
573 | return platform_device_register(&m48t59_rtc); | |
574 | } | |
575 | ||
3628aa06 | 576 | static const struct of_device_id mostek_match[] = { |
ee5caf0e | 577 | { |
1518e7ed | 578 | .name = "eeprom", |
ee5caf0e DM |
579 | }, |
580 | {}, | |
581 | }; | |
690c8fd3 | 582 | |
4ebb24f7 | 583 | static struct platform_driver mostek_driver = { |
1518e7ed | 584 | .probe = mostek_probe, |
4018294b GL |
585 | .driver = { |
586 | .name = "mostek", | |
4018294b | 587 | .of_match_table = mostek_match, |
a2cd1558 | 588 | }, |
ee5caf0e | 589 | }; |
690c8fd3 | 590 | |
84d6bd5e DM |
591 | static struct platform_device rtc_sun4v_device = { |
592 | .name = "rtc-sun4v", | |
593 | .id = -1, | |
594 | }; | |
595 | ||
f2be6de8 DM |
596 | static struct platform_device rtc_starfire_device = { |
597 | .name = "rtc-starfire", | |
598 | .id = -1, | |
599 | }; | |
600 | ||
ee5caf0e | 601 | static int __init clock_init(void) |
690c8fd3 | 602 | { |
f2be6de8 DM |
603 | if (this_is_starfire) |
604 | return platform_device_register(&rtc_starfire_device); | |
605 | ||
84d6bd5e DM |
606 | if (tlb_type == hypervisor) |
607 | return platform_device_register(&rtc_sun4v_device); | |
1da177e4 | 608 | |
4ebb24f7 GL |
609 | (void) platform_driver_register(&rtc_driver); |
610 | (void) platform_driver_register(&mostek_driver); | |
611 | (void) platform_driver_register(&bq4802_driver); | |
1518e7ed DM |
612 | |
613 | return 0; | |
1da177e4 LT |
614 | } |
615 | ||
ee5caf0e DM |
616 | /* Must be after subsys_initcall() so that busses are probed. Must |
617 | * be before device_initcall() because things like the RTC driver | |
618 | * need to see the clock registers. | |
619 | */ | |
620 | fs_initcall(clock_init); | |
621 | ||
89108c34 PT |
622 | /* Return true if this is Hummingbird, aka Ultra-IIe */ |
623 | static bool is_hummingbird(void) | |
1da177e4 | 624 | { |
89108c34 | 625 | unsigned long ver, manuf, impl; |
1da177e4 | 626 | |
89108c34 PT |
627 | __asm__ __volatile__ ("rdpr %%ver, %0" |
628 | : "=&r" (ver)); | |
629 | manuf = ((ver >> 48) & 0xffff); | |
630 | impl = ((ver >> 32) & 0xffff); | |
1da177e4 | 631 | |
89108c34 | 632 | return (manuf == 0x17 && impl == 0x13); |
1da177e4 LT |
633 | } |
634 | ||
1da177e4 | 635 | struct freq_table { |
1da177e4 LT |
636 | unsigned long clock_tick_ref; |
637 | unsigned int ref_freq; | |
638 | }; | |
3763be32 | 639 | static DEFINE_PER_CPU(struct freq_table, sparc64_freq_table) = { 0, 0 }; |
1da177e4 LT |
640 | |
641 | unsigned long sparc64_get_clock_tick(unsigned int cpu) | |
642 | { | |
643 | struct freq_table *ft = &per_cpu(sparc64_freq_table, cpu); | |
644 | ||
645 | if (ft->clock_tick_ref) | |
646 | return ft->clock_tick_ref; | |
647 | return cpu_data(cpu).clock_tick; | |
648 | } | |
917c3660 | 649 | EXPORT_SYMBOL(sparc64_get_clock_tick); |
1da177e4 LT |
650 | |
651 | #ifdef CONFIG_CPU_FREQ | |
652 | ||
653 | static int sparc64_cpufreq_notifier(struct notifier_block *nb, unsigned long val, | |
654 | void *data) | |
655 | { | |
656 | struct cpufreq_freqs *freq = data; | |
657 | unsigned int cpu = freq->cpu; | |
658 | struct freq_table *ft = &per_cpu(sparc64_freq_table, cpu); | |
659 | ||
660 | if (!ft->ref_freq) { | |
661 | ft->ref_freq = freq->old; | |
1da177e4 LT |
662 | ft->clock_tick_ref = cpu_data(cpu).clock_tick; |
663 | } | |
664 | if ((val == CPUFREQ_PRECHANGE && freq->old < freq->new) || | |
0b443ead | 665 | (val == CPUFREQ_POSTCHANGE && freq->old > freq->new)) { |
1da177e4 LT |
666 | cpu_data(cpu).clock_tick = |
667 | cpufreq_scale(ft->clock_tick_ref, | |
668 | ft->ref_freq, | |
669 | freq->new); | |
670 | } | |
671 | ||
672 | return 0; | |
673 | } | |
674 | ||
675 | static struct notifier_block sparc64_cpufreq_notifier_block = { | |
676 | .notifier_call = sparc64_cpufreq_notifier | |
677 | }; | |
678 | ||
7ae93f51 DM |
679 | static int __init register_sparc64_cpufreq_notifier(void) |
680 | { | |
681 | ||
682 | cpufreq_register_notifier(&sparc64_cpufreq_notifier_block, | |
683 | CPUFREQ_TRANSITION_NOTIFIER); | |
684 | return 0; | |
685 | } | |
686 | ||
687 | core_initcall(register_sparc64_cpufreq_notifier); | |
688 | ||
1da177e4 LT |
689 | #endif /* CONFIG_CPU_FREQ */ |
690 | ||
112f4871 DM |
691 | static int sparc64_next_event(unsigned long delta, |
692 | struct clock_event_device *evt) | |
693 | { | |
b8a83fcb | 694 | return tick_operations.add_compare(delta) ? -ETIME : 0; |
112f4871 DM |
695 | } |
696 | ||
ff4aea45 VK |
697 | static int sparc64_timer_shutdown(struct clock_event_device *evt) |
698 | { | |
b8a83fcb | 699 | tick_operations.disable_irq(); |
ff4aea45 | 700 | return 0; |
112f4871 DM |
701 | } |
702 | ||
703 | static struct clock_event_device sparc64_clockevent = { | |
ff4aea45 VK |
704 | .features = CLOCK_EVT_FEAT_ONESHOT, |
705 | .set_state_shutdown = sparc64_timer_shutdown, | |
706 | .set_next_event = sparc64_next_event, | |
707 | .rating = 100, | |
708 | .shift = 30, | |
709 | .irq = -1, | |
1da177e4 | 710 | }; |
112f4871 | 711 | static DEFINE_PER_CPU(struct clock_event_device, sparc64_events); |
1da177e4 | 712 | |
9960e9e8 | 713 | void __irq_entry timer_interrupt(int irq, struct pt_regs *regs) |
1da177e4 | 714 | { |
112f4871 | 715 | struct pt_regs *old_regs = set_irq_regs(regs); |
b8a83fcb | 716 | unsigned long tick_mask = tick_operations.softint_mask; |
112f4871 DM |
717 | int cpu = smp_processor_id(); |
718 | struct clock_event_device *evt = &per_cpu(sparc64_events, cpu); | |
719 | ||
720 | clear_softint(tick_mask); | |
721 | ||
722 | irq_enter(); | |
723 | ||
daecbf58 | 724 | local_cpu_data().irq0_irqs++; |
87a69ad6 | 725 | kstat_incr_irq_this_cpu(0); |
112f4871 DM |
726 | |
727 | if (unlikely(!evt->event_handler)) { | |
728 | printk(KERN_WARNING | |
729 | "Spurious SPARC64 timer interrupt on cpu %d\n", cpu); | |
730 | } else | |
731 | evt->event_handler(evt); | |
732 | ||
733 | irq_exit(); | |
734 | ||
735 | set_irq_regs(old_regs); | |
736 | } | |
1da177e4 | 737 | |
7c9503b8 | 738 | void setup_sparc64_timer(void) |
112f4871 DM |
739 | { |
740 | struct clock_event_device *sevt; | |
741 | unsigned long pstate; | |
1da177e4 | 742 | |
112f4871 DM |
743 | /* Guarantee that the following sequences execute |
744 | * uninterrupted. | |
1da177e4 | 745 | */ |
112f4871 DM |
746 | __asm__ __volatile__("rdpr %%pstate, %0\n\t" |
747 | "wrpr %0, %1, %%pstate" | |
748 | : "=r" (pstate) | |
749 | : "i" (PSTATE_IE)); | |
750 | ||
b8a83fcb | 751 | tick_operations.init_tick(); |
112f4871 DM |
752 | |
753 | /* Restore PSTATE_IE. */ | |
754 | __asm__ __volatile__("wrpr %0, 0x0, %%pstate" | |
755 | : /* no outputs */ | |
756 | : "r" (pstate)); | |
757 | ||
494fc421 | 758 | sevt = this_cpu_ptr(&sparc64_events); |
112f4871 DM |
759 | |
760 | memcpy(sevt, &sparc64_clockevent, sizeof(*sevt)); | |
320ab2b0 | 761 | sevt->cpumask = cpumask_of(smp_processor_id()); |
112f4871 DM |
762 | |
763 | clockevents_register_device(sevt); | |
764 | } | |
765 | ||
03983ab8 | 766 | #define SPARC64_NSEC_PER_CYC_SHIFT 10UL |
112f4871 DM |
767 | |
768 | static struct clocksource clocksource_tick = { | |
769 | .rating = 100, | |
770 | .mask = CLOCKSOURCE_MASK(64), | |
112f4871 DM |
771 | .flags = CLOCK_SOURCE_IS_CONTINUOUS, |
772 | }; | |
773 | ||
8b99cfb8 DM |
774 | static unsigned long tb_ticks_per_usec __read_mostly; |
775 | ||
776 | void __delay(unsigned long loops) | |
777 | { | |
eae3fc98 | 778 | unsigned long bclock = get_tick(); |
8b99cfb8 | 779 | |
eae3fc98 PT |
780 | while ((get_tick() - bclock) < loops) |
781 | ; | |
8b99cfb8 DM |
782 | } |
783 | EXPORT_SYMBOL(__delay); | |
784 | ||
785 | void udelay(unsigned long usecs) | |
786 | { | |
787 | __delay(tb_ticks_per_usec * usecs); | |
788 | } | |
789 | EXPORT_SYMBOL(udelay); | |
790 | ||
a5a1d1c2 | 791 | static u64 clocksource_tick_read(struct clocksource *cs) |
8e19608e | 792 | { |
eae3fc98 | 793 | return get_tick(); |
8e19608e MD |
794 | } |
795 | ||
4929c83a PT |
796 | static void __init get_tick_patch(void) |
797 | { | |
798 | unsigned int *addr, *instr, i; | |
799 | struct get_tick_patch *p; | |
800 | ||
801 | if (tlb_type == spitfire && is_hummingbird()) | |
802 | return; | |
803 | ||
804 | for (p = &__get_tick_patch; p < &__get_tick_patch_end; p++) { | |
805 | instr = (tlb_type == spitfire) ? p->tick : p->stick; | |
806 | addr = (unsigned int *)(unsigned long)p->addr; | |
807 | for (i = 0; i < GET_TICK_NINSTR; i++) { | |
808 | addr[i] = instr[i]; | |
809 | /* ensure that address is modified before flush */ | |
810 | wmb(); | |
811 | flushi(&addr[i]); | |
812 | } | |
813 | } | |
814 | } | |
815 | ||
89108c34 PT |
816 | static void init_tick_ops(struct sparc64_tick_ops *ops) |
817 | { | |
818 | unsigned long freq, quotient, tick; | |
819 | ||
820 | freq = ops->get_frequency(); | |
821 | quotient = clocksource_hz2mult(freq, SPARC64_NSEC_PER_CYC_SHIFT); | |
822 | tick = ops->get_tick(); | |
823 | ||
824 | ops->offset = (tick * quotient) >> SPARC64_NSEC_PER_CYC_SHIFT; | |
825 | ops->ticks_per_nsec_quotient = quotient; | |
826 | ops->frequency = freq; | |
827 | tick_operations = *ops; | |
4929c83a | 828 | get_tick_patch(); |
89108c34 PT |
829 | } |
830 | ||
83e8eb99 | 831 | void __init time_init_early(void) |
112f4871 | 832 | { |
89108c34 PT |
833 | if (tlb_type == spitfire) { |
834 | if (is_hummingbird()) | |
835 | init_tick_ops(&hbtick_operations); | |
836 | else | |
837 | init_tick_ops(&tick_operations); | |
838 | } else { | |
839 | init_tick_ops(&stick_operations); | |
840 | } | |
83e8eb99 PT |
841 | } |
842 | ||
843 | void __init time_init(void) | |
844 | { | |
845 | unsigned long freq; | |
1da177e4 | 846 | |
89108c34 | 847 | freq = tick_operations.frequency; |
d8ada0a2 | 848 | tb_ticks_per_usec = freq / USEC_PER_SEC; |
8b99cfb8 | 849 | |
b8a83fcb | 850 | clocksource_tick.name = tick_operations.name; |
8e19608e | 851 | clocksource_tick.read = clocksource_tick_read; |
112f4871 | 852 | |
81043e81 | 853 | clocksource_register_hz(&clocksource_tick, freq); |
112f4871 DM |
854 | printk("clocksource: mult[%x] shift[%d]\n", |
855 | clocksource_tick.mult, clocksource_tick.shift); | |
856 | ||
b8a83fcb | 857 | sparc64_clockevent.name = tick_operations.name; |
6865b7f9 | 858 | clockevents_calc_mult_shift(&sparc64_clockevent, freq, 4); |
112f4871 DM |
859 | |
860 | sparc64_clockevent.max_delta_ns = | |
cf3d7c1e | 861 | clockevent_delta2ns(0x7fffffffffffffffUL, &sparc64_clockevent); |
7fd53424 | 862 | sparc64_clockevent.max_delta_ticks = 0x7fffffffffffffffUL; |
112f4871 DM |
863 | sparc64_clockevent.min_delta_ns = |
864 | clockevent_delta2ns(0xF, &sparc64_clockevent); | |
7fd53424 | 865 | sparc64_clockevent.min_delta_ticks = 0xF; |
112f4871 | 866 | |
7466bd3c | 867 | printk("clockevent: mult[%x] shift[%d]\n", |
112f4871 DM |
868 | sparc64_clockevent.mult, sparc64_clockevent.shift); |
869 | ||
870 | setup_sparc64_timer(); | |
1da177e4 LT |
871 | } |
872 | ||
873 | unsigned long long sched_clock(void) | |
874 | { | |
178bf2b9 PT |
875 | unsigned long quotient = tick_operations.ticks_per_nsec_quotient; |
876 | unsigned long offset = tick_operations.offset; | |
1da177e4 | 877 | |
eae3fc98 PT |
878 | /* Use barrier so the compiler emits the loads first and overlaps load |
879 | * latency with reading tick, because reading %tick/%stick is a | |
880 | * post-sync instruction that will flush and restart subsequent | |
881 | * instructions after it commits. | |
882 | */ | |
883 | barrier(); | |
884 | ||
885 | return ((get_tick() * quotient) >> SPARC64_NSEC_PER_CYC_SHIFT) - offset; | |
1da177e4 LT |
886 | } |
887 | ||
7c9503b8 | 888 | int read_current_timer(unsigned long *timer_val) |
941e492b | 889 | { |
eae3fc98 | 890 | *timer_val = get_tick(); |
941e492b AM |
891 | return 0; |
892 | } |