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83d290c5 | 1 | // SPDX-License-Identifier: GPL-2.0+ |
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2 | /* |
3 | * Copyright (C) 2017, Bin Meng <bmeng.cn@gmail.com> | |
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4 | */ |
5 | ||
6 | #include <common.h> | |
7 | #include <fdtdec.h> | |
8 | #include <asm/fsp/fsp_support.h> | |
9 | ||
10 | DECLARE_GLOBAL_DATA_PTR; | |
11 | ||
12 | /** | |
13 | * Override the FSP's Azalia configuration data | |
14 | * | |
15 | * @azalia: pointer to be updated to point to a ROM address where Azalia | |
16 | * configuration data is stored | |
17 | */ | |
18 | __weak void update_fsp_azalia_configs(struct azalia_config **azalia) | |
19 | { | |
20 | *azalia = NULL; | |
21 | } | |
22 | ||
23 | /** | |
24 | * Override the FSP's GPIO configuration data | |
25 | * | |
26 | * @family: pointer to be updated to point to a ROM address where GPIO | |
27 | * family configuration data is stored | |
28 | * @pad: pointer to be updated to point to a ROM address where GPIO | |
29 | * pad configuration data is stored | |
30 | */ | |
31 | __weak void update_fsp_gpio_configs(struct gpio_family **family, | |
32 | struct gpio_pad **pad) | |
33 | { | |
34 | *family = NULL; | |
35 | *pad = NULL; | |
36 | } | |
37 | ||
38 | /** | |
39 | * Override the FSP's configuration data. | |
40 | * If the device tree does not specify an integer setting, use the default | |
41 | * provided in Intel's Braswell release FSP/BraswellFsp.bsf file. | |
42 | */ | |
43 | void update_fsp_configs(struct fsp_config_data *config, | |
44 | struct fspinit_rtbuf *rt_buf) | |
45 | { | |
46 | struct upd_region *fsp_upd = &config->fsp_upd; | |
47 | struct memory_upd *memory_upd = &fsp_upd->memory_upd; | |
48 | struct silicon_upd *silicon_upd = &fsp_upd->silicon_upd; | |
49 | const void *blob = gd->fdt_blob; | |
50 | int node; | |
51 | ||
52 | /* Initialize runtime buffer for fsp_init() */ | |
53 | rt_buf->common.stack_top = config->common.stack_top - 32; | |
54 | rt_buf->common.boot_mode = config->common.boot_mode; | |
55 | rt_buf->common.upd_data = &config->fsp_upd; | |
56 | ||
57 | node = fdt_node_offset_by_compatible(blob, 0, "intel,braswell-fsp"); | |
58 | if (node < 0) { | |
59 | debug("%s: Cannot find FSP node\n", __func__); | |
60 | return; | |
61 | } | |
62 | ||
63 | node = fdt_node_offset_by_compatible(blob, node, | |
64 | "intel,braswell-fsp-memory"); | |
65 | if (node < 0) { | |
66 | debug("%s: Cannot find FSP memory node\n", __func__); | |
67 | return; | |
68 | } | |
69 | ||
70 | /* Override memory UPD contents */ | |
71 | memory_upd->mrc_init_tseg_size = fdtdec_get_int(blob, node, | |
72 | "fsp,mrc-init-tseg-size", MRC_INIT_TSEG_SIZE_4MB); | |
73 | memory_upd->mrc_init_mmio_size = fdtdec_get_int(blob, node, | |
74 | "fsp,mrc-init-mmio-size", MRC_INIT_MMIO_SIZE_2048MB); | |
75 | memory_upd->mrc_init_spd_addr1 = fdtdec_get_int(blob, node, | |
76 | "fsp,mrc-init-spd-addr1", 0xa0); | |
77 | memory_upd->mrc_init_spd_addr2 = fdtdec_get_int(blob, node, | |
78 | "fsp,mrc-init-spd-addr2", 0xa2); | |
79 | memory_upd->igd_dvmt50_pre_alloc = fdtdec_get_int(blob, node, | |
80 | "fsp,igd-dvmt50-pre-alloc", IGD_DVMT50_PRE_ALLOC_32MB); | |
81 | memory_upd->aperture_size = fdtdec_get_int(blob, node, | |
82 | "fsp,aperture-size", APERTURE_SIZE_256MB); | |
83 | memory_upd->gtt_size = fdtdec_get_int(blob, node, | |
84 | "fsp,gtt-size", GTT_SIZE_1MB); | |
85 | memory_upd->legacy_seg_decode = fdtdec_get_bool(blob, node, | |
86 | "fsp,legacy-seg-decode"); | |
87 | memory_upd->enable_dvfs = fdtdec_get_bool(blob, node, | |
88 | "fsp,enable-dvfs"); | |
89 | memory_upd->memory_type = fdtdec_get_int(blob, node, | |
90 | "fsp,memory-type", DRAM_TYPE_DDR3); | |
91 | memory_upd->enable_ca_mirror = fdtdec_get_bool(blob, node, | |
92 | "fsp,enable-ca-mirror"); | |
93 | ||
94 | node = fdt_node_offset_by_compatible(blob, node, | |
95 | "intel,braswell-fsp-silicon"); | |
96 | if (node < 0) { | |
97 | debug("%s: Cannot find FSP silicon node\n", __func__); | |
98 | return; | |
99 | } | |
100 | ||
101 | /* Override silicon UPD contents */ | |
102 | silicon_upd->sdcard_mode = fdtdec_get_int(blob, node, | |
103 | "fsp,sdcard-mode", SDCARD_MODE_PCI); | |
104 | silicon_upd->enable_hsuart0 = fdtdec_get_bool(blob, node, | |
105 | "fsp,enable-hsuart0"); | |
106 | silicon_upd->enable_hsuart1 = fdtdec_get_bool(blob, node, | |
107 | "fsp,enable-hsuart1"); | |
108 | silicon_upd->enable_azalia = fdtdec_get_bool(blob, node, | |
109 | "fsp,enable-azalia"); | |
110 | if (silicon_upd->enable_azalia) | |
111 | update_fsp_azalia_configs(&silicon_upd->azalia_cfg_ptr); | |
112 | silicon_upd->enable_sata = fdtdec_get_bool(blob, node, | |
113 | "fsp,enable-sata"); | |
114 | silicon_upd->enable_xhci = fdtdec_get_bool(blob, node, | |
115 | "fsp,enable-xhci"); | |
116 | silicon_upd->lpe_mode = fdtdec_get_int(blob, node, | |
117 | "fsp,lpe-mode", LPE_MODE_PCI); | |
118 | silicon_upd->enable_dma0 = fdtdec_get_bool(blob, node, | |
119 | "fsp,enable-dma0"); | |
120 | silicon_upd->enable_dma1 = fdtdec_get_bool(blob, node, | |
121 | "fsp,enable-dma1"); | |
122 | silicon_upd->enable_i2c0 = fdtdec_get_bool(blob, node, | |
123 | "fsp,enable-i2c0"); | |
124 | silicon_upd->enable_i2c1 = fdtdec_get_bool(blob, node, | |
125 | "fsp,enable-i2c1"); | |
126 | silicon_upd->enable_i2c2 = fdtdec_get_bool(blob, node, | |
127 | "fsp,enable-i2c2"); | |
128 | silicon_upd->enable_i2c3 = fdtdec_get_bool(blob, node, | |
129 | "fsp,enable-i2c3"); | |
130 | silicon_upd->enable_i2c4 = fdtdec_get_bool(blob, node, | |
131 | "fsp,enable-i2c4"); | |
132 | silicon_upd->enable_i2c5 = fdtdec_get_bool(blob, node, | |
133 | "fsp,enable-i2c5"); | |
134 | silicon_upd->enable_i2c6 = fdtdec_get_bool(blob, node, | |
135 | "fsp,enable-i2c6"); | |
136 | #ifdef CONFIG_HAVE_VBT | |
137 | silicon_upd->graphics_config_ptr = CONFIG_VBT_ADDR; | |
138 | #endif | |
139 | update_fsp_gpio_configs(&silicon_upd->gpio_familiy_ptr, | |
140 | &silicon_upd->gpio_pad_ptr); | |
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141 | /* |
142 | * For Braswell B0 stepping, disable_punit_pwr_config must be set to 1 | |
143 | * otherwise it just hangs in fsp_init(). | |
144 | */ | |
145 | if (gd->arch.x86_mask == 2) | |
146 | silicon_upd->disable_punit_pwr_config = 1; | |
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147 | silicon_upd->emmc_mode = fdtdec_get_int(blob, node, |
148 | "fsp,emmc-mode", EMMC_MODE_PCI); | |
149 | silicon_upd->sata_speed = fdtdec_get_int(blob, node, | |
150 | "fsp,sata-speed", SATA_SPEED_GEN3); | |
151 | silicon_upd->pmic_i2c_bus = fdtdec_get_int(blob, node, | |
152 | "fsp,pmic-i2c-bus", 0); | |
153 | silicon_upd->enable_isp = fdtdec_get_bool(blob, node, | |
154 | "fsp,enable-isp"); | |
155 | silicon_upd->isp_pci_dev_config = fdtdec_get_int(blob, node, | |
156 | "fsp,isp-pci-dev-config", ISP_PCI_DEV_CONFIG_2); | |
157 | silicon_upd->turbo_mode = fdtdec_get_bool(blob, node, | |
158 | "fsp,turbo-mode"); | |
159 | silicon_upd->pnp_settings = fdtdec_get_int(blob, node, | |
160 | "fsp,pnp-settings", PNP_SETTING_POWER_AND_PERF); | |
161 | silicon_upd->sd_detect_chk = fdtdec_get_bool(blob, node, | |
162 | "fsp,sd-detect-chk"); | |
163 | } |