projects / people / ms / u-boot.git / blame
| Commit | Line | Data |
|---|---|---|
| 374e78ef SG |
1 | /dts-v1/; |
| 2 | ||
| 3 | #include <dt-bindings/gpio/x86-gpio.h> | |
| 4 | ||
| 5 | /include/ "skeleton.dtsi" | |
| 6 | /include/ "keyboard.dtsi" | |
| 7 | /include/ "serial.dtsi" | |
| 8 | /include/ "rtc.dtsi" | |
| 9 | /include/ "tsc_timer.dtsi" | |
| 2d3c573e | 10 | /include/ "coreboot_fb.dtsi" |
| 374e78ef SG |
11 | |
| 12 | / { | |
| 13 | model = "Google Samus"; | |
| 14 | compatible = "google,samus", "intel,broadwell"; | |
| 15 | ||
| 16 | aliases { | |
| 17 | spi0 = &spi; | |
| 18 | usb0 = &usb_0; | |
| 19 | usb1 = &usb_1; | |
| 20 | }; | |
| 21 | ||
| 22 | config { | |
| 23 | silent_console = <0>; | |
| 24 | }; | |
| 25 | ||
| 26 | cpus { | |
| 27 | #address-cells = <1>; | |
| 28 | #size-cells = <0>; | |
| 29 | ||
| 30 | cpu@0 { | |
| 31 | device_type = "cpu"; | |
| 32 | compatible = "intel,core-i3-gen5"; | |
| 33 | reg = <0>; | |
| 34 | intel,apic-id = <0>; | |
| 35 | intel,slow-ramp = <3>; | |
| 36 | }; | |
| 37 | ||
| 38 | cpu@1 { | |
| 39 | device_type = "cpu"; | |
| 40 | compatible = "intel,core-i3-gen5"; | |
| 41 | reg = <1>; | |
| 42 | intel,apic-id = <1>; | |
| 43 | }; | |
| 44 | ||
| 45 | cpu@2 { | |
| 46 | device_type = "cpu"; | |
| 47 | compatible = "intel,core-i3-gen5"; | |
| 48 | reg = <2>; | |
| 49 | intel,apic-id = <2>; | |
| 50 | }; | |
| 51 | ||
| 52 | cpu@3 { | |
| 53 | device_type = "cpu"; | |
| 54 | compatible = "intel,core-i3-gen5"; | |
| 55 | reg = <3>; | |
| 56 | intel,apic-id = <3>; | |
| 57 | }; | |
| 58 | ||
| 59 | }; | |
| 60 | ||
| 61 | chosen { | |
| 62 | stdout-path = "/serial"; | |
| 63 | }; | |
| 64 | ||
| 65 | keyboard { | |
| 66 | intel,duplicate-por; | |
| 67 | }; | |
| 68 | ||
| 69 | pch_pinctrl { | |
| 70 | compatible = "intel,x86-broadwell-pinctrl"; | |
| 71 | u-boot,dm-pre-reloc; | |
| 72 | reg = <0 0>; | |
| 73 | ||
| 74 | /* Put this first: it is the default */ | |
| 75 | gpio_unused: gpio-unused { | |
| 76 | mode-gpio; | |
| 77 | direction = <PIN_INPUT>; | |
| 78 | owner = <OWNER_GPIO>; | |
| 79 | sense-disable; | |
| 80 | }; | |
| 81 | ||
| 82 | gpio_acpi_sci: acpi-sci { | |
| 83 | mode-gpio; | |
| 84 | direction = <PIN_INPUT>; | |
| 85 | invert; | |
| 86 | route = <ROUTE_SCI>; | |
| 87 | }; | |
| 88 | ||
| 89 | gpio_acpi_smi: acpi-smi { | |
| 90 | mode-gpio; | |
| 91 | direction = <PIN_INPUT>; | |
| 92 | invert; | |
| 93 | route = <ROUTE_SMI>; | |
| 94 | }; | |
| 95 | ||
| 96 | gpio_input: gpio-input { | |
| 97 | mode-gpio; | |
| 98 | direction = <PIN_INPUT>; | |
| 99 | owner = <OWNER_GPIO>; | |
| 100 | }; | |
| 101 | ||
| 102 | gpio_input_invert: gpio-input-invert { | |
| 103 | mode-gpio; | |
| 104 | direction = <PIN_INPUT>; | |
| 105 | owner = <OWNER_GPIO>; | |
| 106 | invert; | |
| 107 | }; | |
| 108 | ||
| 109 | gpio_native: gpio-native { | |
| 110 | }; | |
| 111 | ||
| 112 | gpio_out_high: gpio-out-high { | |
| 113 | mode-gpio; | |
| 114 | direction = <PIN_OUTPUT>; | |
| 115 | output-value = <1>; | |
| 116 | owner = <OWNER_GPIO>; | |
| 117 | sense-disable; | |
| 118 | }; | |
| 119 | ||
| 120 | gpio_out_low: gpio-out-low { | |
| 121 | mode-gpio; | |
| 122 | direction = <PIN_OUTPUT>; | |
| 123 | output-value = <0>; | |
| 124 | owner = <OWNER_GPIO>; | |
| 125 | sense-disable; | |
| 126 | }; | |
| 127 | ||
| 128 | gpio_pirq: gpio-pirq { | |
| 129 | mode-gpio; | |
| 130 | direction = <PIN_INPUT>; | |
| 131 | owner = <OWNER_GPIO>; | |
| 132 | pirq-apic = <PIRQ_APIC_ROUTE>; | |
| 133 | }; | |
| 134 | ||
| 135 | soc_gpio@0 { | |
| 136 | config = | |
| 137 | <0 &gpio_unused 0>, /* unused */ | |
| 138 | <1 &gpio_unused 0>, /* unused */ | |
| 139 | <2 &gpio_unused 0>, /* unused */ | |
| 140 | <3 &gpio_unused 0>, /* unused */ | |
| 141 | <4 &gpio_native 0>, /* native: i2c0_sda_gpio4 */ | |
| 142 | <5 &gpio_native 0>, /* native: i2c0_scl_gpio5 */ | |
| 143 | <6 &gpio_native 0>, /* native: i2c1_sda_gpio6 */ | |
| 144 | <7 &gpio_native 0>, /* native: i2c1_scl_gpio7 */ | |
| 145 | <8 &gpio_acpi_sci 0>, /* pch_lte_wake_l */ | |
| 146 | <9 &gpio_input_invert 0>, /* trackpad_int_l (wake) */ | |
| 147 | <10 &gpio_acpi_sci 0>, /* pch_wlan_wake_l */ | |
| 148 | <11 &gpio_unused 0>, /* unused */ | |
| 149 | <12 &gpio_unused 0>, /* unused */ | |
| 150 | <13 &gpio_pirq 3>, /* trackpad_int_l (pirql) */ | |
| 151 | <14 &gpio_pirq 4>, /* touch_int_l (pirqm) */ | |
| 152 | <15 &gpio_unused 0>, /* unused (strap) */ | |
| 153 | <16 &gpio_input 0>, /* pch_wp */ | |
| 154 | <17 &gpio_unused 0>, /* unused */ | |
| 155 | <18 &gpio_unused 0>, /* unused */ | |
| 156 | <19 &gpio_unused 0>, /* unused */ | |
| 157 | <20 &gpio_native 0>, /* pcie_wlan_clkreq_l */ | |
| 158 | <21 &gpio_out_high 0>, /* pp3300_ssd_en */ | |
| 159 | <22 &gpio_unused 0>, /* unused */ | |
| 160 | <23 &gpio_out_low 0>, /* pp3300_autobahn_en */ | |
| 161 | <24 &gpio_unused 0>, /* unused */ | |
| 162 | <25 &gpio_input 0>, /* ec_in_rw */ | |
| 163 | <26 &gpio_unused 0>, /* unused */ | |
| 164 | <27 &gpio_acpi_sci 0>, /* pch_wake_l */ | |
| 165 | <28 &gpio_unused 0>, /* unused */ | |
| 166 | <29 &gpio_unused 0>, /* unused */ | |
| 167 | <30 &gpio_native 0>, /* native: pch_suswarn_l */ | |
| 168 | <31 &gpio_native 0>, /* native: acok_buf */ | |
| 169 | <32 &gpio_native 0>, /* native: lpc_clkrun_l */ | |
| 170 | <33 &gpio_native 0>, /* native: ssd_devslp */ | |
| 171 | <34 &gpio_acpi_smi 0>, /* ec_smi_l */ | |
| 172 | <35 &gpio_acpi_smi 0>, /* pch_nmi_dbg_l (route in nmi_en) */ | |
| 173 | <36 &gpio_acpi_sci 0>, /* ec_sci_l */ | |
| 174 | <37 &gpio_unused 0>, /* unused */ | |
| 175 | <38 &gpio_unused 0>, /* unused */ | |
| 176 | <39 &gpio_unused 0>, /* unused */ | |
| 177 | <40 &gpio_native 0>, /* native: pch_usb1_oc_l */ | |
| 178 | <41 &gpio_native 0>, /* native: pch_usb2_oc_l */ | |
| 179 | <42 &gpio_unused 0>, /* wlan_disable_l */ | |
| 180 | <43 &gpio_out_high 0>, /* pp1800_codec_en */ | |
| 181 | <44 &gpio_unused 0>, /* unused */ | |
| 182 | <45 &gpio_acpi_sci 0>, /* dsp_int - codec wake */ | |
| 183 | <46 &gpio_pirq 6>, /* hotword_det_l_3v3 (pirqo) - codec irq */ | |
| 184 | <47 &gpio_out_low 0>, /* ssd_reset_l */ | |
| 185 | <48 &gpio_unused 0>, /* unused */ | |
| 186 | <49 &gpio_unused 0>, /* unused */ | |
| 187 | <50 &gpio_unused 0>, /* unused */ | |
| 188 | <51 &gpio_unused 0>, /* unused */ | |
| 189 | <52 &gpio_input 0>, /* sim_det */ | |
| 190 | <53 &gpio_unused 0>, /* unused */ | |
| 191 | <54 &gpio_unused 0>, /* unused */ | |
| 192 | <55 &gpio_unused 0>, /* unused */ | |
| 193 | <56 &gpio_unused 0>, /* unused */ | |
| 194 | <57 &gpio_out_high 0>, /* codec_reset_l */ | |
| 195 | <58 &gpio_unused 0>, /* unused */ | |
| 196 | <59 &gpio_out_high 0>, /* lte_disable_l */ | |
| 197 | <60 &gpio_unused 0>, /* unused */ | |
| 198 | <61 &gpio_native 0>, /* native: pch_sus_stat */ | |
| 199 | <62 &gpio_native 0>, /* native: pch_susclk */ | |
| 200 | <63 &gpio_native 0>, /* native: pch_slp_s5_l */ | |
| 201 | <64 &gpio_unused 0>, /* unused */ | |
| 202 | <65 &gpio_input 0>, /* ram_id3 */ | |
| 203 | <66 &gpio_input 0>, /* ram_id3_old (strap) */ | |
| 204 | <67 &gpio_input 0>, /* ram_id0 */ | |
| 205 | <68 &gpio_input 0>, /* ram_id1 */ | |
| 206 | <69 &gpio_input 0>, /* ram_id2 */ | |
| 207 | <70 &gpio_unused 0>, /* unused */ | |
| 208 | <71 &gpio_native 0>, /* native: modphy_en */ | |
| 209 | <72 &gpio_unused 0>, /* unused */ | |
| 210 | <73 &gpio_unused 0>, /* unused */ | |
| 211 | <74 &gpio_unused 0>, /* unused */ | |
| 212 | <75 &gpio_unused 0>, /* unused */ | |
| 213 | <76 &gpio_unused 0>, /* unused */ | |
| 214 | <77 &gpio_unused 0>, /* unused */ | |
| 215 | <78 &gpio_unused 0>, /* unused */ | |
| 216 | <79 &gpio_unused 0>, /* unused */ | |
| 217 | <80 &gpio_unused 0>, /* unused */ | |
| 218 | <81 &gpio_unused 0>, /* unused */ | |
| 219 | <82 &gpio_native 0>, /* native: ec_rcin_l */ | |
| 220 | <83 &gpio_native 0>, /* gspi0_cs */ | |
| 221 | <84 &gpio_native 0>, /* gspi0_clk */ | |
| 222 | <85 &gpio_native 0>, /* gspi0_miso */ | |
| 223 | <86 &gpio_native 0>, /* gspi0_mosi (strap) */ | |
| 224 | <87 &gpio_unused 0>, /* unused */ | |
| 225 | <88 &gpio_unused 0>, /* unused */ | |
| 226 | <89 &gpio_out_high 0>, /* pp3300_sd_en */ | |
| 227 | <90 &gpio_unused 0>, /* unused */ | |
| 228 | <91 &gpio_unused 0>, /* unused */ | |
| 229 | <92 &gpio_unused 0>, /* unused */ | |
| 230 | <93 &gpio_unused 0>, /* unused */ | |
| 231 | <94 &gpio_unused 0>; /* unused */ | |
| 232 | }; | |
| 233 | }; | |
| 234 | ||
| 235 | pci { | |
| 236 | compatible = "pci-x86"; | |
| 237 | #address-cells = <3>; | |
| 238 | #size-cells = <2>; | |
| 239 | u-boot,dm-pre-reloc; | |
| 240 | ranges = <0x02000000 0x0 0xe0000000 0xe0000000 0 0x10000000 | |
| 241 | 0x42000000 0x0 0xd0000000 0xd0000000 0 0x10000000 | |
| 242 | 0x01000000 0x0 0x1000 0x1000 0 0xefff>; | |
| 243 | ||
| 244 | northbridge@0,0 { | |
| 245 | reg = <0x00000000 0 0 0 0>; | |
| 246 | compatible = "intel,broadwell-northbridge"; | |
| 247 | board-id-gpios = <&gpio_c 5 0>, <&gpio_c 4 0>, | |
| 248 | <&gpio_c 3 0>, <&gpio_c 1 0>; | |
| 249 | u-boot,dm-pre-reloc; | |
| 250 | spd { | |
| 251 | #address-cells = <1>; | |
| 252 | #size-cells = <0>; | |
| 253 | samsung_4 { | |
| 254 | reg = <6>; | |
| 255 | data = [91 20 f1 03 04 11 05 0b | |
| 256 | 03 11 01 08 0a 00 50 01 | |
| 257 | 78 78 90 50 90 11 50 e0 | |
| 258 | 10 04 3c 3c 01 90 00 00 | |
| 259 | 00 80 00 00 00 00 00 a8 | |
| 260 | 00 00 00 00 00 00 00 00 | |
| 261 | 00 00 00 00 00 00 00 00 | |
| 262 | 00 00 00 00 0f 11 02 00 | |
| 263 | 00 00 00 00 00 00 00 00 | |
| 264 | 00 00 00 00 00 00 00 00 | |
| 265 | 00 00 00 00 00 00 00 00 | |
| 266 | 00 00 00 00 00 00 00 00 | |
| 267 | 00 00 00 00 00 00 00 00 | |
| 268 | 00 00 00 00 00 00 00 00 | |
| 269 | 00 00 00 00 00 80 ce 01 | |
| 270 | 00 00 55 00 00 00 00 00 | |
| 271 | 4b 34 45 38 45 33 30 34 | |
| 272 | 45 44 2d 45 47 43 45 20 | |
| 273 | 20 20 00 00 80 ce 00 00 | |
| 274 | 00 00 00 00 00 00 00 00 | |
| 275 | 00 00 00 00 00 00 00 00 | |
| 276 | 00 00 00 00 00 00 00 00 | |
| 277 | 00 00 00 00 00 00 00 00 | |
| 278 | 00 00 00 00 00 00 00 00 | |
| 279 | 00 00 00 00 00 00 00 00 | |
| 280 | 00 00 00 00 00 00 00 00 | |
| 281 | 00 00 00 00 00 00 00 00 | |
| 282 | 00 00 00 00 00 00 00 00 | |
| 283 | 00 00 00 00 00 00 00 00 | |
| 284 | 00 00 00 00 00 00 00 00 | |
| 285 | 00 00 00 00 00 00 00 00 | |
| 286 | 00 00 00 00 00 00 00 00]; | |
| 287 | }; | |
| 288 | hynix-h9ccnnnbltmlar-ntm-lpddr3-32 { | |
| 289 | /* | |
| 290 | * banks 8, ranks 2, rows 14, | |
| 291 | * columns 10, density 4096 mb, x32 | |
| 292 | */ | |
| 293 | reg = <8>; | |
| 294 | data = [91 20 f1 03 04 11 05 0b | |
| 295 | 03 11 01 08 0a 00 50 01 | |
| 296 | 78 78 90 50 90 11 50 e0 | |
| 297 | 10 04 3c 3c 01 90 00 00 | |
| 298 | 00 80 00 00 00 00 00 a8 | |
| 299 | 00 00 00 00 00 00 00 00 | |
| 300 | 00 00 00 00 00 00 00 00 | |
| 301 | 00 00 00 00 0f 01 02 00 | |
| 302 | 00 00 00 00 00 00 00 00 | |
| 303 | 00 00 00 00 00 00 00 00 | |
| 304 | 00 00 00 00 00 00 00 00 | |
| 305 | 00 00 00 00 00 00 00 00 | |
| 306 | 00 00 00 00 00 00 00 00 | |
| 307 | 00 00 00 00 00 00 00 00 | |
| 308 | 00 00 00 00 00 80 ad 00 | |
| 309 | 00 00 55 00 00 00 00 00 | |
| 310 | 48 39 43 43 4e 4e 4e 42 | |
| 311 | 4c 54 4d 4c 41 52 2d 4e | |
| 312 | 54 4d 00 00 80 ad 00 00 | |
| 313 | 00 00 00 00 00 00 00 00 | |
| 314 | 00 00 00 00 00 00 00 00 | |
| 315 | 00 00 00 00 00 00 00 00 | |
| 316 | 00 00 00 00 00 00 00 00 | |
| 317 | 00 00 00 00 00 00 00 00 | |
| 318 | 00 00 00 00 00 00 00 00 | |
| 319 | 00 00 00 00 00 00 00 00 | |
| 320 | 00 00 00 00 00 00 00 00 | |
| 321 | 00 00 00 00 00 00 00 00 | |
| 322 | 00 00 00 00 00 00 00 00 | |
| 323 | 00 00 00 00 00 00 00 00 | |
| 324 | 00 00 00 00 00 00 00 00 | |
| 325 | 00 00 00 00 00 00 00 00]; | |
| 326 | }; | |
| 327 | samsung_8 { | |
| 328 | reg = <10>; | |
| 329 | data = [91 20 f1 03 04 12 05 0a | |
| 330 | 03 11 01 08 0a 00 50 01 | |
| 331 | 78 78 90 50 90 11 50 e0 | |
| 332 | 10 04 3c 3c 01 90 00 00 | |
| 333 | 00 80 00 00 00 00 00 a8 | |
| 334 | 00 00 00 00 00 00 00 00 | |
| 335 | 00 00 00 00 00 00 00 00 | |
| 336 | 00 00 00 00 0f 11 02 00 | |
| 337 | 00 00 00 00 00 00 00 00 | |
| 338 | 00 00 00 00 00 00 00 00 | |
| 339 | 00 00 00 00 00 00 00 00 | |
| 340 | 00 00 00 00 00 00 00 00 | |
| 341 | 00 00 00 00 00 00 00 00 | |
| 342 | 00 00 00 00 00 00 00 00 | |
| 343 | 00 00 00 00 00 80 ce 01 | |
| 344 | 00 00 55 00 00 00 00 00 | |
| 345 | 4b 34 45 36 45 33 30 34 | |
| 346 | 45 44 2d 45 47 43 45 20 | |
| 347 | 20 20 00 00 80 ce 00 00 | |
| 348 | 00 00 00 00 00 00 00 00 | |
| 349 | 00 00 00 00 00 00 00 00 | |
| 350 | 00 00 00 00 00 00 00 00 | |
| 351 | 00 00 00 00 00 00 00 00 | |
| 352 | 00 00 00 00 00 00 00 00 | |
| 353 | 00 00 00 00 00 00 00 00 | |
| 354 | 00 00 00 00 00 00 00 00 | |
| 355 | 00 00 00 00 00 00 00 00 | |
| 356 | 00 00 00 00 00 00 00 00 | |
| 357 | 00 00 00 00 00 00 00 00 | |
| 358 | 00 00 00 00 00 00 00 00 | |
| 359 | 00 00 00 00 00 00 00 00 | |
| 360 | 00 00 00 00 00 00 00 00]; | |
| 361 | }; | |
| 362 | hynix-h9ccnnnbltmlar-ntm-lpddr3-16 { | |
| 363 | /* | |
| 364 | * banks 8, ranks 2, rows 14, | |
| 365 | * columns 11, density 4096 mb, x16 | |
| 366 | */ | |
| 367 | reg = <12>; | |
| 368 | data = [91 20 f1 03 04 12 05 0a | |
| 369 | 03 11 01 08 0a 00 50 01 | |
| 370 | 78 78 90 50 90 11 50 e0 | |
| 371 | 10 04 3c 3c 01 90 00 00 | |
| 372 | 00 80 00 00 00 00 00 a8 | |
| 373 | 00 00 00 00 00 00 00 00 | |
| 374 | 00 00 00 00 00 00 00 00 | |
| 375 | 00 00 00 00 0f 01 02 00 | |
| 376 | 00 00 00 00 00 00 00 00 | |
| 377 | 00 00 00 00 00 00 00 00 | |
| 378 | 00 00 00 00 00 00 00 00 | |
| 379 | 00 00 00 00 00 00 00 00 | |
| 380 | 00 00 00 00 00 00 00 00 | |
| 381 | 00 00 00 00 00 00 00 00 | |
| 382 | 00 00 00 00 00 80 ad 00 | |
| 383 | 00 00 55 00 00 00 00 00 | |
| 384 | 48 39 43 43 4e 4e 4e 42 | |
| 385 | 4c 54 4d 4c 41 52 2d 4e | |
| 386 | 54 4d 00 00 80 ad 00 00 | |
| 387 | 00 00 00 00 00 00 00 00 | |
| 388 | 00 00 00 00 00 00 00 00 | |
| 389 | 00 00 00 00 00 00 00 00 | |
| 390 | 00 00 00 00 00 00 00 00 | |
| 391 | 00 00 00 00 00 00 00 00 | |
| 392 | 00 00 00 00 00 00 00 00 | |
| 393 | 00 00 00 00 00 00 00 00 | |
| 394 | 00 00 00 00 00 00 00 00 | |
| 395 | 00 00 00 00 00 00 00 00 | |
| 396 | 00 00 00 00 00 00 00 00 | |
| 397 | 00 00 00 00 00 00 00 00 | |
| 398 | 00 00 00 00 00 00 00 00 | |
| 399 | 00 00 00 00 00 00 00 00]; | |
| 400 | }; | |
| 401 | hynix-h9ccnnncltmlar-lpddr3 { | |
| 402 | /* | |
| 403 | * banks 8, ranks 2, rows 15, | |
| 404 | * columns 11, density 8192 mb, x16 | |
| 405 | */ | |
| 406 | reg = <13>; | |
| 407 | data = [91 20 f1 03 05 1a 05 0a | |
| 408 | 03 11 01 08 0a 00 50 01 | |
| 409 | 78 78 90 50 90 11 50 e0 | |
| 410 | 90 06 3c 3c 01 90 00 00 | |
| 411 | 00 80 00 00 00 00 00 a8 | |
| 412 | 00 00 00 00 00 00 00 00 | |
| 413 | 00 00 00 00 00 00 00 00 | |
| 414 | 00 00 00 00 0f 01 02 00 | |
| 415 | 00 00 00 00 00 00 00 00 | |
| 416 | 00 00 00 00 00 00 00 00 | |
| 417 | 00 00 00 00 00 00 00 00 | |
| 418 | 00 00 00 00 00 00 00 00 | |
| 419 | 00 00 00 00 00 00 00 00 | |
| 420 | 00 00 00 00 00 00 00 00 | |
| 421 | 00 00 00 00 00 80 ad 00 | |
| 422 | 00 00 55 00 00 00 00 00 | |
| 423 | 48 39 43 43 4e 4e 4e 43 | |
| 424 | 4c 54 4d 4c 41 52 00 00 | |
| 425 | 00 00 00 00 80 ad 00 00 | |
| 426 | 00 00 00 00 00 00 00 00 | |
| 427 | 00 00 00 00 00 00 00 00 | |
| 428 | 00 00 00 00 00 00 00 00 | |
| 429 | 00 00 00 00 00 00 00 00 | |
| 430 | 00 00 00 00 00 00 00 00 | |
| 431 | 00 00 00 00 00 00 00 00 | |
| 432 | 00 00 00 00 00 00 00 00 | |
| 433 | 00 00 00 00 00 00 00 00 | |
| 434 | 00 00 00 00 00 00 00 00 | |
| 435 | 00 00 00 00 00 00 00 00 | |
| 436 | 00 00 00 00 00 00 00 00 | |
| 437 | 00 00 00 00 00 00 00 00 | |
| 438 | 00 00 00 00 00 00 00 00]; | |
| 439 | }; | |
| 440 | elpida-edfb232a1ma { | |
| 441 | /* | |
| 442 | * banks 8, ranks 2, rows 15, | |
| 443 | * columns 11, density 8192 mb, x16 | |
| 444 | */ | |
| 445 | reg = <15>; | |
| 446 | data = [91 20 f1 03 05 1a 05 0a | |
| 447 | 03 11 01 08 0a 00 50 01 | |
| 448 | 78 78 90 50 90 11 50 e0 | |
| 449 | 90 06 3c 3c 01 90 00 00 | |
| 450 | 00 80 00 00 00 00 00 a8 | |
| 451 | 00 00 00 00 00 00 00 00 | |
| 452 | 00 00 00 00 00 00 00 00 | |
| 453 | 00 00 00 00 0f 01 02 00 | |
| 454 | 00 00 00 00 00 00 00 00 | |
| 455 | 00 00 00 00 00 00 00 00 | |
| 456 | 00 00 00 00 00 00 00 00 | |
| 457 | 00 00 00 00 00 00 00 00 | |
| 458 | 00 00 00 00 00 00 00 00 | |
| 459 | 00 00 00 00 00 00 00 00 | |
| 460 | 00 00 00 00 00 02 fe 00 | |
| 461 | 00 00 00 00 00 00 00 00 | |
| 462 | 45 44 46 42 32 33 32 41 | |
| 463 | 31 4d 41 2d 47 44 2d 46 | |
| 464 | 00 00 00 00 02 fe 00 00 | |
| 465 | 00 00 00 00 00 00 00 00 | |
| 466 | 00 00 00 00 00 00 00 00 | |
| 467 | 00 00 00 00 00 00 00 00 | |
| 468 | 00 00 00 00 00 00 00 00 | |
| 469 | 00 00 00 00 00 00 00 00 | |
| 470 | 00 00 00 00 00 00 00 00 | |
| 471 | 00 00 00 00 00 00 00 00 | |
| 472 | 00 00 00 00 00 00 00 00 | |
| 473 | 00 00 00 00 00 00 00 00 | |
| 474 | 00 00 00 00 00 00 00 00 | |
| 475 | 00 00 00 00 00 00 00 00 | |
| 476 | 00 00 00 00 00 00 00 00 | |
| 477 | 00 00 00 00 00 00 00 00]; | |
| 478 | }; | |
| 479 | }; | |
| 480 | }; | |
| 481 | ||
| 482 | gma@2,0 { | |
| 483 | reg = <0x00001000 0 0 0 0>; | |
| 484 | compatible = "intel,broadwell-igd"; | |
| 485 | intel,dp-hotplug = <6 6 6>; | |
| 486 | intel,port-select = <1>; /* eDP */ | |
| 487 | intel,power-cycle-delay = <6>; | |
| 488 | intel,power-up-delay = <2000>; | |
| 489 | intel,power-down-delay = <500>; | |
| 490 | intel,power-backlight-on-delay = <2000>; | |
| 491 | intel,power-backlight-off-delay = <2000>; | |
| 492 | intel,cpu-backlight = <0x00000200>; | |
| 493 | intel,pch-backlight = <0x04000200>; | |
| 494 | intel,pre-graphics-delay = <200>; | |
| 495 | }; | |
| 496 | ||
| 497 | me@16,0 { | |
| 498 | reg = <0x0000b000 0 0 0 0>; | |
| 499 | compatible = "intel,me"; | |
| 500 | u-boot,dm-pre-reloc; | |
| 501 | }; | |
| 502 | ||
| 503 | usb_1: usb@14,0 { | |
| 504 | reg = <0x0000a000 0 0 0 0>; | |
| 505 | compatible = "xhci-pci"; | |
| 506 | }; | |
| 507 | ||
| 508 | usb_0: usb@1d,0 { | |
| 509 | status = "disabled"; | |
| 510 | reg = <0x0000e800 0 0 0 0>; | |
| 511 | compatible = "ehci-pci"; | |
| 512 | }; | |
| 513 | ||
| 514 | pch@1f,0 { | |
| 515 | reg = <0x0000f800 0 0 0 0>; | |
| 516 | compatible = "intel,broadwell-pch"; | |
| 517 | u-boot,dm-pre-reloc; | |
| 518 | #address-cells = <1>; | |
| 519 | #size-cells = <1>; | |
| 520 | intel,pirq-routing = <0x8b 0x8a 0x8b 0x8b | |
| 521 | 0x80 0x80 0x80 0x80>; | |
| 522 | intel,gpi-routing = <0 0 0 0 0 0 0 2 | |
| 523 | 1 0 0 0 0 0 0 0>; | |
| 524 | /* Enable EC SMI source */ | |
| 525 | intel,alt-gp-smi-enable = <0x0040>; | |
| 526 | ||
| 527 | /* EC-SCI is GPIO36 */ | |
| 528 | intel,gpe0-en = <0 0x10 0 0>; | |
| 529 | ||
| 530 | power-enable-gpio = <&gpio_a 23 0>; | |
| 531 | ||
| 532 | spi: spi { | |
| 533 | #address-cells = <1>; | |
| 534 | #size-cells = <0>; | |
| 535 | compatible = "intel,ich9-spi"; | |
| 536 | spi-flash@0 { | |
| 537 | #size-cells = <1>; | |
| 538 | #address-cells = <1>; | |
| 539 | reg = <0>; | |
| 540 | compatible = "winbond,w25q64", | |
| 541 | "spi-flash"; | |
| 542 | memory-map = <0xff800000 0x00800000>; | |
| 543 | rw-mrc-cache { | |
| 544 | label = "rw-mrc-cache"; | |
| 545 | reg = <0x003e0000 0x00010000>; | |
| 546 | }; | |
| 547 | }; | |
| 548 | }; | |
| 549 | ||
| 550 | gpio_a: gpioa { | |
| 551 | compatible = "intel,broadwell-gpio"; | |
| 552 | u-boot,dm-pre-reloc; | |
| 553 | #gpio-cells = <2>; | |
| 554 | gpio-controller; | |
| 555 | reg = <0 0>; | |
| 556 | bank-name = "A"; | |
| 557 | }; | |
| 558 | ||
| 559 | gpio_b: gpiob { | |
| 560 | compatible = "intel,broadwell-gpio"; | |
| 561 | u-boot,dm-pre-reloc; | |
| 562 | #gpio-cells = <2>; | |
| 563 | gpio-controller; | |
| 564 | reg = <1 0>; | |
| 565 | bank-name = "B"; | |
| 566 | }; | |
| 567 | ||
| 568 | gpio_c: gpioc { | |
| 569 | compatible = "intel,broadwell-gpio"; | |
| 570 | u-boot,dm-pre-reloc; | |
| 571 | #gpio-cells = <2>; | |
| 572 | gpio-controller; | |
| 573 | reg = <2 0>; | |
| 574 | bank-name = "C"; | |
| 575 | }; | |
| 576 | ||
| 577 | lpc { | |
| 578 | compatible = "intel,broadwell-lpc"; | |
| 579 | #address-cells = <1>; | |
| 580 | #size-cells = <0>; | |
| 581 | u-boot,dm-pre-reloc; | |
| 582 | intel,gen-dec = <0x800 0xfc 0x900 0xfc>; | |
| 583 | cros-ec@200 { | |
| 584 | compatible = "google,cros-ec-lpc"; | |
| 585 | reg = <0x204 1 0x200 1 0x880 0x80>; | |
| 586 | ||
| 587 | /* | |
| 588 | * Describes the flash memory within | |
| 589 | * the EC | |
| 590 | */ | |
| 591 | #address-cells = <1>; | |
| 592 | #size-cells = <1>; | |
| 593 | flash@8000000 { | |
| 594 | reg = <0x08000000 0x20000>; | |
| 595 | erase-value = <0xff>; | |
| 596 | }; | |
| 597 | }; | |
| 598 | }; | |
| 599 | }; | |
| 600 | ||
| 601 | sata@1f,2 { | |
| 602 | compatible = "intel,wildcatpoint-ahci"; | |
| 603 | reg = <0x0000fa00 0 0 0 0>; | |
| 604 | u-boot,dm-pre-reloc; | |
| 605 | intel,sata-mode = "ahci"; | |
| 606 | intel,sata-port-map = <1>; | |
| 607 | intel,sata-port0-gen3-tx = <0x72>; | |
| 608 | reset-gpio = <&gpio_b 15 GPIO_ACTIVE_LOW>; | |
| 609 | }; | |
| 610 | ||
| 611 | smbus: smbus@1f,3 { | |
| 612 | compatible = "intel,ich-i2c"; | |
| 613 | reg = <0x0000fb00 0 0 0 0>; | |
| 614 | u-boot,dm-pre-reloc; | |
| 615 | }; | |
| 616 | }; | |
| 617 | ||
| 618 | tpm { | |
| 619 | reg = <0xfed40000 0x5000>; | |
| 620 | compatible = "infineon,slb9635lpc"; | |
| 621 | }; | |
| 622 | ||
| 623 | microcode { | |
| 624 | update@0 { | |
| 625 | #include "microcode/mc0306d4_00000018.dtsi" | |
| 626 | }; | |
| 627 | }; | |
| 628 | ||
| 629 | }; |