projects / people / ms / u-boot.git / blame
| Commit | Line | Data |
|---|---|---|
| 752a0b08 BM |
1 | /* |
| 2 | * Copyright (C) 2013, Intel Corporation | |
| 3 | * Copyright (C) 2014, Bin Meng <bmeng.cn@gmail.com> | |
| 4 | * | |
| 5 | * This file is automatically generated. Please do NOT modify !!! | |
| 6 | * | |
| 7 | * SPDX-License-Identifier: Intel | |
| 8 | */ | |
| 9 | ||
| 10 | #ifndef __VPDHEADER_H__ | |
| 11 | #define __VPDHEADER_H__ | |
| 12 | ||
| 255fd5ca | 13 | struct __packed upd_region { |
| 752a0b08 BM |
14 | u64 sign; /* Offset 0x0000 */ |
| 15 | u64 reserved; /* Offset 0x0008 */ | |
| 16 | u8 dummy[240]; /* Offset 0x0010 */ | |
| 17 | u8 hda_verb_header[12]; /* Offset 0x0100 */ | |
| 18 | u32 hda_verb_length; /* Offset 0x010C */ | |
| 19 | u8 hda_verb_data0[16]; /* Offset 0x0110 */ | |
| 20 | u8 hda_verb_data1[16]; /* Offset 0x0120 */ | |
| 21 | u8 hda_verb_data2[16]; /* Offset 0x0130 */ | |
| 22 | u8 hda_verb_data3[16]; /* Offset 0x0140 */ | |
| 23 | u8 hda_verb_data4[16]; /* Offset 0x0150 */ | |
| 24 | u8 hda_verb_data5[16]; /* Offset 0x0160 */ | |
| 25 | u8 hda_verb_data6[16]; /* Offset 0x0170 */ | |
| 26 | u8 hda_verb_data7[16]; /* Offset 0x0180 */ | |
| 27 | u8 hda_verb_data8[16]; /* Offset 0x0190 */ | |
| 28 | u8 hda_verb_data9[16]; /* Offset 0x01A0 */ | |
| 29 | u8 hda_verb_data10[16]; /* Offset 0x01B0 */ | |
| 30 | u8 hda_verb_data11[16]; /* Offset 0x01C0 */ | |
| 31 | u8 hda_verb_data12[16]; /* Offset 0x01D0 */ | |
| 32 | u8 hda_verb_data13[16]; /* Offset 0x01E0 */ | |
| 33 | u8 hda_verb_pad[47]; /* Offset 0x01F0 */ | |
| 34 | u16 terminator; /* Offset 0x021F */ | |
| 35 | }; | |
| 36 | ||
| 37 | #define VPD_IMAGE_ID 0x445056574F4E4E4D /* 'MNNOWVPD' */ | |
| 38 | #define VPD_IMAGE_REV 0x00000301 | |
| 39 | ||
| 255fd5ca | 40 | struct __packed vpd_region { |
| 752a0b08 BM |
41 | u64 sign; /* Offset 0x0000 */ |
| 42 | u32 img_rev; /* Offset 0x0008 */ | |
| 43 | u32 upd_offset; /* Offset 0x000C */ | |
| 44 | u8 unused[16]; /* Offset 0x0010 */ | |
| 45 | u32 fsp_res_memlen; /* Offset 0x0020 */ | |
| 46 | u8 disable_pcie1; /* Offset 0x0024 */ | |
| 47 | u8 disable_pcie2; /* Offset 0x0025 */ | |
| 48 | u8 disable_pcie3; /* Offset 0x0026 */ | |
| 49 | u8 enable_azalia; /* Offset 0x0027 */ | |
| 50 | u8 legacy_seg_decode; /* Offset 0x0028 */ | |
| 51 | u8 pcie_port_ioh; /* Offset 0x0029 */ | |
| 52 | }; | |
| 53 | ||
| 752a0b08 | 54 | #endif |