[thirdparty/kernel/linux.git] / arch / x86 / include / asm / mshyperv.h

/* SPDX-License-Identifier: GPL-2.0 */
#ifndef _ASM_X86_MSHYPER_H
#define _ASM_X86_MSHYPER_H

#include <linux/types.h>
#include <linux/nmi.h>
#include <linux/msi.h>
#include <linux/io.h>
#include <asm/hyperv-tlfs.h>
#include <asm/nospec-branch.h>
#include <asm/paravirt.h>
#include <asm/mshyperv.h>

/*
 * Hyper-V always provides a single IO-APIC at this MMIO address.
 * Ideally, the value should be looked up in ACPI tables, but it
 * is needed for mapping the IO-APIC early in boot on Confidential
 * VMs, before ACPI functions can be used.
 */
#define HV_IOAPIC_BASE_ADDRESS 0xfec00000

#define HV_VTL_NORMAL 0x0
#define HV_VTL_SECURE 0x1
#define HV_VTL_MGMT   0x2

union hv_ghcb;

DECLARE_STATIC_KEY_FALSE(isolation_type_snp);
DECLARE_STATIC_KEY_FALSE(isolation_type_tdx);

typedef int (*hyperv_fill_flush_list_func)(
		struct hv_guest_mapping_flush_list *flush,
		void *data);

void hyperv_vector_handler(struct pt_regs *regs);

static inline unsigned char hv_get_nmi_reason(void)
{
	return 0;
}

#if IS_ENABLED(CONFIG_HYPERV)
extern int hyperv_init_cpuhp;
extern bool hyperv_paravisor_present;

extern void *hv_hypercall_pg;

extern u64 hv_current_partition_id;

extern union hv_ghcb * __percpu *hv_ghcb_pg;

bool hv_isolation_type_snp(void);
bool hv_isolation_type_tdx(void);
u64 hv_tdx_hypercall(u64 control, u64 param1, u64 param2);

/*
 * DEFAULT INIT GPAT and SEGMENT LIMIT value in struct VMSA
 * to start AP in enlightened SEV guest.
 */
#define HV_AP_INIT_GPAT_DEFAULT		0x0007040600070406ULL
#define HV_AP_SEGMENT_LIMIT		0xffffffff

int hv_call_deposit_pages(int node, u64 partition_id, u32 num_pages);
int hv_call_add_logical_proc(int node, u32 lp_index, u32 acpi_id);
int hv_call_create_vp(int node, u64 partition_id, u32 vp_index, u32 flags);

/*
 * If the hypercall involves no input or output parameters, the hypervisor
 * ignores the corresponding GPA pointer.
 */
static inline u64 hv_do_hypercall(u64 control, void *input, void *output)
{
	u64 input_address = input ? virt_to_phys(input) : 0;
	u64 output_address = output ? virt_to_phys(output) : 0;
	u64 hv_status;

#ifdef CONFIG_X86_64
	if (hv_isolation_type_tdx() && !hyperv_paravisor_present)
		return hv_tdx_hypercall(control, input_address, output_address);

	if (hv_isolation_type_snp() && !hyperv_paravisor_present) {
		__asm__ __volatile__("mov %4, %%r8\n"
				     "vmmcall"
				     : "=a" (hv_status), ASM_CALL_CONSTRAINT,
				       "+c" (control), "+d" (input_address)
				     :  "r" (output_address)
				     : "cc", "memory", "r8", "r9", "r10", "r11");
		return hv_status;
	}

	if (!hv_hypercall_pg)
		return U64_MAX;

	__asm__ __volatile__("mov %4, %%r8\n"
			     CALL_NOSPEC
			     : "=a" (hv_status), ASM_CALL_CONSTRAINT,
			       "+c" (control), "+d" (input_address)
			     :  "r" (output_address),
				THUNK_TARGET(hv_hypercall_pg)
			     : "cc", "memory", "r8", "r9", "r10", "r11");
#else
	u32 input_address_hi = upper_32_bits(input_address);
	u32 input_address_lo = lower_32_bits(input_address);
	u32 output_address_hi = upper_32_bits(output_address);
	u32 output_address_lo = lower_32_bits(output_address);

	if (!hv_hypercall_pg)
		return U64_MAX;

	__asm__ __volatile__(CALL_NOSPEC
			     : "=A" (hv_status),
			       "+c" (input_address_lo), ASM_CALL_CONSTRAINT
			     : "A" (control),
			       "b" (input_address_hi),
			       "D"(output_address_hi), "S"(output_address_lo),
			       THUNK_TARGET(hv_hypercall_pg)
			     : "cc", "memory");
#endif /* !x86_64 */
	return hv_status;
}

/* Hypercall to the L0 hypervisor */
static inline u64 hv_do_nested_hypercall(u64 control, void *input, void *output)
{
	return hv_do_hypercall(control | HV_HYPERCALL_NESTED, input, output);
}

/* Fast hypercall with 8 bytes of input and no output */
static inline u64 _hv_do_fast_hypercall8(u64 control, u64 input1)
{
	u64 hv_status;

#ifdef CONFIG_X86_64
	if (hv_isolation_type_tdx() && !hyperv_paravisor_present)
		return hv_tdx_hypercall(control, input1, 0);

	if (hv_isolation_type_snp() && !hyperv_paravisor_present) {
		__asm__ __volatile__(
				"vmmcall"
				: "=a" (hv_status), ASM_CALL_CONSTRAINT,
				"+c" (control), "+d" (input1)
				:: "cc", "r8", "r9", "r10", "r11");
	} else {
		__asm__ __volatile__(CALL_NOSPEC
				     : "=a" (hv_status), ASM_CALL_CONSTRAINT,
				       "+c" (control), "+d" (input1)
				     : THUNK_TARGET(hv_hypercall_pg)
				     : "cc", "r8", "r9", "r10", "r11");
	}
#else
	{
		u32 input1_hi = upper_32_bits(input1);
		u32 input1_lo = lower_32_bits(input1);

		__asm__ __volatile__ (CALL_NOSPEC
				      : "=A"(hv_status),
					"+c"(input1_lo),
					ASM_CALL_CONSTRAINT
				      :	"A" (control),
					"b" (input1_hi),
					THUNK_TARGET(hv_hypercall_pg)
				      : "cc", "edi", "esi");
	}
#endif
		return hv_status;
}

static inline u64 hv_do_fast_hypercall8(u16 code, u64 input1)
{
	u64 control = (u64)code | HV_HYPERCALL_FAST_BIT;

	return _hv_do_fast_hypercall8(control, input1);
}

static inline u64 hv_do_fast_nested_hypercall8(u16 code, u64 input1)
{
	u64 control = (u64)code | HV_HYPERCALL_FAST_BIT | HV_HYPERCALL_NESTED;

	return _hv_do_fast_hypercall8(control, input1);
}

/* Fast hypercall with 16 bytes of input */
static inline u64 _hv_do_fast_hypercall16(u64 control, u64 input1, u64 input2)
{
	u64 hv_status;

#ifdef CONFIG_X86_64
	if (hv_isolation_type_tdx() && !hyperv_paravisor_present)
		return hv_tdx_hypercall(control, input1, input2);

	if (hv_isolation_type_snp() && !hyperv_paravisor_present) {
		__asm__ __volatile__("mov %4, %%r8\n"
				     "vmmcall"
				     : "=a" (hv_status), ASM_CALL_CONSTRAINT,
				       "+c" (control), "+d" (input1)
				     : "r" (input2)
				     : "cc", "r8", "r9", "r10", "r11");
	} else {
		__asm__ __volatile__("mov %4, %%r8\n"
				     CALL_NOSPEC
				     : "=a" (hv_status), ASM_CALL_CONSTRAINT,
				       "+c" (control), "+d" (input1)
				     : "r" (input2),
				       THUNK_TARGET(hv_hypercall_pg)
				     : "cc", "r8", "r9", "r10", "r11");
	}
#else
	{
		u32 input1_hi = upper_32_bits(input1);
		u32 input1_lo = lower_32_bits(input1);
		u32 input2_hi = upper_32_bits(input2);
		u32 input2_lo = lower_32_bits(input2);

		__asm__ __volatile__ (CALL_NOSPEC
				      : "=A"(hv_status),
					"+c"(input1_lo), ASM_CALL_CONSTRAINT
				      :	"A" (control), "b" (input1_hi),
					"D"(input2_hi), "S"(input2_lo),
					THUNK_TARGET(hv_hypercall_pg)
				      : "cc");
	}
#endif
	return hv_status;
}

static inline u64 hv_do_fast_hypercall16(u16 code, u64 input1, u64 input2)
{
	u64 control = (u64)code | HV_HYPERCALL_FAST_BIT;

	return _hv_do_fast_hypercall16(control, input1, input2);
}

static inline u64 hv_do_fast_nested_hypercall16(u16 code, u64 input1, u64 input2)
{
	u64 control = (u64)code | HV_HYPERCALL_FAST_BIT | HV_HYPERCALL_NESTED;

	return _hv_do_fast_hypercall16(control, input1, input2);
}

extern struct hv_vp_assist_page **hv_vp_assist_page;

static inline struct hv_vp_assist_page *hv_get_vp_assist_page(unsigned int cpu)
{
	if (!hv_vp_assist_page)
		return NULL;

	return hv_vp_assist_page[cpu];
}

void __init hyperv_init(void);
void hyperv_setup_mmu_ops(void);
void set_hv_tscchange_cb(void (*cb)(void));
void clear_hv_tscchange_cb(void);
void hyperv_stop_tsc_emulation(void);
int hyperv_flush_guest_mapping(u64 as);
int hyperv_flush_guest_mapping_range(u64 as,
		hyperv_fill_flush_list_func fill_func, void *data);
int hyperv_fill_flush_guest_mapping_list(
		struct hv_guest_mapping_flush_list *flush,
		u64 start_gfn, u64 end_gfn);

#ifdef CONFIG_X86_64
void hv_apic_init(void);
void __init hv_init_spinlocks(void);
bool hv_vcpu_is_preempted(int vcpu);
#else
static inline void hv_apic_init(void) {}
#endif

struct irq_domain *hv_create_pci_msi_domain(void);

int hv_map_ioapic_interrupt(int ioapic_id, bool level, int vcpu, int vector,
		struct hv_interrupt_entry *entry);
int hv_unmap_ioapic_interrupt(int ioapic_id, struct hv_interrupt_entry *entry);

#ifdef CONFIG_AMD_MEM_ENCRYPT
bool hv_ghcb_negotiate_protocol(void);
void __noreturn hv_ghcb_terminate(unsigned int set, unsigned int reason);
int hv_snp_boot_ap(u32 cpu, unsigned long start_ip);
#else
static inline bool hv_ghcb_negotiate_protocol(void) { return false; }
static inline void hv_ghcb_terminate(unsigned int set, unsigned int reason) {}
static inline int hv_snp_boot_ap(u32 cpu, unsigned long start_ip) { return 0; }
#endif

#if defined(CONFIG_AMD_MEM_ENCRYPT) || defined(CONFIG_INTEL_TDX_GUEST)
void hv_vtom_init(void);
void hv_ivm_msr_write(u64 msr, u64 value);
void hv_ivm_msr_read(u64 msr, u64 *value);
#else
static inline void hv_vtom_init(void) {}
static inline void hv_ivm_msr_write(u64 msr, u64 value) {}
static inline void hv_ivm_msr_read(u64 msr, u64 *value) {}
#endif

static inline bool hv_is_synic_msr(unsigned int reg)
{
	return (reg >= HV_X64_MSR_SCONTROL) &&
	       (reg <= HV_X64_MSR_SINT15);
}

static inline bool hv_is_sint_msr(unsigned int reg)
{
	return (reg >= HV_X64_MSR_SINT0) &&
	       (reg <= HV_X64_MSR_SINT15);
}

u64 hv_get_msr(unsigned int reg);
void hv_set_msr(unsigned int reg, u64 value);
u64 hv_get_non_nested_msr(unsigned int reg);
void hv_set_non_nested_msr(unsigned int reg, u64 value);

static __always_inline u64 hv_raw_get_msr(unsigned int reg)
{
	return __rdmsr(reg);
}

#else /* CONFIG_HYPERV */
static inline void hyperv_init(void) {}
static inline void hyperv_setup_mmu_ops(void) {}
static inline void set_hv_tscchange_cb(void (*cb)(void)) {}
static inline void clear_hv_tscchange_cb(void) {}
static inline void hyperv_stop_tsc_emulation(void) {};
static inline struct hv_vp_assist_page *hv_get_vp_assist_page(unsigned int cpu)
{
	return NULL;
}
static inline int hyperv_flush_guest_mapping(u64 as) { return -1; }
static inline int hyperv_flush_guest_mapping_range(u64 as,
		hyperv_fill_flush_list_func fill_func, void *data)
{
	return -1;
}
static inline void hv_set_msr(unsigned int reg, u64 value) { }
static inline u64 hv_get_msr(unsigned int reg) { return 0; }
static inline void hv_set_non_nested_msr(unsigned int reg, u64 value) { }
static inline u64 hv_get_non_nested_msr(unsigned int reg) { return 0; }
#endif /* CONFIG_HYPERV */


#ifdef CONFIG_HYPERV_VTL_MODE
void __init hv_vtl_init_platform(void);
int __init hv_vtl_early_init(void);
#else
static inline void __init hv_vtl_init_platform(void) {}
static inline int __init hv_vtl_early_init(void) { return 0; }
#endif

#include <asm-generic/mshyperv.h>

#endif
Commit	Line	Data
b2441318	1	/* SPDX-License-Identifier: GPL-2.0 */
e08cae41 PA	2	#ifndef _ASM_X86_MSHYPER_H
e08cae41 PA	3	#define _ASM_X86_MSHYPER_H
a2a47c6c	4
e08cae41	5	#include <linux/types.h>
806c8927	6	#include <linux/nmi.h>
1cf106d9	7	#include <linux/msi.h>
060f2b97	8	#include <linux/io.h>
5a485803	9	#include <asm/hyperv-tlfs.h>
e70e5892	10	#include <asm/nospec-branch.h>
b9d8cf2e	11	#include <asm/paravirt.h>
753ed9c9	12	#include <asm/mshyperv.h>
e08cae41	13
812b0597 MK	14	/*
	15	* Hyper-V always provides a single IO-APIC at this MMIO address.
	16	* Ideally, the value should be looked up in ACPI tables, but it
	17	* is needed for mapping the IO-APIC early in boot on Confidential
	18	* VMs, before ACPI functions can be used.
	19	*/
	20	#define HV_IOAPIC_BASE_ADDRESS 0xfec00000
	21
3be1bc2f SS	22	#define HV_VTL_NORMAL 0x0
	23	#define HV_VTL_SECURE 0x1
	24	#define HV_VTL_MGMT 0x2
	25
faff4406 TL	26	union hv_ghcb;
faff4406 TL	27
0cc4f6d9	28	DECLARE_STATIC_KEY_FALSE(isolation_type_snp);
08e9d120	29	DECLARE_STATIC_KEY_FALSE(isolation_type_tdx);
0cc4f6d9	30
cc4edae4 LT	31	typedef int (*hyperv_fill_flush_list_func)(
	32	struct hv_guest_mapping_flush_list *flush,
	33	void *data);
	34
bc2b0331	35	void hyperv_vector_handler(struct pt_regs *regs);
8730046c	36
0a7a0058 SS	37	static inline unsigned char hv_get_nmi_reason(void)
	38	{
	39	return 0;
	40	}
	41
8730046c	42	#if IS_ENABLED(CONFIG_HYPERV)
dfe94d40	43	extern int hyperv_init_cpuhp;
d3a9d7e4	44	extern bool hyperv_paravisor_present;
dfe94d40	45
fc53662f VK	46	extern void *hv_hypercall_pg;
fc53662f VK	47
99a0f46a WL	48	extern u64 hv_current_partition_id;
99a0f46a WL	49
e1878402	50	extern union hv_ghcb * __percpu *hv_ghcb_pg;
0cc4f6d9	51
e3131f1c	52	bool hv_isolation_type_snp(void);
08e9d120	53	bool hv_isolation_type_tdx(void);
d6e0228d	54	u64 hv_tdx_hypercall(u64 control, u64 param1, u64 param2);
08e9d120	55
44676bb9 TL	56	/*
	57	* DEFAULT INIT GPAT and SEGMENT LIMIT value in struct VMSA
	58	* to start AP in enlightened SEV guest.
	59	*/
	60	#define HV_AP_INIT_GPAT_DEFAULT 0x0007040600070406ULL
	61	#define HV_AP_SEGMENT_LIMIT 0xffffffff
48b1f683	62
86b5ec35 WL	63	int hv_call_deposit_pages(int node, u64 partition_id, u32 num_pages);
	64	int hv_call_add_logical_proc(int node, u32 lp_index, u32 acpi_id);
	65	int hv_call_create_vp(int node, u64 partition_id, u32 vp_index, u32 flags);
	66
d6e0228d DC	67	/*
	68	* If the hypercall involves no input or output parameters, the hypervisor
	69	* ignores the corresponding GPA pointer.
	70	*/
fc53662f VK	71	static inline u64 hv_do_hypercall(u64 control, void input, void output)
	72	{
	73	u64 input_address = input ? virt_to_phys(input) : 0;
	74	u64 output_address = output ? virt_to_phys(output) : 0;
	75	u64 hv_status;
fc53662f VK	76
fc53662f VK	77	#ifdef CONFIG_X86_64
d3a9d7e4	78	if (hv_isolation_type_tdx() && !hyperv_paravisor_present)
d6e0228d DC	79	return hv_tdx_hypercall(control, input_address, output_address);
d6e0228d DC	80
e3131f1c	81	if (hv_isolation_type_snp() && !hyperv_paravisor_present) {
48b1f683 TL	82	__asm__ __volatile__("mov %4, %%r8\n"
	83	"vmmcall"
	84	: "=a" (hv_status), ASM_CALL_CONSTRAINT,
	85	"+c" (control), "+d" (input_address)
	86	: "r" (output_address)
	87	: "cc", "memory", "r8", "r9", "r10", "r11");
	88	return hv_status;
	89	}
	90
fc53662f VK	91	if (!hv_hypercall_pg)
	92	return U64_MAX;
	93
	94	__asm__ __volatile__("mov %4, %%r8\n"
e70e5892	95	CALL_NOSPEC
f5caf621	96	: "=a" (hv_status), ASM_CALL_CONSTRAINT,
fc53662f	97	"+c" (control), "+d" (input_address)
e70e5892 DW	98	: "r" (output_address),
e70e5892 DW	99	THUNK_TARGET(hv_hypercall_pg)
fc53662f VK	100	: "cc", "memory", "r8", "r9", "r10", "r11");
	101	#else
	102	u32 input_address_hi = upper_32_bits(input_address);
	103	u32 input_address_lo = lower_32_bits(input_address);
	104	u32 output_address_hi = upper_32_bits(output_address);
	105	u32 output_address_lo = lower_32_bits(output_address);
	106
	107	if (!hv_hypercall_pg)
	108	return U64_MAX;
	109
e70e5892	110	__asm__ __volatile__(CALL_NOSPEC
fc53662f	111	: "=A" (hv_status),
f5caf621	112	"+c" (input_address_lo), ASM_CALL_CONSTRAINT
fc53662f VK	113	: "A" (control),
	114	"b" (input_address_hi),
	115	"D"(output_address_hi), "S"(output_address_lo),
e70e5892	116	THUNK_TARGET(hv_hypercall_pg)
fc53662f VK	117	: "cc", "memory");
	118	#endif /* !x86_64 */
	119	return hv_status;
	120	}
dee863b5	121
f0d2f5c2 JJ	122	/* Hypercall to the L0 hypervisor */
	123	static inline u64 hv_do_nested_hypercall(u64 control, void input, void output)
	124	{
	125	return hv_do_hypercall(control \| HV_HYPERCALL_NESTED, input, output);
	126	}
	127
6a8edbd0	128	/* Fast hypercall with 8 bytes of input and no output */
f0d2f5c2	129	static inline u64 _hv_do_fast_hypercall8(u64 control, u64 input1)
6a8edbd0	130	{
f0d2f5c2	131	u64 hv_status;
6a8edbd0 VK	132
6a8edbd0 VK	133	#ifdef CONFIG_X86_64
d3a9d7e4	134	if (hv_isolation_type_tdx() && !hyperv_paravisor_present)
d6e0228d DC	135	return hv_tdx_hypercall(control, input1, 0);
d6e0228d DC	136
e3131f1c	137	if (hv_isolation_type_snp() && !hyperv_paravisor_present) {
48b1f683 TL	138	__asm__ __volatile__(
	139	"vmmcall"
	140	: "=a" (hv_status), ASM_CALL_CONSTRAINT,
	141	"+c" (control), "+d" (input1)
	142	:: "cc", "r8", "r9", "r10", "r11");
	143	} else {
e70e5892	144	__asm__ __volatile__(CALL_NOSPEC
f5caf621	145	: "=a" (hv_status), ASM_CALL_CONSTRAINT,
6a8edbd0	146	"+c" (control), "+d" (input1)
e70e5892	147	: THUNK_TARGET(hv_hypercall_pg)
6a8edbd0 VK	148	: "cc", "r8", "r9", "r10", "r11");
	149	}
	150	#else
	151	{
	152	u32 input1_hi = upper_32_bits(input1);
	153	u32 input1_lo = lower_32_bits(input1);
	154
e70e5892	155	__asm__ __volatile__ (CALL_NOSPEC
6a8edbd0 VK	156	: "=A"(hv_status),
6a8edbd0 VK	157	"+c"(input1_lo),
f5caf621	158	ASM_CALL_CONSTRAINT
6a8edbd0 VK	159	: "A" (control),
6a8edbd0 VK	160	"b" (input1_hi),
e70e5892	161	THUNK_TARGET(hv_hypercall_pg)
6a8edbd0 VK	162	: "cc", "edi", "esi");
	163	}
	164	#endif
	165	return hv_status;
	166	}
	167
f0d2f5c2 JJ	168	static inline u64 hv_do_fast_hypercall8(u16 code, u64 input1)
	169	{
	170	u64 control = (u64)code \| HV_HYPERCALL_FAST_BIT;
	171
	172	return _hv_do_fast_hypercall8(control, input1);
	173	}
	174
	175	static inline u64 hv_do_fast_nested_hypercall8(u16 code, u64 input1)
	176	{
	177	u64 control = (u64)code \| HV_HYPERCALL_FAST_BIT \| HV_HYPERCALL_NESTED;
	178
	179	return _hv_do_fast_hypercall8(control, input1);
	180	}
	181
53e52966	182	/* Fast hypercall with 16 bytes of input */
f0d2f5c2	183	static inline u64 _hv_do_fast_hypercall16(u64 control, u64 input1, u64 input2)
53e52966	184	{
f0d2f5c2	185	u64 hv_status;
53e52966 VK	186
53e52966 VK	187	#ifdef CONFIG_X86_64
d3a9d7e4	188	if (hv_isolation_type_tdx() && !hyperv_paravisor_present)
d6e0228d DC	189	return hv_tdx_hypercall(control, input1, input2);
d6e0228d DC	190
e3131f1c	191	if (hv_isolation_type_snp() && !hyperv_paravisor_present) {
48b1f683 TL	192	__asm__ __volatile__("mov %4, %%r8\n"
	193	"vmmcall"
	194	: "=a" (hv_status), ASM_CALL_CONSTRAINT,
	195	"+c" (control), "+d" (input1)
	196	: "r" (input2)
	197	: "cc", "r8", "r9", "r10", "r11");
	198	} else {
53e52966 VK	199	__asm__ __volatile__("mov %4, %%r8\n"
	200	CALL_NOSPEC
	201	: "=a" (hv_status), ASM_CALL_CONSTRAINT,
	202	"+c" (control), "+d" (input1)
	203	: "r" (input2),
	204	THUNK_TARGET(hv_hypercall_pg)
	205	: "cc", "r8", "r9", "r10", "r11");
	206	}
	207	#else
	208	{
	209	u32 input1_hi = upper_32_bits(input1);
	210	u32 input1_lo = lower_32_bits(input1);
	211	u32 input2_hi = upper_32_bits(input2);
	212	u32 input2_lo = lower_32_bits(input2);
	213
	214	__asm__ __volatile__ (CALL_NOSPEC
	215	: "=A"(hv_status),
	216	"+c"(input1_lo), ASM_CALL_CONSTRAINT
	217	: "A" (control), "b" (input1_hi),
	218	"D"(input2_hi), "S"(input2_lo),
	219	THUNK_TARGET(hv_hypercall_pg)
	220	: "cc");
	221	}
	222	#endif
b42967dc	223	return hv_status;
53e52966 VK	224	}
53e52966 VK	225
f0d2f5c2 JJ	226	static inline u64 hv_do_fast_hypercall16(u16 code, u64 input1, u64 input2)
	227	{
	228	u64 control = (u64)code \| HV_HYPERCALL_FAST_BIT;
	229
	230	return _hv_do_fast_hypercall16(control, input1, input2);
	231	}
	232
	233	static inline u64 hv_do_fast_nested_hypercall16(u16 code, u64 input1, u64 input2)
	234	{
	235	u64 control = (u64)code \| HV_HYPERCALL_FAST_BIT \| HV_HYPERCALL_NESTED;
	236
	237	return _hv_do_fast_hypercall16(control, input1, input2);
	238	}
	239
a46d15cc VK	240	extern struct hv_vp_assist_page **hv_vp_assist_page;
	241
	242	static inline struct hv_vp_assist_page *hv_get_vp_assist_page(unsigned int cpu)
	243	{
	244	if (!hv_vp_assist_page)
	245	return NULL;
	246
	247	return hv_vp_assist_page[cpu];
	248	}
7415aea6	249
6b48cb5f	250	void __init hyperv_init(void);
2ffd9e33	251	void hyperv_setup_mmu_ops(void);
93286261 VK	252	void set_hv_tscchange_cb(void (*cb)(void));
	253	void clear_hv_tscchange_cb(void);
	254	void hyperv_stop_tsc_emulation(void);
eb914cfe	255	int hyperv_flush_guest_mapping(u64 as);
cc4edae4 LT	256	int hyperv_flush_guest_mapping_range(u64 as,
	257	hyperv_fill_flush_list_func fill_func, void *data);
	258	int hyperv_fill_flush_guest_mapping_list(
	259	struct hv_guest_mapping_flush_list *flush,
	260	u64 start_gfn, u64 end_gfn);
2d2ccf24 TG	261
2d2ccf24 TG	262	#ifdef CONFIG_X86_64
6b48cb5f	263	void hv_apic_init(void);
3a025de6 YS	264	void __init hv_init_spinlocks(void);
3a025de6 YS	265	bool hv_vcpu_is_preempted(int vcpu);
2d2ccf24 TG	266	#else
	267	static inline void hv_apic_init(void) {}
	268	#endif
	269
e39397d1 WL	270	struct irq_domain *hv_create_pci_msi_domain(void);
e39397d1 WL	271
fb5ef351 WL	272	int hv_map_ioapic_interrupt(int ioapic_id, bool level, int vcpu, int vector,
	273	struct hv_interrupt_entry *entry);
	274	int hv_unmap_ioapic_interrupt(int ioapic_id, struct hv_interrupt_entry *entry);
faff4406 TL	275
faff4406 TL	276	#ifdef CONFIG_AMD_MEM_ENCRYPT
49d6a3c0	277	bool hv_ghcb_negotiate_protocol(void);
611d4c71	278	void __noreturn hv_ghcb_terminate(unsigned int set, unsigned int reason);
92fe9bb7	279	int hv_snp_boot_ap(u32 cpu, unsigned long start_ip);
faff4406	280	#else
49d6a3c0 TL	281	static inline bool hv_ghcb_negotiate_protocol(void) { return false; }
49d6a3c0 TL	282	static inline void hv_ghcb_terminate(unsigned int set, unsigned int reason) {}
92fe9bb7	283	static inline int hv_snp_boot_ap(u32 cpu, unsigned long start_ip) { return 0; }
faff4406 TL	284	#endif
faff4406 TL	285
d3a9d7e4 DC	286	#if defined(CONFIG_AMD_MEM_ENCRYPT) \|\| defined(CONFIG_INTEL_TDX_GUEST)
d3a9d7e4 DC	287	void hv_vtom_init(void);
b9b4fe3a DC	288	void hv_ivm_msr_write(u64 msr, u64 value);
b9b4fe3a DC	289	void hv_ivm_msr_read(u64 msr, u64 *value);
d3a9d7e4 DC	290	#else
d3a9d7e4 DC	291	static inline void hv_vtom_init(void) {}
b9b4fe3a DC	292	static inline void hv_ivm_msr_write(u64 msr, u64 value) {}
b9b4fe3a DC	293	static inline void hv_ivm_msr_read(u64 msr, u64 *value) {}
d3a9d7e4	294	#endif
faff4406	295
0e3f7d12	296	static inline bool hv_is_synic_msr(unsigned int reg)
faff4406	297	{
0e3f7d12 NDN	298	return (reg >= HV_X64_MSR_SCONTROL) &&
0e3f7d12 NDN	299	(reg <= HV_X64_MSR_SINT15);
b14033a3 NDN	300	}
b14033a3 NDN	301
0e3f7d12	302	static inline bool hv_is_sint_msr(unsigned int reg)
b14033a3	303	{
0e3f7d12 NDN	304	return (reg >= HV_X64_MSR_SINT0) &&
0e3f7d12 NDN	305	(reg <= HV_X64_MSR_SINT15);
faff4406 TL	306	}
faff4406 TL	307
0e3f7d12 NDN	308	u64 hv_get_msr(unsigned int reg);
	309	void hv_set_msr(unsigned int reg, u64 value);
	310	u64 hv_get_non_nested_msr(unsigned int reg);
	311	void hv_set_non_nested_msr(unsigned int reg, u64 value);
faff4406	312
0e3f7d12	313	static __always_inline u64 hv_raw_get_msr(unsigned int reg)
e39acc37 PZ	314	{
	315	return __rdmsr(reg);
	316	}
	317
79cadff2 VK	318	#else /* CONFIG_HYPERV */
79cadff2 VK	319	static inline void hyperv_init(void) {}
2ffd9e33	320	static inline void hyperv_setup_mmu_ops(void) {}
93286261 VK	321	static inline void set_hv_tscchange_cb(void (*cb)(void)) {}
	322	static inline void clear_hv_tscchange_cb(void) {}
	323	static inline void hyperv_stop_tsc_emulation(void) {};
a46d15cc VK	324	static inline struct hv_vp_assist_page *hv_get_vp_assist_page(unsigned int cpu)
	325	{
	326	return NULL;
	327	}
eb914cfe	328	static inline int hyperv_flush_guest_mapping(u64 as) { return -1; }
cc4edae4 LT	329	static inline int hyperv_flush_guest_mapping_range(u64 as,
	330	hyperv_fill_flush_list_func fill_func, void *data)
	331	{
	332	return -1;
	333	}
0e3f7d12 NDN	334	static inline void hv_set_msr(unsigned int reg, u64 value) { }
	335	static inline u64 hv_get_msr(unsigned int reg) { return 0; }
	336	static inline void hv_set_non_nested_msr(unsigned int reg, u64 value) { }
	337	static inline u64 hv_get_non_nested_msr(unsigned int reg) { return 0; }
79cadff2 VK	338	#endif /* CONFIG_HYPERV */
79cadff2 VK	339
765e33f5	340
3be1bc2f SS	341	#ifdef CONFIG_HYPERV_VTL_MODE
3be1bc2f SS	342	void __init hv_vtl_init_platform(void);
14058f72	343	int __init hv_vtl_early_init(void);
3be1bc2f SS	344	#else
3be1bc2f SS	345	static inline void __init hv_vtl_init_platform(void) {}
14058f72	346	static inline int __init hv_vtl_early_init(void) { return 0; }
3be1bc2f SS	347	#endif
3be1bc2f SS	348
765e33f5 MK	349	#include <asm-generic/mshyperv.h>
765e33f5 MK	350
a2a47c6c	351	#endif