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1da177e4 1/*
fe27cb35 2 * acpi-cpufreq.c - ACPI Processor P-States Driver ($Revision: 1.4 $)
1da177e4
LT
3 *
4 * Copyright (C) 2001, 2002 Andy Grover <andrew.grover@intel.com>
5 * Copyright (C) 2001, 2002 Paul Diefenbaugh <paul.s.diefenbaugh@intel.com>
6 * Copyright (C) 2002 - 2004 Dominik Brodowski <linux@brodo.de>
fe27cb35 7 * Copyright (C) 2006 Denis Sadykov <denis.m.sadykov@intel.com>
1da177e4
LT
8 *
9 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2 of the License, or (at
14 * your option) any later version.
15 *
16 * This program is distributed in the hope that it will be useful, but
17 * WITHOUT ANY WARRANTY; without even the implied warranty of
18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
19 * General Public License for more details.
20 *
21 * You should have received a copy of the GNU General Public License along
22 * with this program; if not, write to the Free Software Foundation, Inc.,
23 * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
24 *
25 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
26 */
27
1da177e4
LT
28#include <linux/kernel.h>
29#include <linux/module.h>
30#include <linux/init.h>
fe27cb35
VP
31#include <linux/smp.h>
32#include <linux/sched.h>
1da177e4 33#include <linux/cpufreq.h>
d395bf12 34#include <linux/compiler.h>
8adcc0c6 35#include <linux/dmi.h>
1da177e4
LT
36
37#include <linux/acpi.h>
38#include <acpi/processor.h>
39
fe27cb35 40#include <asm/io.h>
dde9f7ba 41#include <asm/msr.h>
fe27cb35
VP
42#include <asm/processor.h>
43#include <asm/cpufeature.h>
44#include <asm/delay.h>
45#include <asm/uaccess.h>
46
1da177e4
LT
47#define dprintk(msg...) cpufreq_debug_printk(CPUFREQ_DEBUG_DRIVER, "acpi-cpufreq", msg)
48
49MODULE_AUTHOR("Paul Diefenbaugh, Dominik Brodowski");
50MODULE_DESCRIPTION("ACPI Processor P-States Driver");
51MODULE_LICENSE("GPL");
52
dde9f7ba
VP
53enum {
54 UNDEFINED_CAPABLE = 0,
55 SYSTEM_INTEL_MSR_CAPABLE,
56 SYSTEM_IO_CAPABLE,
57};
58
59#define INTEL_MSR_RANGE (0xffff)
dfde5d62 60#define CPUID_6_ECX_APERFMPERF_CAPABILITY (0x1)
dde9f7ba 61
fe27cb35 62struct acpi_cpufreq_data {
64be7eed
VP
63 struct acpi_processor_performance *acpi_data;
64 struct cpufreq_frequency_table *freq_table;
dfde5d62 65 unsigned int max_freq;
64be7eed
VP
66 unsigned int resume;
67 unsigned int cpu_feature;
1da177e4
LT
68};
69
ea348f3e 70static DEFINE_PER_CPU(struct acpi_cpufreq_data *, drv_data);
71
50109292
FY
72/* acpi_perf_data is a pointer to percpu data. */
73static struct acpi_processor_performance *acpi_perf_data;
1da177e4
LT
74
75static struct cpufreq_driver acpi_cpufreq_driver;
76
d395bf12
VP
77static unsigned int acpi_pstate_strict;
78
dde9f7ba
VP
79static int check_est_cpu(unsigned int cpuid)
80{
92cb7612 81 struct cpuinfo_x86 *cpu = &cpu_data(cpuid);
dde9f7ba
VP
82
83 if (cpu->x86_vendor != X86_VENDOR_INTEL ||
64be7eed 84 !cpu_has(cpu, X86_FEATURE_EST))
dde9f7ba
VP
85 return 0;
86
87 return 1;
88}
89
dde9f7ba 90static unsigned extract_io(u32 value, struct acpi_cpufreq_data *data)
fe27cb35 91{
64be7eed
VP
92 struct acpi_processor_performance *perf;
93 int i;
fe27cb35
VP
94
95 perf = data->acpi_data;
96
95dd7227 97 for (i=0; i<perf->state_count; i++) {
fe27cb35
VP
98 if (value == perf->states[i].status)
99 return data->freq_table[i].frequency;
100 }
101 return 0;
102}
103
dde9f7ba
VP
104static unsigned extract_msr(u32 msr, struct acpi_cpufreq_data *data)
105{
106 int i;
a6f6e6e6 107 struct acpi_processor_performance *perf;
dde9f7ba
VP
108
109 msr &= INTEL_MSR_RANGE;
a6f6e6e6
VP
110 perf = data->acpi_data;
111
95dd7227 112 for (i=0; data->freq_table[i].frequency != CPUFREQ_TABLE_END; i++) {
a6f6e6e6 113 if (msr == perf->states[data->freq_table[i].index].status)
dde9f7ba
VP
114 return data->freq_table[i].frequency;
115 }
116 return data->freq_table[0].frequency;
117}
118
dde9f7ba
VP
119static unsigned extract_freq(u32 val, struct acpi_cpufreq_data *data)
120{
121 switch (data->cpu_feature) {
64be7eed 122 case SYSTEM_INTEL_MSR_CAPABLE:
dde9f7ba 123 return extract_msr(val, data);
64be7eed 124 case SYSTEM_IO_CAPABLE:
dde9f7ba 125 return extract_io(val, data);
64be7eed 126 default:
dde9f7ba
VP
127 return 0;
128 }
129}
130
dde9f7ba
VP
131struct msr_addr {
132 u32 reg;
133};
134
fe27cb35
VP
135struct io_addr {
136 u16 port;
137 u8 bit_width;
138};
139
dde9f7ba
VP
140typedef union {
141 struct msr_addr msr;
142 struct io_addr io;
143} drv_addr_union;
144
fe27cb35 145struct drv_cmd {
dde9f7ba 146 unsigned int type;
fe27cb35 147 cpumask_t mask;
dde9f7ba 148 drv_addr_union addr;
fe27cb35
VP
149 u32 val;
150};
151
152static void do_drv_read(struct drv_cmd *cmd)
1da177e4 153{
dde9f7ba
VP
154 u32 h;
155
156 switch (cmd->type) {
64be7eed 157 case SYSTEM_INTEL_MSR_CAPABLE:
dde9f7ba
VP
158 rdmsr(cmd->addr.msr.reg, cmd->val, h);
159 break;
64be7eed 160 case SYSTEM_IO_CAPABLE:
4e581ff1
VP
161 acpi_os_read_port((acpi_io_address)cmd->addr.io.port,
162 &cmd->val,
163 (u32)cmd->addr.io.bit_width);
dde9f7ba 164 break;
64be7eed 165 default:
dde9f7ba
VP
166 break;
167 }
fe27cb35 168}
1da177e4 169
fe27cb35
VP
170static void do_drv_write(struct drv_cmd *cmd)
171{
13424f65 172 u32 lo, hi;
dde9f7ba
VP
173
174 switch (cmd->type) {
64be7eed 175 case SYSTEM_INTEL_MSR_CAPABLE:
13424f65
VP
176 rdmsr(cmd->addr.msr.reg, lo, hi);
177 lo = (lo & ~INTEL_MSR_RANGE) | (cmd->val & INTEL_MSR_RANGE);
178 wrmsr(cmd->addr.msr.reg, lo, hi);
dde9f7ba 179 break;
64be7eed 180 case SYSTEM_IO_CAPABLE:
4e581ff1
VP
181 acpi_os_write_port((acpi_io_address)cmd->addr.io.port,
182 cmd->val,
183 (u32)cmd->addr.io.bit_width);
dde9f7ba 184 break;
64be7eed 185 default:
dde9f7ba
VP
186 break;
187 }
fe27cb35 188}
1da177e4 189
95dd7227 190static void drv_read(struct drv_cmd *cmd)
fe27cb35 191{
64be7eed 192 cpumask_t saved_mask = current->cpus_allowed;
fe27cb35
VP
193 cmd->val = 0;
194
fc0e4748 195 set_cpus_allowed_ptr(current, &cmd->mask);
fe27cb35 196 do_drv_read(cmd);
fc0e4748 197 set_cpus_allowed_ptr(current, &saved_mask);
fe27cb35
VP
198}
199
200static void drv_write(struct drv_cmd *cmd)
201{
64be7eed
VP
202 cpumask_t saved_mask = current->cpus_allowed;
203 unsigned int i;
fe27cb35 204
334ef7a7 205 for_each_cpu_mask_nr(i, cmd->mask) {
0bc3cc03 206 set_cpus_allowed_ptr(current, &cpumask_of_cpu(i));
fe27cb35 207 do_drv_write(cmd);
1da177e4
LT
208 }
209
fc0e4748 210 set_cpus_allowed_ptr(current, &saved_mask);
fe27cb35
VP
211 return;
212}
1da177e4 213
fc0e4748 214static u32 get_cur_val(const cpumask_t *mask)
fe27cb35 215{
64be7eed
VP
216 struct acpi_processor_performance *perf;
217 struct drv_cmd cmd;
1da177e4 218
fc0e4748 219 if (unlikely(cpus_empty(*mask)))
fe27cb35 220 return 0;
1da177e4 221
fc0e4748 222 switch (per_cpu(drv_data, first_cpu(*mask))->cpu_feature) {
dde9f7ba
VP
223 case SYSTEM_INTEL_MSR_CAPABLE:
224 cmd.type = SYSTEM_INTEL_MSR_CAPABLE;
225 cmd.addr.msr.reg = MSR_IA32_PERF_STATUS;
226 break;
227 case SYSTEM_IO_CAPABLE:
228 cmd.type = SYSTEM_IO_CAPABLE;
fc0e4748 229 perf = per_cpu(drv_data, first_cpu(*mask))->acpi_data;
dde9f7ba
VP
230 cmd.addr.io.port = perf->control_register.address;
231 cmd.addr.io.bit_width = perf->control_register.bit_width;
232 break;
233 default:
234 return 0;
235 }
236
fc0e4748 237 cmd.mask = *mask;
1da177e4 238
fe27cb35 239 drv_read(&cmd);
1da177e4 240
fe27cb35
VP
241 dprintk("get_cur_val = %u\n", cmd.val);
242
243 return cmd.val;
244}
1da177e4 245
dfde5d62
VP
246/*
247 * Return the measured active (C0) frequency on this CPU since last call
248 * to this function.
249 * Input: cpu number
250 * Return: Average CPU frequency in terms of max frequency (zero on error)
251 *
252 * We use IA32_MPERF and IA32_APERF MSRs to get the measured performance
253 * over a period of time, while CPU is in C0 state.
254 * IA32_MPERF counts at the rate of max advertised frequency
255 * IA32_APERF counts at the rate of actual CPU frequency
256 * Only IA32_APERF/IA32_MPERF ratio is architecturally defined and
257 * no meaning should be associated with absolute values of these MSRs.
258 */
259static unsigned int get_measured_perf(unsigned int cpu)
260{
261 union {
262 struct {
263 u32 lo;
264 u32 hi;
265 } split;
266 u64 whole;
267 } aperf_cur, mperf_cur;
268
269 cpumask_t saved_mask;
270 unsigned int perf_percent;
271 unsigned int retval;
272
273 saved_mask = current->cpus_allowed;
0bc3cc03 274 set_cpus_allowed_ptr(current, &cpumask_of_cpu(cpu));
dfde5d62
VP
275 if (get_cpu() != cpu) {
276 /* We were not able to run on requested processor */
277 put_cpu();
278 return 0;
279 }
280
281 rdmsr(MSR_IA32_APERF, aperf_cur.split.lo, aperf_cur.split.hi);
282 rdmsr(MSR_IA32_MPERF, mperf_cur.split.lo, mperf_cur.split.hi);
283
284 wrmsr(MSR_IA32_APERF, 0,0);
285 wrmsr(MSR_IA32_MPERF, 0,0);
286
287#ifdef __i386__
288 /*
289 * We dont want to do 64 bit divide with 32 bit kernel
290 * Get an approximate value. Return failure in case we cannot get
291 * an approximate value.
292 */
293 if (unlikely(aperf_cur.split.hi || mperf_cur.split.hi)) {
294 int shift_count;
295 u32 h;
296
297 h = max_t(u32, aperf_cur.split.hi, mperf_cur.split.hi);
298 shift_count = fls(h);
299
300 aperf_cur.whole >>= shift_count;
301 mperf_cur.whole >>= shift_count;
302 }
303
304 if (((unsigned long)(-1) / 100) < aperf_cur.split.lo) {
305 int shift_count = 7;
306 aperf_cur.split.lo >>= shift_count;
307 mperf_cur.split.lo >>= shift_count;
308 }
309
95dd7227 310 if (aperf_cur.split.lo && mperf_cur.split.lo)
dfde5d62 311 perf_percent = (aperf_cur.split.lo * 100) / mperf_cur.split.lo;
95dd7227 312 else
dfde5d62 313 perf_percent = 0;
dfde5d62
VP
314
315#else
316 if (unlikely(((unsigned long)(-1) / 100) < aperf_cur.whole)) {
317 int shift_count = 7;
318 aperf_cur.whole >>= shift_count;
319 mperf_cur.whole >>= shift_count;
320 }
321
95dd7227 322 if (aperf_cur.whole && mperf_cur.whole)
dfde5d62 323 perf_percent = (aperf_cur.whole * 100) / mperf_cur.whole;
95dd7227 324 else
dfde5d62 325 perf_percent = 0;
dfde5d62
VP
326
327#endif
328
ea348f3e 329 retval = per_cpu(drv_data, cpu)->max_freq * perf_percent / 100;
dfde5d62
VP
330
331 put_cpu();
fc0e4748 332 set_cpus_allowed_ptr(current, &saved_mask);
dfde5d62
VP
333
334 dprintk("cpu %d: performance percent %d\n", cpu, perf_percent);
335 return retval;
336}
337
fe27cb35
VP
338static unsigned int get_cur_freq_on_cpu(unsigned int cpu)
339{
ea348f3e 340 struct acpi_cpufreq_data *data = per_cpu(drv_data, cpu);
64be7eed 341 unsigned int freq;
e56a727b 342 unsigned int cached_freq;
fe27cb35
VP
343
344 dprintk("get_cur_freq_on_cpu (%d)\n", cpu);
345
346 if (unlikely(data == NULL ||
64be7eed 347 data->acpi_data == NULL || data->freq_table == NULL)) {
fe27cb35 348 return 0;
1da177e4
LT
349 }
350
e56a727b 351 cached_freq = data->freq_table[data->acpi_data->state].frequency;
0bc3cc03 352 freq = extract_freq(get_cur_val(&cpumask_of_cpu(cpu)), data);
e56a727b
VP
353 if (freq != cached_freq) {
354 /*
355 * The dreaded BIOS frequency change behind our back.
356 * Force set the frequency on next target call.
357 */
358 data->resume = 1;
359 }
360
fe27cb35 361 dprintk("cur freq = %u\n", freq);
1da177e4 362
fe27cb35 363 return freq;
1da177e4
LT
364}
365
fc0e4748 366static unsigned int check_freqs(const cpumask_t *mask, unsigned int freq,
64be7eed 367 struct acpi_cpufreq_data *data)
fe27cb35 368{
64be7eed
VP
369 unsigned int cur_freq;
370 unsigned int i;
1da177e4 371
95dd7227 372 for (i=0; i<100; i++) {
fe27cb35
VP
373 cur_freq = extract_freq(get_cur_val(mask), data);
374 if (cur_freq == freq)
375 return 1;
376 udelay(10);
377 }
378 return 0;
379}
380
381static int acpi_cpufreq_target(struct cpufreq_policy *policy,
64be7eed 382 unsigned int target_freq, unsigned int relation)
1da177e4 383{
ea348f3e 384 struct acpi_cpufreq_data *data = per_cpu(drv_data, policy->cpu);
64be7eed
VP
385 struct acpi_processor_performance *perf;
386 struct cpufreq_freqs freqs;
387 cpumask_t online_policy_cpus;
388 struct drv_cmd cmd;
8edc59d9
VP
389 unsigned int next_state = 0; /* Index into freq_table */
390 unsigned int next_perf_state = 0; /* Index into perf table */
64be7eed
VP
391 unsigned int i;
392 int result = 0;
fe27cb35
VP
393
394 dprintk("acpi_cpufreq_target %d (%d)\n", target_freq, policy->cpu);
395
396 if (unlikely(data == NULL ||
95dd7227 397 data->acpi_data == NULL || data->freq_table == NULL)) {
fe27cb35
VP
398 return -ENODEV;
399 }
1da177e4 400
fe27cb35 401 perf = data->acpi_data;
1da177e4 402 result = cpufreq_frequency_table_target(policy,
64be7eed
VP
403 data->freq_table,
404 target_freq,
405 relation, &next_state);
09b4d1ee 406 if (unlikely(result))
fe27cb35 407 return -ENODEV;
09b4d1ee 408
7e1f19e5 409#ifdef CONFIG_HOTPLUG_CPU
09b4d1ee
VP
410 /* cpufreq holds the hotplug lock, so we are safe from here on */
411 cpus_and(online_policy_cpus, cpu_online_map, policy->cpus);
7e1f19e5
AM
412#else
413 online_policy_cpus = policy->cpus;
414#endif
1da177e4 415
fe27cb35 416 next_perf_state = data->freq_table[next_state].index;
7650b281 417 if (perf->state == next_perf_state) {
fe27cb35 418 if (unlikely(data->resume)) {
64be7eed
VP
419 dprintk("Called after resume, resetting to P%d\n",
420 next_perf_state);
fe27cb35
VP
421 data->resume = 0;
422 } else {
64be7eed
VP
423 dprintk("Already at target state (P%d)\n",
424 next_perf_state);
fe27cb35
VP
425 return 0;
426 }
09b4d1ee
VP
427 }
428
64be7eed
VP
429 switch (data->cpu_feature) {
430 case SYSTEM_INTEL_MSR_CAPABLE:
431 cmd.type = SYSTEM_INTEL_MSR_CAPABLE;
432 cmd.addr.msr.reg = MSR_IA32_PERF_CTL;
13424f65 433 cmd.val = (u32) perf->states[next_perf_state].control;
64be7eed
VP
434 break;
435 case SYSTEM_IO_CAPABLE:
436 cmd.type = SYSTEM_IO_CAPABLE;
437 cmd.addr.io.port = perf->control_register.address;
438 cmd.addr.io.bit_width = perf->control_register.bit_width;
439 cmd.val = (u32) perf->states[next_perf_state].control;
440 break;
441 default:
442 return -ENODEV;
443 }
09b4d1ee 444
fe27cb35 445 cpus_clear(cmd.mask);
09b4d1ee 446
fe27cb35
VP
447 if (policy->shared_type != CPUFREQ_SHARED_TYPE_ANY)
448 cmd.mask = online_policy_cpus;
449 else
450 cpu_set(policy->cpu, cmd.mask);
09b4d1ee 451
8edc59d9
VP
452 freqs.old = perf->states[perf->state].core_frequency * 1000;
453 freqs.new = data->freq_table[next_state].frequency;
334ef7a7 454 for_each_cpu_mask_nr(i, cmd.mask) {
fe27cb35
VP
455 freqs.cpu = i;
456 cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
09b4d1ee 457 }
1da177e4 458
fe27cb35 459 drv_write(&cmd);
09b4d1ee 460
fe27cb35 461 if (acpi_pstate_strict) {
fc0e4748 462 if (!check_freqs(&cmd.mask, freqs.new, data)) {
fe27cb35 463 dprintk("acpi_cpufreq_target failed (%d)\n",
64be7eed 464 policy->cpu);
fe27cb35 465 return -EAGAIN;
09b4d1ee
VP
466 }
467 }
468
334ef7a7 469 for_each_cpu_mask_nr(i, cmd.mask) {
fe27cb35
VP
470 freqs.cpu = i;
471 cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
472 }
473 perf->state = next_perf_state;
474
475 return result;
1da177e4
LT
476}
477
64be7eed 478static int acpi_cpufreq_verify(struct cpufreq_policy *policy)
1da177e4 479{
ea348f3e 480 struct acpi_cpufreq_data *data = per_cpu(drv_data, policy->cpu);
1da177e4
LT
481
482 dprintk("acpi_cpufreq_verify\n");
483
fe27cb35 484 return cpufreq_frequency_table_verify(policy, data->freq_table);
1da177e4
LT
485}
486
1da177e4 487static unsigned long
64be7eed 488acpi_cpufreq_guess_freq(struct acpi_cpufreq_data *data, unsigned int cpu)
1da177e4 489{
64be7eed 490 struct acpi_processor_performance *perf = data->acpi_data;
09b4d1ee 491
1da177e4
LT
492 if (cpu_khz) {
493 /* search the closest match to cpu_khz */
494 unsigned int i;
495 unsigned long freq;
09b4d1ee 496 unsigned long freqn = perf->states[0].core_frequency * 1000;
1da177e4 497
95dd7227 498 for (i=0; i<(perf->state_count-1); i++) {
1da177e4 499 freq = freqn;
95dd7227 500 freqn = perf->states[i+1].core_frequency * 1000;
1da177e4 501 if ((2 * cpu_khz) > (freqn + freq)) {
09b4d1ee 502 perf->state = i;
64be7eed 503 return freq;
1da177e4
LT
504 }
505 }
95dd7227 506 perf->state = perf->state_count-1;
64be7eed 507 return freqn;
09b4d1ee 508 } else {
1da177e4 509 /* assume CPU is at P0... */
09b4d1ee
VP
510 perf->state = 0;
511 return perf->states[0].core_frequency * 1000;
512 }
1da177e4
LT
513}
514
09b4d1ee
VP
515/*
516 * acpi_cpufreq_early_init - initialize ACPI P-States library
517 *
518 * Initialize the ACPI P-States library (drivers/acpi/processor_perflib.c)
519 * in order to determine correct frequency and voltage pairings. We can
520 * do _PDC and _PSD and find out the processor dependency for the
521 * actual init that will happen later...
522 */
50109292 523static int __init acpi_cpufreq_early_init(void)
09b4d1ee 524{
09b4d1ee
VP
525 dprintk("acpi_cpufreq_early_init\n");
526
50109292
FY
527 acpi_perf_data = alloc_percpu(struct acpi_processor_performance);
528 if (!acpi_perf_data) {
529 dprintk("Memory allocation error for acpi_perf_data.\n");
530 return -ENOMEM;
09b4d1ee
VP
531 }
532
533 /* Do initialization in ACPI core */
fe27cb35
VP
534 acpi_processor_preregister_performance(acpi_perf_data);
535 return 0;
09b4d1ee
VP
536}
537
95625b8f 538#ifdef CONFIG_SMP
8adcc0c6
VP
539/*
540 * Some BIOSes do SW_ANY coordination internally, either set it up in hw
541 * or do it in BIOS firmware and won't inform about it to OS. If not
542 * detected, this has a side effect of making CPU run at a different speed
543 * than OS intended it to run at. Detect it and handle it cleanly.
544 */
545static int bios_with_sw_any_bug;
546
1855256c 547static int sw_any_bug_found(const struct dmi_system_id *d)
8adcc0c6
VP
548{
549 bios_with_sw_any_bug = 1;
550 return 0;
551}
552
1855256c 553static const struct dmi_system_id sw_any_bug_dmi_table[] = {
8adcc0c6
VP
554 {
555 .callback = sw_any_bug_found,
556 .ident = "Supermicro Server X6DLP",
557 .matches = {
558 DMI_MATCH(DMI_SYS_VENDOR, "Supermicro"),
559 DMI_MATCH(DMI_BIOS_VERSION, "080010"),
560 DMI_MATCH(DMI_PRODUCT_NAME, "X6DLP"),
561 },
562 },
563 { }
564};
95625b8f 565#endif
8adcc0c6 566
64be7eed 567static int acpi_cpufreq_cpu_init(struct cpufreq_policy *policy)
1da177e4 568{
64be7eed
VP
569 unsigned int i;
570 unsigned int valid_states = 0;
571 unsigned int cpu = policy->cpu;
572 struct acpi_cpufreq_data *data;
64be7eed 573 unsigned int result = 0;
92cb7612 574 struct cpuinfo_x86 *c = &cpu_data(policy->cpu);
64be7eed 575 struct acpi_processor_performance *perf;
1da177e4 576
1da177e4 577 dprintk("acpi_cpufreq_cpu_init\n");
1da177e4 578
fe27cb35 579 data = kzalloc(sizeof(struct acpi_cpufreq_data), GFP_KERNEL);
1da177e4 580 if (!data)
64be7eed 581 return -ENOMEM;
1da177e4 582
50109292 583 data->acpi_data = percpu_ptr(acpi_perf_data, cpu);
ea348f3e 584 per_cpu(drv_data, cpu) = data;
1da177e4 585
95dd7227 586 if (cpu_has(c, X86_FEATURE_CONSTANT_TSC))
fe27cb35 587 acpi_cpufreq_driver.flags |= CPUFREQ_CONST_LOOPS;
1da177e4 588
fe27cb35 589 result = acpi_processor_register_performance(data->acpi_data, cpu);
1da177e4
LT
590 if (result)
591 goto err_free;
592
09b4d1ee 593 perf = data->acpi_data;
09b4d1ee 594 policy->shared_type = perf->shared_type;
95dd7227 595
46f18e3a 596 /*
95dd7227 597 * Will let policy->cpus know about dependency only when software
46f18e3a
VP
598 * coordination is required.
599 */
600 if (policy->shared_type == CPUFREQ_SHARED_TYPE_ALL ||
8adcc0c6 601 policy->shared_type == CPUFREQ_SHARED_TYPE_ANY) {
46f18e3a 602 policy->cpus = perf->shared_cpu_map;
8adcc0c6 603 }
e8628dd0 604 policy->related_cpus = perf->shared_cpu_map;
8adcc0c6
VP
605
606#ifdef CONFIG_SMP
607 dmi_check_system(sw_any_bug_dmi_table);
608 if (bios_with_sw_any_bug && cpus_weight(policy->cpus) == 1) {
609 policy->shared_type = CPUFREQ_SHARED_TYPE_ALL;
08357611 610 policy->cpus = per_cpu(cpu_core_map, cpu);
8adcc0c6
VP
611 }
612#endif
09b4d1ee 613
1da177e4 614 /* capability check */
09b4d1ee 615 if (perf->state_count <= 1) {
1da177e4
LT
616 dprintk("No P-States\n");
617 result = -ENODEV;
618 goto err_unreg;
619 }
09b4d1ee 620
fe27cb35
VP
621 if (perf->control_register.space_id != perf->status_register.space_id) {
622 result = -ENODEV;
623 goto err_unreg;
624 }
625
626 switch (perf->control_register.space_id) {
64be7eed 627 case ACPI_ADR_SPACE_SYSTEM_IO:
fe27cb35 628 dprintk("SYSTEM IO addr space\n");
dde9f7ba
VP
629 data->cpu_feature = SYSTEM_IO_CAPABLE;
630 break;
64be7eed 631 case ACPI_ADR_SPACE_FIXED_HARDWARE:
dde9f7ba
VP
632 dprintk("HARDWARE addr space\n");
633 if (!check_est_cpu(cpu)) {
634 result = -ENODEV;
635 goto err_unreg;
636 }
637 data->cpu_feature = SYSTEM_INTEL_MSR_CAPABLE;
fe27cb35 638 break;
64be7eed 639 default:
fe27cb35 640 dprintk("Unknown addr space %d\n",
64be7eed 641 (u32) (perf->control_register.space_id));
1da177e4
LT
642 result = -ENODEV;
643 goto err_unreg;
644 }
645
95dd7227
DJ
646 data->freq_table = kmalloc(sizeof(struct cpufreq_frequency_table) *
647 (perf->state_count+1), GFP_KERNEL);
1da177e4
LT
648 if (!data->freq_table) {
649 result = -ENOMEM;
650 goto err_unreg;
651 }
652
653 /* detect transition latency */
654 policy->cpuinfo.transition_latency = 0;
95dd7227 655 for (i=0; i<perf->state_count; i++) {
64be7eed
VP
656 if ((perf->states[i].transition_latency * 1000) >
657 policy->cpuinfo.transition_latency)
658 policy->cpuinfo.transition_latency =
659 perf->states[i].transition_latency * 1000;
1da177e4 660 }
1da177e4 661
dfde5d62 662 data->max_freq = perf->states[0].core_frequency * 1000;
1da177e4 663 /* table init */
95dd7227 664 for (i=0; i<perf->state_count; i++) {
3cdf552b
ZR
665 if (i>0 && perf->states[i].core_frequency >=
666 data->freq_table[valid_states-1].frequency / 1000)
fe27cb35
VP
667 continue;
668
669 data->freq_table[valid_states].index = i;
670 data->freq_table[valid_states].frequency =
64be7eed 671 perf->states[i].core_frequency * 1000;
fe27cb35 672 valid_states++;
1da177e4 673 }
3d4a7ef3 674 data->freq_table[valid_states].frequency = CPUFREQ_TABLE_END;
8edc59d9 675 perf->state = 0;
1da177e4
LT
676
677 result = cpufreq_frequency_table_cpuinfo(policy, data->freq_table);
95dd7227 678 if (result)
1da177e4 679 goto err_freqfree;
1da177e4 680
a507ac4b 681 switch (perf->control_register.space_id) {
64be7eed 682 case ACPI_ADR_SPACE_SYSTEM_IO:
dde9f7ba
VP
683 /* Current speed is unknown and not detectable by IO port */
684 policy->cur = acpi_cpufreq_guess_freq(data, policy->cpu);
685 break;
64be7eed 686 case ACPI_ADR_SPACE_FIXED_HARDWARE:
7650b281 687 acpi_cpufreq_driver.get = get_cur_freq_on_cpu;
a507ac4b 688 policy->cur = get_cur_freq_on_cpu(cpu);
dde9f7ba 689 break;
64be7eed 690 default:
dde9f7ba
VP
691 break;
692 }
693
1da177e4
LT
694 /* notify BIOS that we exist */
695 acpi_processor_notify_smm(THIS_MODULE);
696
dfde5d62
VP
697 /* Check for APERF/MPERF support in hardware */
698 if (c->x86_vendor == X86_VENDOR_INTEL && c->cpuid_level >= 6) {
699 unsigned int ecx;
700 ecx = cpuid_ecx(6);
95dd7227 701 if (ecx & CPUID_6_ECX_APERFMPERF_CAPABILITY)
dfde5d62 702 acpi_cpufreq_driver.getavg = get_measured_perf;
dfde5d62
VP
703 }
704
fe27cb35 705 dprintk("CPU%u - ACPI performance management activated.\n", cpu);
09b4d1ee 706 for (i = 0; i < perf->state_count; i++)
1da177e4 707 dprintk(" %cP%d: %d MHz, %d mW, %d uS\n",
64be7eed 708 (i == perf->state ? '*' : ' '), i,
09b4d1ee
VP
709 (u32) perf->states[i].core_frequency,
710 (u32) perf->states[i].power,
711 (u32) perf->states[i].transition_latency);
1da177e4
LT
712
713 cpufreq_frequency_table_get_attr(data->freq_table, policy->cpu);
64be7eed 714
4b31e774
DB
715 /*
716 * the first call to ->target() should result in us actually
717 * writing something to the appropriate registers.
718 */
719 data->resume = 1;
64be7eed 720
fe27cb35 721 return result;
1da177e4 722
95dd7227 723err_freqfree:
1da177e4 724 kfree(data->freq_table);
95dd7227 725err_unreg:
09b4d1ee 726 acpi_processor_unregister_performance(perf, cpu);
95dd7227 727err_free:
1da177e4 728 kfree(data);
ea348f3e 729 per_cpu(drv_data, cpu) = NULL;
1da177e4 730
64be7eed 731 return result;
1da177e4
LT
732}
733
64be7eed 734static int acpi_cpufreq_cpu_exit(struct cpufreq_policy *policy)
1da177e4 735{
ea348f3e 736 struct acpi_cpufreq_data *data = per_cpu(drv_data, policy->cpu);
1da177e4 737
1da177e4
LT
738 dprintk("acpi_cpufreq_cpu_exit\n");
739
740 if (data) {
741 cpufreq_frequency_table_put_attr(policy->cpu);
ea348f3e 742 per_cpu(drv_data, policy->cpu) = NULL;
64be7eed
VP
743 acpi_processor_unregister_performance(data->acpi_data,
744 policy->cpu);
1da177e4
LT
745 kfree(data);
746 }
747
64be7eed 748 return 0;
1da177e4
LT
749}
750
64be7eed 751static int acpi_cpufreq_resume(struct cpufreq_policy *policy)
1da177e4 752{
ea348f3e 753 struct acpi_cpufreq_data *data = per_cpu(drv_data, policy->cpu);
1da177e4 754
1da177e4
LT
755 dprintk("acpi_cpufreq_resume\n");
756
757 data->resume = 1;
758
64be7eed 759 return 0;
1da177e4
LT
760}
761
64be7eed 762static struct freq_attr *acpi_cpufreq_attr[] = {
1da177e4
LT
763 &cpufreq_freq_attr_scaling_available_freqs,
764 NULL,
765};
766
767static struct cpufreq_driver acpi_cpufreq_driver = {
64be7eed
VP
768 .verify = acpi_cpufreq_verify,
769 .target = acpi_cpufreq_target,
64be7eed
VP
770 .init = acpi_cpufreq_cpu_init,
771 .exit = acpi_cpufreq_cpu_exit,
772 .resume = acpi_cpufreq_resume,
773 .name = "acpi-cpufreq",
774 .owner = THIS_MODULE,
775 .attr = acpi_cpufreq_attr,
1da177e4
LT
776};
777
64be7eed 778static int __init acpi_cpufreq_init(void)
1da177e4 779{
50109292
FY
780 int ret;
781
1da177e4
LT
782 dprintk("acpi_cpufreq_init\n");
783
50109292
FY
784 ret = acpi_cpufreq_early_init();
785 if (ret)
786 return ret;
09b4d1ee 787
64be7eed 788 return cpufreq_register_driver(&acpi_cpufreq_driver);
1da177e4
LT
789}
790
64be7eed 791static void __exit acpi_cpufreq_exit(void)
1da177e4
LT
792{
793 dprintk("acpi_cpufreq_exit\n");
794
795 cpufreq_unregister_driver(&acpi_cpufreq_driver);
796
50109292
FY
797 free_percpu(acpi_perf_data);
798
1da177e4
LT
799 return;
800}
801
d395bf12 802module_param(acpi_pstate_strict, uint, 0644);
64be7eed 803MODULE_PARM_DESC(acpi_pstate_strict,
95dd7227
DJ
804 "value 0 or non-zero. non-zero -> strict ACPI checks are "
805 "performed during frequency changes.");
1da177e4
LT
806
807late_initcall(acpi_cpufreq_init);
808module_exit(acpi_cpufreq_exit);
809
810MODULE_ALIAS("acpi");