[thirdparty/linux.git] / arch / x86 / kernel / early_printk.c

// SPDX-License-Identifier: GPL-2.0
#include <linux/console.h>
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/string.h>
#include <linux/screen_info.h>
#include <linux/usb/ch9.h>
#include <linux/pci_regs.h>
#include <linux/pci_ids.h>
#include <linux/errno.h>
#include <asm/io.h>
#include <asm/processor.h>
#include <asm/fcntl.h>
#include <asm/setup.h>
#include <xen/hvc-console.h>
#include <asm/pci-direct.h>
#include <asm/fixmap.h>
#include <asm/pgtable.h>
#include <linux/usb/ehci_def.h>
#include <linux/usb/xhci-dbgp.h>
#include <asm/pci_x86.h>

/* Simple VGA output */
#define VGABASE		(__ISA_IO_base + 0xb8000)

static int max_ypos = 25, max_xpos = 80;
static int current_ypos = 25, current_xpos;

static void early_vga_write(struct console *con, const char *str, unsigned n)
{
	char c;
	int  i, k, j;

	while ((c = *str++) != '\0' && n-- > 0) {
		if (current_ypos >= max_ypos) {
			/* scroll 1 line up */
			for (k = 1, j = 0; k < max_ypos; k++, j++) {
				for (i = 0; i < max_xpos; i++) {
					writew(readw(VGABASE+2*(max_xpos*k+i)),
					       VGABASE + 2*(max_xpos*j + i));
				}
			}
			for (i = 0; i < max_xpos; i++)
				writew(0x720, VGABASE + 2*(max_xpos*j + i));
			current_ypos = max_ypos-1;
		}
#ifdef CONFIG_KGDB_KDB
		if (c == '\b') {
			if (current_xpos > 0)
				current_xpos--;
		} else if (c == '\r') {
			current_xpos = 0;
		} else
#endif
		if (c == '\n') {
			current_xpos = 0;
			current_ypos++;
		} else if (c != '\r')  {
			writew(((0x7 << 8) | (unsigned short) c),
			       VGABASE + 2*(max_xpos*current_ypos +
						current_xpos++));
			if (current_xpos >= max_xpos) {
				current_xpos = 0;
				current_ypos++;
			}
		}
	}
}

static struct console early_vga_console = {
	.name =		"earlyvga",
	.write =	early_vga_write,
	.flags =	CON_PRINTBUFFER,
	.index =	-1,
};

/* Serial functions loosely based on a similar package from Klaus P. Gerlicher */

static unsigned long early_serial_base = 0x3f8;  /* ttyS0 */

#define XMTRDY          0x20

#define DLAB		0x80

#define TXR             0       /*  Transmit register (WRITE) */
#define RXR             0       /*  Receive register  (READ)  */
#define IER             1       /*  Interrupt Enable          */
#define IIR             2       /*  Interrupt ID              */
#define FCR             2       /*  FIFO control              */
#define LCR             3       /*  Line control              */
#define MCR             4       /*  Modem control             */
#define LSR             5       /*  Line Status               */
#define MSR             6       /*  Modem Status              */
#define DLL             0       /*  Divisor Latch Low         */
#define DLH             1       /*  Divisor latch High        */

static unsigned int io_serial_in(unsigned long addr, int offset)
{
	return inb(addr + offset);
}

static void io_serial_out(unsigned long addr, int offset, int value)
{
	outb(value, addr + offset);
}

static unsigned int (*serial_in)(unsigned long addr, int offset) = io_serial_in;
static void (*serial_out)(unsigned long addr, int offset, int value) = io_serial_out;

static int early_serial_putc(unsigned char ch)
{
	unsigned timeout = 0xffff;

	while ((serial_in(early_serial_base, LSR) & XMTRDY) == 0 && --timeout)
		cpu_relax();
	serial_out(early_serial_base, TXR, ch);
	return timeout ? 0 : -1;
}

static void early_serial_write(struct console *con, const char *s, unsigned n)
{
	while (*s && n-- > 0) {
		if (*s == '\n')
			early_serial_putc('\r');
		early_serial_putc(*s);
		s++;
	}
}

static __init void early_serial_hw_init(unsigned divisor)
{
	unsigned char c;

	serial_out(early_serial_base, LCR, 0x3);	/* 8n1 */
	serial_out(early_serial_base, IER, 0);	/* no interrupt */
	serial_out(early_serial_base, FCR, 0);	/* no fifo */
	serial_out(early_serial_base, MCR, 0x3);	/* DTR + RTS */

	c = serial_in(early_serial_base, LCR);
	serial_out(early_serial_base, LCR, c | DLAB);
	serial_out(early_serial_base, DLL, divisor & 0xff);
	serial_out(early_serial_base, DLH, (divisor >> 8) & 0xff);
	serial_out(early_serial_base, LCR, c & ~DLAB);
}

#define DEFAULT_BAUD 9600

static __init void early_serial_init(char *s)
{
	unsigned divisor;
	unsigned long baud = DEFAULT_BAUD;
	char *e;

	if (*s == ',')
		++s;

	if (*s) {
		unsigned port;
		if (!strncmp(s, "0x", 2)) {
			early_serial_base = simple_strtoul(s, &e, 16);
		} else {
			static const int __initconst bases[] = { 0x3f8, 0x2f8 };

			if (!strncmp(s, "ttyS", 4))
				s += 4;
			port = simple_strtoul(s, &e, 10);
			if (port > 1 || s == e)
				port = 0;
			early_serial_base = bases[port];
		}
		s += strcspn(s, ",");
		if (*s == ',')
			s++;
	}

	if (*s) {
		baud = simple_strtoull(s, &e, 0);

		if (baud == 0 || s == e)
			baud = DEFAULT_BAUD;
	}

	/* Convert from baud to divisor value */
	divisor = 115200 / baud;

	/* These will always be IO based ports */
	serial_in = io_serial_in;
	serial_out = io_serial_out;

	/* Set up the HW */
	early_serial_hw_init(divisor);
}

#ifdef CONFIG_PCI
static void mem32_serial_out(unsigned long addr, int offset, int value)
{
	u32 __iomem *vaddr = (u32 __iomem *)addr;
	/* shift implied by pointer type */
	writel(value, vaddr + offset);
}

static unsigned int mem32_serial_in(unsigned long addr, int offset)
{
	u32 __iomem *vaddr = (u32 __iomem *)addr;
	/* shift implied by pointer type */
	return readl(vaddr + offset);
}

/*
 * early_pci_serial_init()
 *
 * This function is invoked when the early_printk param starts with "pciserial"
 * The rest of the param should be "[force],B:D.F,baud", where B, D & F describe
 * the location of a PCI device that must be a UART device. "force" is optional
 * and overrides the use of an UART device with a wrong PCI class code.
 */
static __init void early_pci_serial_init(char *s)
{
	unsigned divisor;
	unsigned long baud = DEFAULT_BAUD;
	u8 bus, slot, func;
	u32 classcode, bar0;
	u16 cmdreg;
	char *e;
	int force = 0;

	if (*s == ',')
		++s;

	if (*s == 0)
		return;

	/* Force the use of an UART device with wrong class code */
	if (!strncmp(s, "force,", 6)) {
		force = 1;
		s += 6;
	}

	/*
	 * Part the param to get the BDF values
	 */
	bus = (u8)simple_strtoul(s, &e, 16);
	s = e;
	if (*s != ':')
		return;
	++s;
	slot = (u8)simple_strtoul(s, &e, 16);
	s = e;
	if (*s != '.')
		return;
	++s;
	func = (u8)simple_strtoul(s, &e, 16);
	s = e;

	/* A baud might be following */
	if (*s == ',')
		s++;

	/*
	 * Find the device from the BDF
	 */
	cmdreg = read_pci_config(bus, slot, func, PCI_COMMAND);
	classcode = read_pci_config(bus, slot, func, PCI_CLASS_REVISION);
	bar0 = read_pci_config(bus, slot, func, PCI_BASE_ADDRESS_0);

	/*
	 * Verify it is a UART type device
	 */
	if (((classcode >> 16 != PCI_CLASS_COMMUNICATION_MODEM) &&
	     (classcode >> 16 != PCI_CLASS_COMMUNICATION_SERIAL)) ||
	   (((classcode >> 8) & 0xff) != 0x02)) /* 16550 I/F at BAR0 */ {
		if (!force)
			return;
	}

	/*
	 * Determine if it is IO or memory mapped
	 */
	if (bar0 & 0x01) {
		/* it is IO mapped */
		serial_in = io_serial_in;
		serial_out = io_serial_out;
		early_serial_base = bar0&0xfffffffc;
		write_pci_config(bus, slot, func, PCI_COMMAND,
						cmdreg|PCI_COMMAND_IO);
	} else {
		/* It is memory mapped - assume 32-bit alignment */
		serial_in = mem32_serial_in;
		serial_out = mem32_serial_out;
		/* WARNING! assuming the address is always in the first 4G */
		early_serial_base =
			(unsigned long)early_ioremap(bar0 & 0xfffffff0, 0x10);
		write_pci_config(bus, slot, func, PCI_COMMAND,
						cmdreg|PCI_COMMAND_MEMORY);
	}

	/*
	 * Initialize the hardware
	 */
	if (*s) {
		if (strcmp(s, "nocfg") == 0)
			/* Sometimes, we want to leave the UART alone
			 * and assume the BIOS has set it up correctly.
			 * "nocfg" tells us this is the case, and we
			 * should do no more setup.
			 */
			return;
		if (kstrtoul(s, 0, &baud) < 0 || baud == 0)
			baud = DEFAULT_BAUD;
	}

	/* Convert from baud to divisor value */
	divisor = 115200 / baud;

	/* Set up the HW */
	early_serial_hw_init(divisor);
}
#endif

static struct console early_serial_console = {
	.name =		"earlyser",
	.write =	early_serial_write,
	.flags =	CON_PRINTBUFFER,
	.index =	-1,
};

static void early_console_register(struct console *con, int keep_early)
{
	if (con->index != -1) {
		printk(KERN_CRIT "ERROR: earlyprintk= %s already used\n",
		       con->name);
		return;
	}
	early_console = con;
	if (keep_early)
		early_console->flags &= ~CON_BOOT;
	else
		early_console->flags |= CON_BOOT;
	register_console(early_console);
}

static int __init setup_early_printk(char *buf)
{
	int keep;

	if (!buf)
		return 0;

	if (early_console)
		return 0;

	keep = (strstr(buf, "keep") != NULL);

	while (*buf != '\0') {
		if (!strncmp(buf, "serial", 6)) {
			buf += 6;
			early_serial_init(buf);
			early_console_register(&early_serial_console, keep);
			if (!strncmp(buf, ",ttyS", 5))
				buf += 5;
		}
		if (!strncmp(buf, "ttyS", 4)) {
			early_serial_init(buf + 4);
			early_console_register(&early_serial_console, keep);
		}
#ifdef CONFIG_PCI
		if (!strncmp(buf, "pciserial", 9)) {
			early_pci_serial_init(buf + 9);
			early_console_register(&early_serial_console, keep);
			buf += 9; /* Keep from match the above "serial" */
		}
#endif
		if (!strncmp(buf, "vga", 3) &&
		    boot_params.screen_info.orig_video_isVGA == 1) {
			max_xpos = boot_params.screen_info.orig_video_cols;
			max_ypos = boot_params.screen_info.orig_video_lines;
			current_ypos = boot_params.screen_info.orig_y;
			early_console_register(&early_vga_console, keep);
		}
#ifdef CONFIG_EARLY_PRINTK_DBGP
		if (!strncmp(buf, "dbgp", 4) && !early_dbgp_init(buf + 4))
			early_console_register(&early_dbgp_console, keep);
#endif
#ifdef CONFIG_HVC_XEN
		if (!strncmp(buf, "xen", 3))
			early_console_register(&xenboot_console, keep);
#endif
#ifdef CONFIG_EARLY_PRINTK_USB_XDBC
		if (!strncmp(buf, "xdbc", 4))
			early_xdbc_parse_parameter(buf + 4);
#endif

		buf++;
	}
	return 0;
}

early_param("earlyprintk", setup_early_printk);
Commit	Line	Data
b2441318	1	// SPDX-License-Identifier: GPL-2.0
250c2277 TG	2	#include <linux/console.h>
	3	#include <linux/kernel.h>
	4	#include <linux/init.h>
	5	#include <linux/string.h>
	6	#include <linux/screen_info.h>
5c05917e YL	7	#include <linux/usb/ch9.h>
	8	#include <linux/pci_regs.h>
	9	#include <linux/pci_ids.h>
	10	#include <linux/errno.h>
250c2277 TG	11	#include <asm/io.h>
	12	#include <asm/processor.h>
	13	#include <asm/fcntl.h>
30c82645	14	#include <asm/setup.h>
250c2277	15	#include <xen/hvc-console.h>
5c05917e	16	#include <asm/pci-direct.h>
5c05917e	17	#include <asm/fixmap.h>
726c0d95	18	#include <asm/pgtable.h>
5c05917e	19	#include <linux/usb/ehci_def.h>
1b5aeebf	20	#include <linux/usb/xhci-dbgp.h>
ea9e9d80	21	#include <asm/pci_x86.h>
1da177e4	22
250c2277	23	/* Simple VGA output */
250c2277 TG	24	#define VGABASE (__ISA_IO_base + 0xb8000)
	25
	26	static int max_ypos = 25, max_xpos = 80;
c9cf39ae	27	static int current_ypos = 25, current_xpos;
250c2277 TG	28
	29	static void early_vga_write(struct console con, const char str, unsigned n)
	30	{
	31	char c;
	32	int i, k, j;
	33
	34	while ((c = *str++) != '\0' && n-- > 0) {
	35	if (current_ypos >= max_ypos) {
	36	/* scroll 1 line up */
	37	for (k = 1, j = 0; k < max_ypos; k++, j++) {
	38	for (i = 0; i < max_xpos; i++) {
	39	writew(readw(VGABASE+2(max_xposk+i)),
	40	VGABASE + 2(max_xposj + i));
	41	}
	42	}
	43	for (i = 0; i < max_xpos; i++)
	44	writew(0x720, VGABASE + 2(max_xposj + i));
	45	current_ypos = max_ypos-1;
	46	}
61eaf539 JW	47	#ifdef CONFIG_KGDB_KDB
	48	if (c == '\b') {
	49	if (current_xpos > 0)
	50	current_xpos--;
	51	} else if (c == '\r') {
	52	current_xpos = 0;
	53	} else
	54	#endif
250c2277 TG	55	if (c == '\n') {
	56	current_xpos = 0;
	57	current_ypos++;
	58	} else if (c != '\r') {
	59	writew(((0x7 << 8) \| (unsigned short) c),
	60	VGABASE + 2(max_xposcurrent_ypos +
	61	current_xpos++));
	62	if (current_xpos >= max_xpos) {
	63	current_xpos = 0;
	64	current_ypos++;
	65	}
	66	}
	67	}
	68	}
	69
	70	static struct console early_vga_console = {
	71	.name = "earlyvga",
	72	.write = early_vga_write,
	73	.flags = CON_PRINTBUFFER,
	74	.index = -1,
	75	};
	76
	77	/* Serial functions loosely based on a similar package from Klaus P. Gerlicher */
	78
ea9e9d80	79	static unsigned long early_serial_base = 0x3f8; /* ttyS0 */
250c2277 TG	80
	81	#define XMTRDY 0x20
	82
	83	#define DLAB 0x80
	84
	85	#define TXR 0 /* Transmit register (WRITE) */
	86	#define RXR 0 /* Receive register (READ) */
	87	#define IER 1 /* Interrupt Enable */
	88	#define IIR 2 /* Interrupt ID */
	89	#define FCR 2 /* FIFO control */
	90	#define LCR 3 /* Line control */
	91	#define MCR 4 /* Modem control */
	92	#define LSR 5 /* Line Status */
	93	#define MSR 6 /* Modem Status */
	94	#define DLL 0 /* Divisor Latch Low */
	95	#define DLH 1 /* Divisor latch High */
	96
ea9e9d80 SA	97	static unsigned int io_serial_in(unsigned long addr, int offset)
	98	{
	99	return inb(addr + offset);
	100	}
	101
	102	static void io_serial_out(unsigned long addr, int offset, int value)
	103	{
	104	outb(value, addr + offset);
	105	}
	106
	107	static unsigned int (*serial_in)(unsigned long addr, int offset) = io_serial_in;
	108	static void (*serial_out)(unsigned long addr, int offset, int value) = io_serial_out;
	109
250c2277 TG	110	static int early_serial_putc(unsigned char ch)
	111	{
	112	unsigned timeout = 0xffff;
5c05917e	113
ea9e9d80	114	while ((serial_in(early_serial_base, LSR) & XMTRDY) == 0 && --timeout)
250c2277	115	cpu_relax();
ea9e9d80	116	serial_out(early_serial_base, TXR, ch);
250c2277 TG	117	return timeout ? 0 : -1;
	118	}
	119
	120	static void early_serial_write(struct console con, const char s, unsigned n)
	121	{
	122	while (*s && n-- > 0) {
	123	if (*s == '\n')
	124	early_serial_putc('\r');
	125	early_serial_putc(*s);
	126	s++;
	127	}
	128	}
	129
ea9e9d80 SA	130	static __init void early_serial_hw_init(unsigned divisor)
	131	{
	132	unsigned char c;
	133
	134	serial_out(early_serial_base, LCR, 0x3); /* 8n1 */
	135	serial_out(early_serial_base, IER, 0); /* no interrupt */
	136	serial_out(early_serial_base, FCR, 0); /* no fifo */
	137	serial_out(early_serial_base, MCR, 0x3); /* DTR + RTS */
	138
	139	c = serial_in(early_serial_base, LCR);
	140	serial_out(early_serial_base, LCR, c \| DLAB);
	141	serial_out(early_serial_base, DLL, divisor & 0xff);
	142	serial_out(early_serial_base, DLH, (divisor >> 8) & 0xff);
	143	serial_out(early_serial_base, LCR, c & ~DLAB);
	144	}
	145
250c2277 TG	146	#define DEFAULT_BAUD 9600
	147
	148	static __init void early_serial_init(char *s)
	149	{
250c2277	150	unsigned divisor;
ea9e9d80	151	unsigned long baud = DEFAULT_BAUD;
250c2277 TG	152	char *e;
	153
	154	if (*s == ',')
	155	++s;
	156
	157	if (*s) {
	158	unsigned port;
e941f27a	159	if (!strncmp(s, "0x", 2)) {
250c2277 TG	160	early_serial_base = simple_strtoul(s, &e, 16);
250c2277 TG	161	} else {
30cec979	162	static const int __initconst bases[] = { 0x3f8, 0x2f8 };
250c2277	163
e941f27a	164	if (!strncmp(s, "ttyS", 4))
250c2277 TG	165	s += 4;
	166	port = simple_strtoul(s, &e, 10);
	167	if (port > 1 \|\| s == e)
	168	port = 0;
	169	early_serial_base = bases[port];
	170	}
	171	s += strcspn(s, ",");
	172	if (*s == ',')
	173	s++;
	174	}
	175
ea9e9d80	176	if (*s) {
827a82ff SR	177	baud = simple_strtoull(s, &e, 0);
	178
	179	if (baud == 0 \|\| s == e)
ea9e9d80 SA	180	baud = DEFAULT_BAUD;
	181	}
	182
	183	/* Convert from baud to divisor value */
	184	divisor = 115200 / baud;
	185
	186	/* These will always be IO based ports */
	187	serial_in = io_serial_in;
	188	serial_out = io_serial_out;
	189
	190	/* Set up the HW */
	191	early_serial_hw_init(divisor);
	192	}
	193
	194	#ifdef CONFIG_PCI
7f99f8b9 ME	195	static void mem32_serial_out(unsigned long addr, int offset, int value)
7f99f8b9 ME	196	{
3435dd08	197	u32 __iomem vaddr = (u32 __iomem )addr;
7f99f8b9 ME	198	/* shift implied by pointer type */
	199	writel(value, vaddr + offset);
	200	}
	201
	202	static unsigned int mem32_serial_in(unsigned long addr, int offset)
	203	{
3435dd08	204	u32 __iomem vaddr = (u32 __iomem )addr;
7f99f8b9 ME	205	/* shift implied by pointer type */
	206	return readl(vaddr + offset);
	207	}
	208
ea9e9d80 SA	209	/*
	210	* early_pci_serial_init()
	211	*
	212	* This function is invoked when the early_printk param starts with "pciserial"
d2266bbf FT	213	* The rest of the param should be "[force],B:D.F,baud", where B, D & F describe
	214	* the location of a PCI device that must be a UART device. "force" is optional
	215	* and overrides the use of an UART device with a wrong PCI class code.
ea9e9d80 SA	216	*/
	217	static __init void early_pci_serial_init(char *s)
	218	{
	219	unsigned divisor;
	220	unsigned long baud = DEFAULT_BAUD;
	221	u8 bus, slot, func;
7f99f8b9 ME	222	u32 classcode, bar0;
7f99f8b9 ME	223	u16 cmdreg;
ea9e9d80	224	char *e;
d2266bbf	225	int force = 0;
ea9e9d80	226
ea9e9d80 SA	227	if (*s == ',')
	228	++s;
	229
	230	if (*s == 0)
	231	return;
	232
d2266bbf FT	233	/* Force the use of an UART device with wrong class code */
	234	if (!strncmp(s, "force,", 6)) {
	235	force = 1;
	236	s += 6;
	237	}
	238
	239	/*
	240	* Part the param to get the BDF values
	241	*/
ea9e9d80 SA	242	bus = (u8)simple_strtoul(s, &e, 16);
	243	s = e;
	244	if (*s != ':')
	245	return;
	246	++s;
	247	slot = (u8)simple_strtoul(s, &e, 16);
	248	s = e;
	249	if (*s != '.')
	250	return;
	251	++s;
	252	func = (u8)simple_strtoul(s, &e, 16);
	253	s = e;
250c2277	254
ea9e9d80 SA	255	/* A baud might be following */
	256	if (*s == ',')
	257	s++;
	258
	259	/*
d2266bbf	260	* Find the device from the BDF
ea9e9d80 SA	261	*/
	262	cmdreg = read_pci_config(bus, slot, func, PCI_COMMAND);
	263	classcode = read_pci_config(bus, slot, func, PCI_CLASS_REVISION);
	264	bar0 = read_pci_config(bus, slot, func, PCI_BASE_ADDRESS_0);
	265
	266	/*
	267	* Verify it is a UART type device
	268	*/
	269	if (((classcode >> 16 != PCI_CLASS_COMMUNICATION_MODEM) &&
	270	(classcode >> 16 != PCI_CLASS_COMMUNICATION_SERIAL)) \|\|
d2266bbf FT	271	(((classcode >> 8) & 0xff) != 0x02)) /* 16550 I/F at BAR0 */ {
	272	if (!force)
	273	return;
	274	}
ea9e9d80 SA	275
	276	/*
	277	* Determine if it is IO or memory mapped
	278	*/
	279	if (bar0 & 0x01) {
	280	/* it is IO mapped */
	281	serial_in = io_serial_in;
	282	serial_out = io_serial_out;
	283	early_serial_base = bar0&0xfffffffc;
	284	write_pci_config(bus, slot, func, PCI_COMMAND,
	285	cmdreg\|PCI_COMMAND_IO);
	286	} else {
	287	/* It is memory mapped - assume 32-bit alignment */
	288	serial_in = mem32_serial_in;
	289	serial_out = mem32_serial_out;
	290	/* WARNING! assuming the address is always in the first 4G */
	291	early_serial_base =
	292	(unsigned long)early_ioremap(bar0 & 0xfffffff0, 0x10);
	293	write_pci_config(bus, slot, func, PCI_COMMAND,
	294	cmdreg\|PCI_COMMAND_MEMORY);
	295	}
	296
	297	/*
d2266bbf	298	* Initialize the hardware
ea9e9d80	299	*/
250c2277	300	if (*s) {
ea9e9d80 SA	301	if (strcmp(s, "nocfg") == 0)
	302	/* Sometimes, we want to leave the UART alone
	303	* and assume the BIOS has set it up correctly.
	304	* "nocfg" tells us this is the case, and we
	305	* should do no more setup.
	306	*/
	307	return;
	308	if (kstrtoul(s, 0, &baud) < 0 \|\| baud == 0)
250c2277 TG	309	baud = DEFAULT_BAUD;
	310	}
	311
ea9e9d80	312	/* Convert from baud to divisor value */
250c2277	313	divisor = 115200 / baud;
ea9e9d80 SA	314
	315	/* Set up the HW */
	316	early_serial_hw_init(divisor);
250c2277	317	}
ea9e9d80	318	#endif
250c2277 TG	319
	320	static struct console early_serial_console = {
	321	.name = "earlyser",
	322	.write = early_serial_write,
	323	.flags = CON_PRINTBUFFER,
	324	.index = -1,
	325	};
	326
c368ef28	327	static void early_console_register(struct console *con, int keep_early)
c9530948	328	{
d0380e6c	329	if (con->index != -1) {
429a6e5e JW	330	printk(KERN_CRIT "ERROR: earlyprintk= %s already used\n",
	331	con->name);
	332	return;
	333	}
c9530948 JW	334	early_console = con;
	335	if (keep_early)
	336	early_console->flags &= ~CON_BOOT;
	337	else
	338	early_console->flags \|= CON_BOOT;
	339	register_console(early_console);
	340	}
250c2277 TG	341
	342	static int __init setup_early_printk(char *buf)
	343	{
c9530948	344	int keep;
5c05917e	345
250c2277 TG	346	if (!buf)
	347	return 0;
	348
d0380e6c	349	if (early_console)
250c2277	350	return 0;
250c2277	351
c9530948 JW	352	keep = (strstr(buf, "keep") != NULL);
	353
	354	while (*buf != '\0') {
	355	if (!strncmp(buf, "serial", 6)) {
ea3acb19 JW	356	buf += 6;
ea3acb19 JW	357	early_serial_init(buf);
c9530948	358	early_console_register(&early_serial_console, keep);
ea3acb19 JW	359	if (!strncmp(buf, ",ttyS", 5))
ea3acb19 JW	360	buf += 5;
c9530948 JW	361	}
	362	if (!strncmp(buf, "ttyS", 4)) {
	363	early_serial_init(buf + 4);
	364	early_console_register(&early_serial_console, keep);
	365	}
ea9e9d80 SA	366	#ifdef CONFIG_PCI
	367	if (!strncmp(buf, "pciserial", 9)) {
	368	early_pci_serial_init(buf + 9);
	369	early_console_register(&early_serial_console, keep);
	370	buf += 9; /* Keep from match the above "serial" */
	371	}
	372	#endif
c9530948 JW	373	if (!strncmp(buf, "vga", 3) &&
	374	boot_params.screen_info.orig_video_isVGA == 1) {
	375	max_xpos = boot_params.screen_info.orig_video_cols;
	376	max_ypos = boot_params.screen_info.orig_video_lines;
	377	current_ypos = boot_params.screen_info.orig_y;
	378	early_console_register(&early_vga_console, keep);
	379	}
5c05917e	380	#ifdef CONFIG_EARLY_PRINTK_DBGP
c9530948 JW	381	if (!strncmp(buf, "dbgp", 4) && !early_dbgp_init(buf + 4))
c9530948 JW	382	early_console_register(&early_dbgp_console, keep);
5c05917e	383	#endif
250c2277	384	#ifdef CONFIG_HVC_XEN
c9530948 JW	385	if (!strncmp(buf, "xen", 3))
c9530948 JW	386	early_console_register(&xenboot_console, keep);
c20b5c33	387	#endif
1b5aeebf LB	388	#ifdef CONFIG_EARLY_PRINTK_USB_XDBC
	389	if (!strncmp(buf, "xdbc", 4))
	390	early_xdbc_parse_parameter(buf + 4);
	391	#endif
72548e83	392
c9530948	393	buf++;
250c2277	394	}
250c2277 TG	395	return 0;
250c2277 TG	396	}
5c05917e	397
250c2277	398	early_param("earlyprintk", setup_early_printk);