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[thirdparty/kernel/stable.git] / arch / x86 / kernel / entry_64.S
CommitLineData
1da177e4
LT
1/*
2 * linux/arch/x86_64/entry.S
3 *
4 * Copyright (C) 1991, 1992 Linus Torvalds
5 * Copyright (C) 2000, 2001, 2002 Andi Kleen SuSE Labs
6 * Copyright (C) 2000 Pavel Machek <pavel@suse.cz>
1da177e4
LT
7 */
8
9/*
10 * entry.S contains the system-call and fault low-level handling routines.
11 *
8b4777a4
AL
12 * Some of this is documented in Documentation/x86/entry_64.txt
13 *
1da177e4
LT
14 * NOTE: This code handles signal-recognition, which happens every time
15 * after an interrupt and after each system call.
0bd7b798 16 *
0bd7b798 17 * A note on terminology:
7fcb3bc3 18 * - iret frame: Architecture defined interrupt frame from SS to RIP
0bd7b798 19 * at the top of the kernel process stack.
2e91a17b
AK
20 *
21 * Some macro usage:
22 * - CFI macros are used to generate dwarf2 unwind information for better
23 * backtraces. They don't change any code.
2e91a17b 24 * - ENTRY/END Define functions in the symbol table.
2e91a17b 25 * - TRACE_IRQ_* - Trace hard interrupt state for lock debugging.
cb5dd2c5 26 * - idtentry - Define exception entry points.
1da177e4
LT
27 */
28
1da177e4
LT
29#include <linux/linkage.h>
30#include <asm/segment.h>
1da177e4
LT
31#include <asm/cache.h>
32#include <asm/errno.h>
33#include <asm/dwarf2.h>
34#include <asm/calling.h>
e2d5df93 35#include <asm/asm-offsets.h>
1da177e4
LT
36#include <asm/msr.h>
37#include <asm/unistd.h>
38#include <asm/thread_info.h>
39#include <asm/hw_irq.h>
0341c14d 40#include <asm/page_types.h>
2601e64d 41#include <asm/irqflags.h>
72fe4858 42#include <asm/paravirt.h>
9939ddaf 43#include <asm/percpu.h>
d7abc0fa 44#include <asm/asm.h>
91d1aa43 45#include <asm/context_tracking.h>
63bcff2a 46#include <asm/smap.h>
3891a04a 47#include <asm/pgtable_types.h>
d7e7528b 48#include <linux/err.h>
1da177e4 49
86a1c34a
RM
50/* Avoid __ASSEMBLER__'ifying <linux/audit.h> just for this. */
51#include <linux/elf-em.h>
52#define AUDIT_ARCH_X86_64 (EM_X86_64|__AUDIT_ARCH_64BIT|__AUDIT_ARCH_LE)
53#define __AUDIT_ARCH_64BIT 0x80000000
54#define __AUDIT_ARCH_LE 0x40000000
55
1da177e4 56 .code64
ea714547
JO
57 .section .entry.text, "ax"
58
16444a8a 59
dc37db4d 60#ifndef CONFIG_PREEMPT
1da177e4 61#define retint_kernel retint_restore_args
0bd7b798 62#endif
2601e64d 63
72fe4858 64#ifdef CONFIG_PARAVIRT
2be29982 65ENTRY(native_usergs_sysret64)
72fe4858
GOC
66 swapgs
67 sysretq
b3baaa13 68ENDPROC(native_usergs_sysret64)
72fe4858
GOC
69#endif /* CONFIG_PARAVIRT */
70
2601e64d 71
f2db9382 72.macro TRACE_IRQS_IRETQ
2601e64d 73#ifdef CONFIG_TRACE_IRQFLAGS
f2db9382 74 bt $9,EFLAGS(%rsp) /* interrupts off? */
2601e64d
IM
75 jnc 1f
76 TRACE_IRQS_ON
771:
78#endif
79.endm
80
5963e317
SR
81/*
82 * When dynamic function tracer is enabled it will add a breakpoint
83 * to all locations that it is about to modify, sync CPUs, update
84 * all the code, sync CPUs, then remove the breakpoints. In this time
85 * if lockdep is enabled, it might jump back into the debug handler
86 * outside the updating of the IST protection. (TRACE_IRQS_ON/OFF).
87 *
88 * We need to change the IDT table before calling TRACE_IRQS_ON/OFF to
89 * make sure the stack pointer does not get reset back to the top
90 * of the debug stack, and instead just reuses the current stack.
91 */
92#if defined(CONFIG_DYNAMIC_FTRACE) && defined(CONFIG_TRACE_IRQFLAGS)
93
94.macro TRACE_IRQS_OFF_DEBUG
95 call debug_stack_set_zero
96 TRACE_IRQS_OFF
97 call debug_stack_reset
98.endm
99
100.macro TRACE_IRQS_ON_DEBUG
101 call debug_stack_set_zero
102 TRACE_IRQS_ON
103 call debug_stack_reset
104.endm
105
f2db9382
DV
106.macro TRACE_IRQS_IRETQ_DEBUG
107 bt $9,EFLAGS(%rsp) /* interrupts off? */
5963e317
SR
108 jnc 1f
109 TRACE_IRQS_ON_DEBUG
1101:
111.endm
112
113#else
114# define TRACE_IRQS_OFF_DEBUG TRACE_IRQS_OFF
115# define TRACE_IRQS_ON_DEBUG TRACE_IRQS_ON
116# define TRACE_IRQS_IRETQ_DEBUG TRACE_IRQS_IRETQ
117#endif
118
dcd072e2 119/*
e90e147c 120 * empty frame
dcd072e2
AH
121 */
122 .macro EMPTY_FRAME start=1 offset=0
7effaa88 123 .if \start
dcd072e2 124 CFI_STARTPROC simple
adf14236 125 CFI_SIGNAL_FRAME
dcd072e2 126 CFI_DEF_CFA rsp,8+\offset
7effaa88 127 .else
dcd072e2 128 CFI_DEF_CFA_OFFSET 8+\offset
7effaa88 129 .endif
1da177e4 130 .endm
d99015b1
AH
131
132/*
dcd072e2 133 * initial frame state for interrupts (and exceptions without error code)
d99015b1 134 */
dcd072e2 135 .macro INTR_FRAME start=1 offset=0
911d2bb5
DV
136 EMPTY_FRAME \start, 5*8+\offset
137 /*CFI_REL_OFFSET ss, 4*8+\offset*/
138 CFI_REL_OFFSET rsp, 3*8+\offset
139 /*CFI_REL_OFFSET rflags, 2*8+\offset*/
140 /*CFI_REL_OFFSET cs, 1*8+\offset*/
141 CFI_REL_OFFSET rip, 0*8+\offset
d99015b1
AH
142 .endm
143
d99015b1
AH
144/*
145 * initial frame state for exceptions with error code (and interrupts
146 * with vector already pushed)
147 */
dcd072e2 148 .macro XCPT_FRAME start=1 offset=0
911d2bb5 149 INTR_FRAME \start, 1*8+\offset
dcd072e2
AH
150 .endm
151
152/*
76f5df43 153 * frame that enables passing a complete pt_regs to a C function.
dcd072e2 154 */
76f5df43 155 .macro DEFAULT_FRAME start=1 offset=0
f2db9382
DV
156 XCPT_FRAME \start, ORIG_RAX+\offset
157 CFI_REL_OFFSET rdi, RDI+\offset
158 CFI_REL_OFFSET rsi, RSI+\offset
159 CFI_REL_OFFSET rdx, RDX+\offset
160 CFI_REL_OFFSET rcx, RCX+\offset
161 CFI_REL_OFFSET rax, RAX+\offset
162 CFI_REL_OFFSET r8, R8+\offset
163 CFI_REL_OFFSET r9, R9+\offset
164 CFI_REL_OFFSET r10, R10+\offset
165 CFI_REL_OFFSET r11, R11+\offset
dcd072e2
AH
166 CFI_REL_OFFSET rbx, RBX+\offset
167 CFI_REL_OFFSET rbp, RBP+\offset
168 CFI_REL_OFFSET r12, R12+\offset
169 CFI_REL_OFFSET r13, R13+\offset
170 CFI_REL_OFFSET r14, R14+\offset
171 CFI_REL_OFFSET r15, R15+\offset
172 .endm
d99015b1 173
1da177e4 174/*
b87cf63e 175 * 64bit SYSCALL instruction entry. Up to 6 arguments in registers.
1da177e4 176 *
b87cf63e
DV
177 * 64bit SYSCALL saves rip to rcx, clears rflags.RF, then saves rflags to r11,
178 * then loads new ss, cs, and rip from previously programmed MSRs.
179 * rflags gets masked by a value from another MSR (so CLD and CLAC
180 * are not needed). SYSCALL does not save anything on the stack
181 * and does not change rsp.
182 *
183 * Registers on entry:
1da177e4 184 * rax system call number
b87cf63e
DV
185 * rcx return address
186 * r11 saved rflags (note: r11 is callee-clobbered register in C ABI)
1da177e4 187 * rdi arg0
1da177e4 188 * rsi arg1
0bd7b798 189 * rdx arg2
b87cf63e 190 * r10 arg3 (needs to be moved to rcx to conform to C ABI)
1da177e4
LT
191 * r8 arg4
192 * r9 arg5
b87cf63e 193 * (note: r12-r15,rbp,rbx are callee-preserved in C ABI)
0bd7b798 194 *
1da177e4
LT
195 * Only called from user space.
196 *
7fcb3bc3 197 * When user can change pt_regs->foo always force IRET. That is because
7bf36bbc
AK
198 * it deals with uncanonical addresses better. SYSRET has trouble
199 * with them due to bugs in both AMD and Intel CPUs.
0bd7b798 200 */
1da177e4
LT
201
202ENTRY(system_call)
7effaa88 203 CFI_STARTPROC simple
adf14236 204 CFI_SIGNAL_FRAME
ef593260 205 CFI_DEF_CFA rsp,0
7effaa88
JB
206 CFI_REGISTER rip,rcx
207 /*CFI_REGISTER rflags,r11*/
9ed8e7d8
DV
208
209 /*
210 * Interrupts are off on entry.
211 * We do not frame this tiny irq-off block with TRACE_IRQS_OFF/ON,
212 * it is too small to ever cause noticeable irq latency.
213 */
72fe4858
GOC
214 SWAPGS_UNSAFE_STACK
215 /*
216 * A hypervisor implementation might want to use a label
217 * after the swapgs, so that it can do the swapgs
218 * for the guest and jump here on syscall.
219 */
f6b2bc84 220GLOBAL(system_call_after_swapgs)
72fe4858 221
c38e5038 222 movq %rsp,PER_CPU_VAR(rsp_scratch)
9af45651 223 movq PER_CPU_VAR(kernel_stack),%rsp
9ed8e7d8
DV
224
225 /* Construct struct pt_regs on stack */
226 pushq_cfi $__USER_DS /* pt_regs->ss */
227 pushq_cfi PER_CPU_VAR(rsp_scratch) /* pt_regs->sp */
33db1fd4 228 /*
9ed8e7d8
DV
229 * Re-enable interrupts.
230 * We use 'rsp_scratch' as a scratch space, hence irq-off block above
231 * must execute atomically in the face of possible interrupt-driven
232 * task preemption. We must enable interrupts only after we're done
233 * with using rsp_scratch:
33db1fd4
DV
234 */
235 ENABLE_INTERRUPTS(CLBR_NONE)
9ed8e7d8
DV
236 pushq_cfi %r11 /* pt_regs->flags */
237 pushq_cfi $__USER_CS /* pt_regs->cs */
238 pushq_cfi %rcx /* pt_regs->ip */
239 CFI_REL_OFFSET rip,0
240 pushq_cfi_reg rax /* pt_regs->orig_ax */
241 pushq_cfi_reg rdi /* pt_regs->di */
242 pushq_cfi_reg rsi /* pt_regs->si */
243 pushq_cfi_reg rdx /* pt_regs->dx */
244 pushq_cfi_reg rcx /* pt_regs->cx */
245 pushq_cfi $-ENOSYS /* pt_regs->ax */
246 pushq_cfi_reg r8 /* pt_regs->r8 */
247 pushq_cfi_reg r9 /* pt_regs->r9 */
248 pushq_cfi_reg r10 /* pt_regs->r10 */
a71ffdd7
DV
249 pushq_cfi_reg r11 /* pt_regs->r11 */
250 sub $(6*8),%rsp /* pt_regs->bp,bx,r12-15 not saved */
27be87c5 251 CFI_ADJUST_CFA_OFFSET 6*8
9ed8e7d8 252
dca5b52a 253 testl $_TIF_WORK_SYSCALL_ENTRY, ASM_THREAD_INFO(TI_flags, %rsp, SIZEOF_PTREGS)
1da177e4 254 jnz tracesys
86a1c34a 255system_call_fastpath:
fca460f9 256#if __SYSCALL_MASK == ~0
1da177e4 257 cmpq $__NR_syscall_max,%rax
fca460f9
PA
258#else
259 andl $__SYSCALL_MASK,%eax
260 cmpl $__NR_syscall_max,%eax
261#endif
146b2b09 262 ja 1f /* return -ENOSYS (already in pt_regs->ax) */
1da177e4 263 movq %r10,%rcx
146b2b09 264 call *sys_call_table(,%rax,8)
f2db9382 265 movq %rax,RAX(%rsp)
146b2b09 2661:
1da177e4 267/*
146b2b09
DV
268 * Syscall return path ending with SYSRET (fast path).
269 * Has incompletely filled pt_regs.
0bd7b798 270 */
10cd706d 271 LOCKDEP_SYS_EXIT
4416c5a6
DV
272 /*
273 * We do not frame this tiny irq-off block with TRACE_IRQS_OFF/ON,
274 * it is too small to ever cause noticeable irq latency.
275 */
72fe4858 276 DISABLE_INTERRUPTS(CLBR_NONE)
b3494a4a
AL
277
278 /*
279 * We must check ti flags with interrupts (or at least preemption)
280 * off because we must *never* return to userspace without
281 * processing exit work that is enqueued if we're preempted here.
282 * In particular, returning to userspace with any of the one-shot
283 * flags (TIF_NOTIFY_RESUME, TIF_USER_RETURN_NOTIFY, etc) set is
284 * very bad.
285 */
06ab9c1b
IM
286 testl $_TIF_ALLWORK_MASK, ASM_THREAD_INFO(TI_flags, %rsp, SIZEOF_PTREGS)
287 jnz int_ret_from_sys_call_irqs_off /* Go to the slow path */
b3494a4a 288
bcddc015 289 CFI_REMEMBER_STATE
4416c5a6 290
29722cd4
DV
291 RESTORE_C_REGS_EXCEPT_RCX_R11
292 movq RIP(%rsp),%rcx
7effaa88 293 CFI_REGISTER rip,rcx
29722cd4 294 movq EFLAGS(%rsp),%r11
7effaa88 295 /*CFI_REGISTER rflags,r11*/
263042e4 296 movq RSP(%rsp),%rsp
b87cf63e
DV
297 /*
298 * 64bit SYSRET restores rip from rcx,
299 * rflags from r11 (but RF and VM bits are forced to 0),
300 * cs and ss are loaded from MSRs.
4416c5a6 301 * Restoration of rflags re-enables interrupts.
b87cf63e 302 */
2be29982 303 USERGS_SYSRET64
1da177e4 304
bcddc015 305 CFI_RESTORE_STATE
1da177e4 306
7fcb3bc3 307 /* Do syscall entry tracing */
0bd7b798 308tracesys:
76f5df43 309 movq %rsp, %rdi
47eb582e 310 movl $AUDIT_ARCH_X86_64, %esi
1dcf74f6
AL
311 call syscall_trace_enter_phase1
312 test %rax, %rax
313 jnz tracesys_phase2 /* if needed, run the slow path */
76f5df43 314 RESTORE_C_REGS_EXCEPT_RAX /* else restore clobbered regs */
f2db9382 315 movq ORIG_RAX(%rsp), %rax
1dcf74f6
AL
316 jmp system_call_fastpath /* and return to the fast path */
317
318tracesys_phase2:
76f5df43 319 SAVE_EXTRA_REGS
1dcf74f6 320 movq %rsp, %rdi
47eb582e 321 movl $AUDIT_ARCH_X86_64, %esi
1dcf74f6
AL
322 movq %rax,%rdx
323 call syscall_trace_enter_phase2
324
d4d67150 325 /*
e90e147c 326 * Reload registers from stack in case ptrace changed them.
1dcf74f6 327 * We don't reload %rax because syscall_trace_entry_phase2() returned
d4d67150
RM
328 * the value it wants us to use in the table lookup.
329 */
76f5df43
DV
330 RESTORE_C_REGS_EXCEPT_RAX
331 RESTORE_EXTRA_REGS
fca460f9 332#if __SYSCALL_MASK == ~0
1da177e4 333 cmpq $__NR_syscall_max,%rax
fca460f9
PA
334#else
335 andl $__SYSCALL_MASK,%eax
336 cmpl $__NR_syscall_max,%eax
337#endif
54eea995 338 ja int_ret_from_sys_call /* RAX(%rsp) is already set */
1da177e4
LT
339 movq %r10,%rcx /* fixup for C */
340 call *sys_call_table(,%rax,8)
f2db9382 341 movq %rax,RAX(%rsp)
7fcb3bc3 342 /* Use IRET because user could have changed pt_regs->foo */
0bd7b798
AH
343
344/*
1da177e4 345 * Syscall return path ending with IRET.
7fcb3bc3 346 * Has correct iret frame.
bcddc015 347 */
bc8b2b92 348GLOBAL(int_ret_from_sys_call)
72fe4858 349 DISABLE_INTERRUPTS(CLBR_NONE)
4416c5a6 350int_ret_from_sys_call_irqs_off: /* jumps come here from the irqs-off SYSRET path */
2601e64d 351 TRACE_IRQS_OFF
1da177e4
LT
352 movl $_TIF_ALLWORK_MASK,%edi
353 /* edi: mask to check */
bc8b2b92 354GLOBAL(int_with_check)
10cd706d 355 LOCKDEP_SYS_EXIT_IRQ
1da177e4 356 GET_THREAD_INFO(%rcx)
26ccb8a7 357 movl TI_flags(%rcx),%edx
1da177e4
LT
358 andl %edi,%edx
359 jnz int_careful
26ccb8a7 360 andl $~TS_COMPAT,TI_status(%rcx)
1da177e4
LT
361 jmp retint_swapgs
362
363 /* Either reschedule or signal or syscall exit tracking needed. */
364 /* First do a reschedule test. */
365 /* edx: work, edi: workmask */
366int_careful:
367 bt $TIF_NEED_RESCHED,%edx
368 jnc int_very_careful
2601e64d 369 TRACE_IRQS_ON
72fe4858 370 ENABLE_INTERRUPTS(CLBR_NONE)
df5d1874 371 pushq_cfi %rdi
0430499c 372 SCHEDULE_USER
df5d1874 373 popq_cfi %rdi
72fe4858 374 DISABLE_INTERRUPTS(CLBR_NONE)
2601e64d 375 TRACE_IRQS_OFF
1da177e4
LT
376 jmp int_with_check
377
7fcb3bc3 378 /* handle signals and tracing -- both require a full pt_regs */
1da177e4 379int_very_careful:
2601e64d 380 TRACE_IRQS_ON
72fe4858 381 ENABLE_INTERRUPTS(CLBR_NONE)
76f5df43 382 SAVE_EXTRA_REGS
0bd7b798 383 /* Check for syscall exit trace */
d4d67150 384 testl $_TIF_WORK_SYSCALL_EXIT,%edx
1da177e4 385 jz int_signal
df5d1874 386 pushq_cfi %rdi
0bd7b798 387 leaq 8(%rsp),%rdi # &ptregs -> arg1
1da177e4 388 call syscall_trace_leave
df5d1874 389 popq_cfi %rdi
d4d67150 390 andl $~(_TIF_WORK_SYSCALL_EXIT|_TIF_SYSCALL_EMU),%edi
1da177e4 391 jmp int_restore_rest
0bd7b798 392
1da177e4 393int_signal:
8f4d37ec 394 testl $_TIF_DO_NOTIFY_MASK,%edx
1da177e4
LT
395 jz 1f
396 movq %rsp,%rdi # &ptregs -> arg1
397 xorl %esi,%esi # oldset -> arg2
398 call do_notify_resume
eca91e78 3991: movl $_TIF_WORK_MASK,%edi
1da177e4 400int_restore_rest:
76f5df43 401 RESTORE_EXTRA_REGS
72fe4858 402 DISABLE_INTERRUPTS(CLBR_NONE)
2601e64d 403 TRACE_IRQS_OFF
1da177e4
LT
404 jmp int_with_check
405 CFI_ENDPROC
bcddc015 406END(system_call)
0bd7b798 407
1d4b4b29
AV
408 .macro FORK_LIKE func
409ENTRY(stub_\func)
410 CFI_STARTPROC
76f5df43
DV
411 DEFAULT_FRAME 0, 8 /* offset 8: return address */
412 SAVE_EXTRA_REGS 8
1d4b4b29 413 call sys_\func
76f5df43 414 ret
1d4b4b29
AV
415 CFI_ENDPROC
416END(stub_\func)
417 .endm
418
419 FORK_LIKE clone
420 FORK_LIKE fork
421 FORK_LIKE vfork
1da177e4 422
1da177e4
LT
423ENTRY(stub_execve)
424 CFI_STARTPROC
e6b04b6b 425 addq $8, %rsp
76f5df43
DV
426 DEFAULT_FRAME 0
427 SAVE_EXTRA_REGS
1da177e4 428 call sys_execve
1da177e4 429 movq %rax,RAX(%rsp)
76f5df43 430 RESTORE_EXTRA_REGS
1da177e4
LT
431 jmp int_ret_from_sys_call
432 CFI_ENDPROC
4b787e0b 433END(stub_execve)
0bd7b798 434
27d6ec7a
DD
435ENTRY(stub_execveat)
436 CFI_STARTPROC
437 addq $8, %rsp
76f5df43
DV
438 DEFAULT_FRAME 0
439 SAVE_EXTRA_REGS
27d6ec7a 440 call sys_execveat
27d6ec7a 441 movq %rax,RAX(%rsp)
76f5df43 442 RESTORE_EXTRA_REGS
27d6ec7a
DD
443 jmp int_ret_from_sys_call
444 CFI_ENDPROC
445END(stub_execveat)
446
1da177e4
LT
447/*
448 * sigreturn is special because it needs to restore all registers on return.
449 * This cannot be done with SYSRET, so use the IRET return path instead.
0bd7b798 450 */
1da177e4
LT
451ENTRY(stub_rt_sigreturn)
452 CFI_STARTPROC
7effaa88 453 addq $8, %rsp
76f5df43
DV
454 DEFAULT_FRAME 0
455 SAVE_EXTRA_REGS
1da177e4
LT
456 call sys_rt_sigreturn
457 movq %rax,RAX(%rsp) # fixme, this could be done at the higher layer
76f5df43 458 RESTORE_EXTRA_REGS
1da177e4
LT
459 jmp int_ret_from_sys_call
460 CFI_ENDPROC
4b787e0b 461END(stub_rt_sigreturn)
1da177e4 462
c5a37394 463#ifdef CONFIG_X86_X32_ABI
c5a37394
PA
464ENTRY(stub_x32_rt_sigreturn)
465 CFI_STARTPROC
466 addq $8, %rsp
76f5df43
DV
467 DEFAULT_FRAME 0
468 SAVE_EXTRA_REGS
c5a37394
PA
469 call sys32_x32_rt_sigreturn
470 movq %rax,RAX(%rsp) # fixme, this could be done at the higher layer
76f5df43 471 RESTORE_EXTRA_REGS
c5a37394
PA
472 jmp int_ret_from_sys_call
473 CFI_ENDPROC
474END(stub_x32_rt_sigreturn)
475
d1a797f3
PA
476ENTRY(stub_x32_execve)
477 CFI_STARTPROC
478 addq $8, %rsp
76f5df43
DV
479 DEFAULT_FRAME 0
480 SAVE_EXTRA_REGS
6783eaa2 481 call compat_sys_execve
d1a797f3 482 movq %rax,RAX(%rsp)
76f5df43 483 RESTORE_EXTRA_REGS
d1a797f3
PA
484 jmp int_ret_from_sys_call
485 CFI_ENDPROC
486END(stub_x32_execve)
487
27d6ec7a
DD
488ENTRY(stub_x32_execveat)
489 CFI_STARTPROC
490 addq $8, %rsp
76f5df43
DV
491 DEFAULT_FRAME 0
492 SAVE_EXTRA_REGS
27d6ec7a 493 call compat_sys_execveat
27d6ec7a 494 movq %rax,RAX(%rsp)
76f5df43 495 RESTORE_EXTRA_REGS
27d6ec7a
DD
496 jmp int_ret_from_sys_call
497 CFI_ENDPROC
498END(stub_x32_execveat)
499
c5a37394
PA
500#endif
501
1eeb207f
DV
502/*
503 * A newly forked process directly context switches into this address.
504 *
505 * rdi: prev task we switched from
506 */
507ENTRY(ret_from_fork)
508 DEFAULT_FRAME
509
510 LOCK ; btr $TIF_FORK,TI_flags(%r8)
511
512 pushq_cfi $0x0002
513 popfq_cfi # reset kernel eflags
514
515 call schedule_tail # rdi: 'prev' task parameter
516
517 GET_THREAD_INFO(%rcx)
518
519 RESTORE_EXTRA_REGS
520
521 testl $3,CS(%rsp) # from kernel_thread?
522 jz 1f
523
1e3fbb8a
AL
524 /*
525 * By the time we get here, we have no idea whether our pt_regs,
526 * ti flags, and ti status came from the 64-bit SYSCALL fast path,
527 * the slow path, or one of the ia32entry paths.
528 * Use int_ret_from_sys_call to return, since it can safely handle
529 * all of the above.
530 */
531 jmp int_ret_from_sys_call
1eeb207f
DV
532
5331:
534 movq %rbp, %rdi
535 call *%rbx
536 movl $0, RAX(%rsp)
537 RESTORE_EXTRA_REGS
538 jmp int_ret_from_sys_call
539 CFI_ENDPROC
540END(ret_from_fork)
541
939b7871
PA
542/*
543 * Build the entry stubs and pointer table with some assembler magic.
544 * We pack 7 stubs into a single 32-byte chunk, which will fit in a
545 * single cache line on all modern x86 implementations.
546 */
547 .section .init.rodata,"a"
548ENTRY(interrupt)
ea714547 549 .section .entry.text
939b7871
PA
550 .p2align 5
551 .p2align CONFIG_X86_L1_CACHE_SHIFT
552ENTRY(irq_entries_start)
553 INTR_FRAME
554vector=FIRST_EXTERNAL_VECTOR
2414e021 555.rept (FIRST_SYSTEM_VECTOR-FIRST_EXTERNAL_VECTOR+6)/7
939b7871
PA
556 .balign 32
557 .rept 7
2414e021 558 .if vector < FIRST_SYSTEM_VECTOR
8665596e 559 .if vector <> FIRST_EXTERNAL_VECTOR
939b7871
PA
560 CFI_ADJUST_CFA_OFFSET -8
561 .endif
df5d1874 5621: pushq_cfi $(~vector+0x80) /* Note: always in signed byte range */
8665596e 563 .if ((vector-FIRST_EXTERNAL_VECTOR)%7) <> 6
939b7871
PA
564 jmp 2f
565 .endif
566 .previous
567 .quad 1b
ea714547 568 .section .entry.text
939b7871
PA
569vector=vector+1
570 .endif
571 .endr
5722: jmp common_interrupt
573.endr
574 CFI_ENDPROC
575END(irq_entries_start)
576
577.previous
578END(interrupt)
579.previous
580
d99015b1 581/*
1da177e4
LT
582 * Interrupt entry/exit.
583 *
584 * Interrupt entry points save only callee clobbered registers in fast path.
d99015b1
AH
585 *
586 * Entry runs with interrupts off.
587 */
1da177e4 588
722024db 589/* 0(%rsp): ~(interrupt number) */
1da177e4 590 .macro interrupt func
f6f64681 591 cld
e90e147c
DV
592 /*
593 * Since nothing in interrupt handling code touches r12...r15 members
594 * of "struct pt_regs", and since interrupts can nest, we can save
595 * four stack slots and simultaneously provide
596 * an unwind-friendly stack layout by saving "truncated" pt_regs
597 * exactly up to rbp slot, without these members.
598 */
76f5df43
DV
599 ALLOC_PT_GPREGS_ON_STACK -RBP
600 SAVE_C_REGS -RBP
601 /* this goes to 0(%rsp) for unwinder, not for saving the value: */
602 SAVE_EXTRA_REGS_RBP -RBP
603
604 leaq -RBP(%rsp),%rdi /* arg1 for \func (pointer to pt_regs) */
f6f64681 605
76f5df43 606 testl $3, CS-RBP(%rsp)
f6f64681
DV
607 je 1f
608 SWAPGS
76f5df43 6091:
f6f64681 610 /*
e90e147c 611 * Save previous stack pointer, optionally switch to interrupt stack.
f6f64681
DV
612 * irq_count is used to check if a CPU is already on an interrupt stack
613 * or not. While this is essentially redundant with preempt_count it is
614 * a little cheaper to use a separate counter in the PDA (short of
615 * moving irq_enter into assembly, which would be too much work)
616 */
76f5df43
DV
617 movq %rsp, %rsi
618 incl PER_CPU_VAR(irq_count)
f6f64681
DV
619 cmovzq PER_CPU_VAR(irq_stack_ptr),%rsp
620 CFI_DEF_CFA_REGISTER rsi
f6f64681 621 pushq %rsi
911d2bb5
DV
622 /*
623 * For debugger:
624 * "CFA (Current Frame Address) is the value on stack + offset"
625 */
f6f64681 626 CFI_ESCAPE 0x0f /* DW_CFA_def_cfa_expression */, 6, \
911d2bb5 627 0x77 /* DW_OP_breg7 (rsp) */, 0, \
f6f64681 628 0x06 /* DW_OP_deref */, \
911d2bb5 629 0x08 /* DW_OP_const1u */, SIZEOF_PTREGS-RBP, \
f6f64681
DV
630 0x22 /* DW_OP_plus */
631 /* We entered an interrupt context - irqs are off: */
632 TRACE_IRQS_OFF
633
1da177e4
LT
634 call \func
635 .endm
636
722024db
AH
637 /*
638 * The interrupt stubs push (~vector+0x80) onto the stack and
639 * then jump to common_interrupt.
640 */
939b7871
PA
641 .p2align CONFIG_X86_L1_CACHE_SHIFT
642common_interrupt:
7effaa88 643 XCPT_FRAME
ee4eb87b 644 ASM_CLAC
722024db 645 addq $-0x80,(%rsp) /* Adjust vector to [-256,-1] range */
1da177e4 646 interrupt do_IRQ
34061f13 647 /* 0(%rsp): old RSP */
7effaa88 648ret_from_intr:
72fe4858 649 DISABLE_INTERRUPTS(CLBR_NONE)
2601e64d 650 TRACE_IRQS_OFF
56895530 651 decl PER_CPU_VAR(irq_count)
625dbc3b 652
a2bbe750
FW
653 /* Restore saved previous stack */
654 popq %rsi
911d2bb5 655 CFI_DEF_CFA rsi,SIZEOF_PTREGS-RBP /* reg/off reset after def_cfa_expr */
e90e147c 656 /* return code expects complete pt_regs - adjust rsp accordingly: */
f2db9382 657 leaq -RBP(%rsi),%rsp
7effaa88 658 CFI_DEF_CFA_REGISTER rsp
f2db9382 659 CFI_ADJUST_CFA_OFFSET RBP
625dbc3b 660
7effaa88 661exit_intr:
f2db9382 662 testl $3,CS(%rsp)
1da177e4 663 je retint_kernel
1da177e4 664 /* Interrupt came from user space */
a3675b32
DV
665
666 GET_THREAD_INFO(%rcx)
1da177e4 667 /*
1da177e4 668 * %rcx: thread info. Interrupts off.
0bd7b798 669 */
1da177e4
LT
670retint_with_reschedule:
671 movl $_TIF_WORK_MASK,%edi
7effaa88 672retint_check:
10cd706d 673 LOCKDEP_SYS_EXIT_IRQ
26ccb8a7 674 movl TI_flags(%rcx),%edx
1da177e4 675 andl %edi,%edx
7effaa88 676 CFI_REMEMBER_STATE
1da177e4 677 jnz retint_careful
10cd706d
PZ
678
679retint_swapgs: /* return to user-space */
2601e64d
IM
680 /*
681 * The iretq could re-enable interrupts:
682 */
72fe4858 683 DISABLE_INTERRUPTS(CLBR_ANY)
2601e64d 684 TRACE_IRQS_IRETQ
2a23c6b8
AL
685
686 /*
687 * Try to use SYSRET instead of IRET if we're returning to
688 * a completely clean 64-bit userspace context.
689 */
f2db9382
DV
690 movq RCX(%rsp),%rcx
691 cmpq %rcx,RIP(%rsp) /* RCX == RIP */
2a23c6b8
AL
692 jne opportunistic_sysret_failed
693
694 /*
695 * On Intel CPUs, sysret with non-canonical RCX/RIP will #GP
696 * in kernel space. This essentially lets the user take over
697 * the kernel, since userspace controls RSP. It's not worth
698 * testing for canonicalness exactly -- this check detects any
699 * of the 17 high bits set, which is true for non-canonical
700 * or kernel addresses. (This will pessimize vsyscall=native.
701 * Big deal.)
702 *
703 * If virtual addresses ever become wider, this will need
704 * to be updated to remain correct on both old and new CPUs.
705 */
706 .ifne __VIRTUAL_MASK_SHIFT - 47
707 .error "virtual address width changed -- sysret checks need update"
708 .endif
709 shr $__VIRTUAL_MASK_SHIFT, %rcx
710 jnz opportunistic_sysret_failed
711
f2db9382 712 cmpq $__USER_CS,CS(%rsp) /* CS must match SYSRET */
2a23c6b8
AL
713 jne opportunistic_sysret_failed
714
f2db9382
DV
715 movq R11(%rsp),%r11
716 cmpq %r11,EFLAGS(%rsp) /* R11 == RFLAGS */
2a23c6b8
AL
717 jne opportunistic_sysret_failed
718
f2db9382 719 testq $X86_EFLAGS_RF,%r11 /* sysret can't restore RF */
2a23c6b8
AL
720 jnz opportunistic_sysret_failed
721
722 /* nothing to check for RSP */
723
f2db9382 724 cmpq $__USER_DS,SS(%rsp) /* SS must match SYSRET */
2a23c6b8
AL
725 jne opportunistic_sysret_failed
726
727 /*
728 * We win! This label is here just for ease of understanding
729 * perf profiles. Nothing jumps here.
730 */
731irq_return_via_sysret:
732 CFI_REMEMBER_STATE
d441c1f2
DV
733 /* r11 is already restored (see code above) */
734 RESTORE_C_REGS_EXCEPT_R11
735 movq RSP(%rsp),%rsp
2a23c6b8
AL
736 USERGS_SYSRET64
737 CFI_RESTORE_STATE
738
739opportunistic_sysret_failed:
72fe4858 740 SWAPGS
2601e64d
IM
741 jmp restore_args
742
627276cb
DV
743/* Returning to kernel space */
744#ifdef CONFIG_PREEMPT
745 /* Interrupts are off */
746 /* Check if we need preemption */
747ENTRY(retint_kernel)
748 cmpl $0,PER_CPU_VAR(__preempt_count)
749 jnz retint_restore_args
750 bt $9,EFLAGS(%rsp) /* interrupts were off? */
751 jnc retint_restore_args
752 call preempt_schedule_irq
753 jmp exit_intr
754#endif
755retint_restore_args:
72fe4858 756 DISABLE_INTERRUPTS(CLBR_ANY)
2601e64d
IM
757 /*
758 * The iretq could re-enable interrupts:
759 */
760 TRACE_IRQS_IRETQ
761restore_args:
76f5df43
DV
762 RESTORE_C_REGS
763 REMOVE_PT_GPREGS_FROM_STACK 8
3701d863 764
f7f3d791 765irq_return:
7209a75d
AL
766 INTERRUPT_RETURN
767
768ENTRY(native_iret)
3891a04a
PA
769 /*
770 * Are we returning to a stack segment from the LDT? Note: in
771 * 64-bit mode SS:RSP on the exception stack is always valid.
772 */
34273f41 773#ifdef CONFIG_X86_ESPFIX64
3891a04a 774 testb $4,(SS-RIP)(%rsp)
7209a75d 775 jnz native_irq_return_ldt
34273f41 776#endif
3891a04a 777
af726f21 778.global native_irq_return_iret
7209a75d 779native_irq_return_iret:
b645af2d
AL
780 /*
781 * This may fault. Non-paranoid faults on return to userspace are
782 * handled by fixup_bad_iret. These include #SS, #GP, and #NP.
783 * Double-faults due to espfix64 are handled in do_double_fault.
784 * Other faults here are fatal.
785 */
1da177e4 786 iretq
3701d863 787
34273f41 788#ifdef CONFIG_X86_ESPFIX64
7209a75d 789native_irq_return_ldt:
3891a04a
PA
790 pushq_cfi %rax
791 pushq_cfi %rdi
792 SWAPGS
793 movq PER_CPU_VAR(espfix_waddr),%rdi
794 movq %rax,(0*8)(%rdi) /* RAX */
795 movq (2*8)(%rsp),%rax /* RIP */
796 movq %rax,(1*8)(%rdi)
797 movq (3*8)(%rsp),%rax /* CS */
798 movq %rax,(2*8)(%rdi)
799 movq (4*8)(%rsp),%rax /* RFLAGS */
800 movq %rax,(3*8)(%rdi)
801 movq (6*8)(%rsp),%rax /* SS */
802 movq %rax,(5*8)(%rdi)
803 movq (5*8)(%rsp),%rax /* RSP */
804 movq %rax,(4*8)(%rdi)
805 andl $0xffff0000,%eax
806 popq_cfi %rdi
807 orq PER_CPU_VAR(espfix_stack),%rax
808 SWAPGS
809 movq %rax,%rsp
810 popq_cfi %rax
7209a75d 811 jmp native_irq_return_iret
34273f41 812#endif
3891a04a 813
7effaa88 814 /* edi: workmask, edx: work */
1da177e4 815retint_careful:
7effaa88 816 CFI_RESTORE_STATE
1da177e4
LT
817 bt $TIF_NEED_RESCHED,%edx
818 jnc retint_signal
2601e64d 819 TRACE_IRQS_ON
72fe4858 820 ENABLE_INTERRUPTS(CLBR_NONE)
df5d1874 821 pushq_cfi %rdi
0430499c 822 SCHEDULE_USER
df5d1874 823 popq_cfi %rdi
1da177e4 824 GET_THREAD_INFO(%rcx)
72fe4858 825 DISABLE_INTERRUPTS(CLBR_NONE)
2601e64d 826 TRACE_IRQS_OFF
1da177e4 827 jmp retint_check
0bd7b798 828
1da177e4 829retint_signal:
8f4d37ec 830 testl $_TIF_DO_NOTIFY_MASK,%edx
10ffdbb8 831 jz retint_swapgs
2601e64d 832 TRACE_IRQS_ON
72fe4858 833 ENABLE_INTERRUPTS(CLBR_NONE)
76f5df43 834 SAVE_EXTRA_REGS
0bd7b798 835 movq $-1,ORIG_RAX(%rsp)
3829ee6b 836 xorl %esi,%esi # oldset
1da177e4
LT
837 movq %rsp,%rdi # &pt_regs
838 call do_notify_resume
76f5df43 839 RESTORE_EXTRA_REGS
72fe4858 840 DISABLE_INTERRUPTS(CLBR_NONE)
2601e64d 841 TRACE_IRQS_OFF
be9e6870 842 GET_THREAD_INFO(%rcx)
eca91e78 843 jmp retint_with_reschedule
1da177e4 844
1da177e4 845 CFI_ENDPROC
4b787e0b 846END(common_interrupt)
3891a04a 847
1da177e4
LT
848/*
849 * APIC interrupts.
0bd7b798 850 */
cf910e83 851.macro apicinterrupt3 num sym do_sym
322648d1 852ENTRY(\sym)
7effaa88 853 INTR_FRAME
ee4eb87b 854 ASM_CLAC
df5d1874 855 pushq_cfi $~(\num)
39e95433 856.Lcommon_\sym:
322648d1 857 interrupt \do_sym
1da177e4
LT
858 jmp ret_from_intr
859 CFI_ENDPROC
322648d1
AH
860END(\sym)
861.endm
1da177e4 862
cf910e83
SA
863#ifdef CONFIG_TRACING
864#define trace(sym) trace_##sym
865#define smp_trace(sym) smp_trace_##sym
866
867.macro trace_apicinterrupt num sym
868apicinterrupt3 \num trace(\sym) smp_trace(\sym)
869.endm
870#else
871.macro trace_apicinterrupt num sym do_sym
872.endm
873#endif
874
875.macro apicinterrupt num sym do_sym
876apicinterrupt3 \num \sym \do_sym
877trace_apicinterrupt \num \sym
878.endm
879
322648d1 880#ifdef CONFIG_SMP
cf910e83 881apicinterrupt3 IRQ_MOVE_CLEANUP_VECTOR \
322648d1 882 irq_move_cleanup_interrupt smp_irq_move_cleanup_interrupt
cf910e83 883apicinterrupt3 REBOOT_VECTOR \
4ef702c1 884 reboot_interrupt smp_reboot_interrupt
322648d1 885#endif
1da177e4 886
03b48632 887#ifdef CONFIG_X86_UV
cf910e83 888apicinterrupt3 UV_BAU_MESSAGE \
322648d1 889 uv_bau_message_intr1 uv_bau_message_interrupt
03b48632 890#endif
322648d1
AH
891apicinterrupt LOCAL_TIMER_VECTOR \
892 apic_timer_interrupt smp_apic_timer_interrupt
4a4de9c7
DS
893apicinterrupt X86_PLATFORM_IPI_VECTOR \
894 x86_platform_ipi smp_x86_platform_ipi
89b831ef 895
d78f2664 896#ifdef CONFIG_HAVE_KVM
cf910e83 897apicinterrupt3 POSTED_INTR_VECTOR \
d78f2664
YZ
898 kvm_posted_intr_ipi smp_kvm_posted_intr_ipi
899#endif
900
33e5ff63 901#ifdef CONFIG_X86_MCE_THRESHOLD
322648d1 902apicinterrupt THRESHOLD_APIC_VECTOR \
7856f6cc 903 threshold_interrupt smp_threshold_interrupt
33e5ff63
SA
904#endif
905
906#ifdef CONFIG_X86_THERMAL_VECTOR
322648d1
AH
907apicinterrupt THERMAL_APIC_VECTOR \
908 thermal_interrupt smp_thermal_interrupt
33e5ff63 909#endif
1812924b 910
322648d1
AH
911#ifdef CONFIG_SMP
912apicinterrupt CALL_FUNCTION_SINGLE_VECTOR \
913 call_function_single_interrupt smp_call_function_single_interrupt
914apicinterrupt CALL_FUNCTION_VECTOR \
915 call_function_interrupt smp_call_function_interrupt
916apicinterrupt RESCHEDULE_VECTOR \
917 reschedule_interrupt smp_reschedule_interrupt
918#endif
1da177e4 919
322648d1
AH
920apicinterrupt ERROR_APIC_VECTOR \
921 error_interrupt smp_error_interrupt
922apicinterrupt SPURIOUS_APIC_VECTOR \
923 spurious_interrupt smp_spurious_interrupt
0bd7b798 924
e360adbe
PZ
925#ifdef CONFIG_IRQ_WORK
926apicinterrupt IRQ_WORK_VECTOR \
927 irq_work_interrupt smp_irq_work_interrupt
241771ef
IM
928#endif
929
1da177e4
LT
930/*
931 * Exception entry points.
0bd7b798 932 */
9b476688 933#define CPU_TSS_IST(x) PER_CPU_VAR(cpu_tss) + (TSS_ist + ((x) - 1) * 8)
577ed45e
AL
934
935.macro idtentry sym do_sym has_error_code:req paranoid=0 shift_ist=-1
322648d1 936ENTRY(\sym)
577ed45e
AL
937 /* Sanity check */
938 .if \shift_ist != -1 && \paranoid == 0
939 .error "using shift_ist requires paranoid=1"
940 .endif
941
cb5dd2c5
AL
942 .if \has_error_code
943 XCPT_FRAME
944 .else
7effaa88 945 INTR_FRAME
cb5dd2c5 946 .endif
1da177e4 947
ee4eb87b 948 ASM_CLAC
b8b1d08b 949 PARAVIRT_ADJUST_EXCEPTION_FRAME
cb5dd2c5
AL
950
951 .ifeq \has_error_code
952 pushq_cfi $-1 /* ORIG_RAX: no syscall to restart */
953 .endif
954
76f5df43 955 ALLOC_PT_GPREGS_ON_STACK
cb5dd2c5
AL
956
957 .if \paranoid
48e08d0f
AL
958 .if \paranoid == 1
959 CFI_REMEMBER_STATE
960 testl $3, CS(%rsp) /* If coming from userspace, switch */
961 jnz 1f /* stacks. */
962 .endif
ebfc453e 963 call paranoid_entry
cb5dd2c5
AL
964 .else
965 call error_entry
966 .endif
ebfc453e 967 /* returned flag: ebx=0: need swapgs on exit, ebx=1: don't need it */
cb5dd2c5 968
1bd24efc 969 DEFAULT_FRAME 0
cb5dd2c5
AL
970
971 .if \paranoid
577ed45e
AL
972 .if \shift_ist != -1
973 TRACE_IRQS_OFF_DEBUG /* reload IDT in case of recursion */
974 .else
b8b1d08b 975 TRACE_IRQS_OFF
cb5dd2c5 976 .endif
577ed45e 977 .endif
cb5dd2c5
AL
978
979 movq %rsp,%rdi /* pt_regs pointer */
980
981 .if \has_error_code
982 movq ORIG_RAX(%rsp),%rsi /* get error code */
983 movq $-1,ORIG_RAX(%rsp) /* no syscall to restart */
984 .else
985 xorl %esi,%esi /* no error code */
986 .endif
987
577ed45e 988 .if \shift_ist != -1
9b476688 989 subq $EXCEPTION_STKSZ, CPU_TSS_IST(\shift_ist)
577ed45e
AL
990 .endif
991
322648d1 992 call \do_sym
cb5dd2c5 993
577ed45e 994 .if \shift_ist != -1
9b476688 995 addq $EXCEPTION_STKSZ, CPU_TSS_IST(\shift_ist)
577ed45e
AL
996 .endif
997
ebfc453e 998 /* these procedures expect "no swapgs" flag in ebx */
cb5dd2c5 999 .if \paranoid
ebfc453e 1000 jmp paranoid_exit
cb5dd2c5 1001 .else
ebfc453e 1002 jmp error_exit
cb5dd2c5
AL
1003 .endif
1004
48e08d0f
AL
1005 .if \paranoid == 1
1006 CFI_RESTORE_STATE
1007 /*
1008 * Paranoid entry from userspace. Switch stacks and treat it
1009 * as a normal entry. This means that paranoid handlers
1010 * run in real process context if user_mode(regs).
1011 */
10121:
1013 call error_entry
1014
1015 DEFAULT_FRAME 0
1016
1017 movq %rsp,%rdi /* pt_regs pointer */
1018 call sync_regs
1019 movq %rax,%rsp /* switch stack */
1020
1021 movq %rsp,%rdi /* pt_regs pointer */
1022
1023 .if \has_error_code
1024 movq ORIG_RAX(%rsp),%rsi /* get error code */
1025 movq $-1,ORIG_RAX(%rsp) /* no syscall to restart */
1026 .else
1027 xorl %esi,%esi /* no error code */
1028 .endif
1029
1030 call \do_sym
1031
1032 jmp error_exit /* %ebx: no swapgs flag */
1033 .endif
1034
b8b1d08b 1035 CFI_ENDPROC
ddeb8f21 1036END(\sym)
322648d1 1037.endm
b8b1d08b 1038
25c74b10 1039#ifdef CONFIG_TRACING
cb5dd2c5
AL
1040.macro trace_idtentry sym do_sym has_error_code:req
1041idtentry trace(\sym) trace(\do_sym) has_error_code=\has_error_code
1042idtentry \sym \do_sym has_error_code=\has_error_code
25c74b10
SA
1043.endm
1044#else
cb5dd2c5
AL
1045.macro trace_idtentry sym do_sym has_error_code:req
1046idtentry \sym \do_sym has_error_code=\has_error_code
25c74b10
SA
1047.endm
1048#endif
1049
cb5dd2c5
AL
1050idtentry divide_error do_divide_error has_error_code=0
1051idtentry overflow do_overflow has_error_code=0
1052idtentry bounds do_bounds has_error_code=0
1053idtentry invalid_op do_invalid_op has_error_code=0
1054idtentry device_not_available do_device_not_available has_error_code=0
48e08d0f 1055idtentry double_fault do_double_fault has_error_code=1 paranoid=2
cb5dd2c5
AL
1056idtentry coprocessor_segment_overrun do_coprocessor_segment_overrun has_error_code=0
1057idtentry invalid_TSS do_invalid_TSS has_error_code=1
1058idtentry segment_not_present do_segment_not_present has_error_code=1
1059idtentry spurious_interrupt_bug do_spurious_interrupt_bug has_error_code=0
1060idtentry coprocessor_error do_coprocessor_error has_error_code=0
1061idtentry alignment_check do_alignment_check has_error_code=1
1062idtentry simd_coprocessor_error do_simd_coprocessor_error has_error_code=0
5cec93c2 1063
2601e64d 1064
9f1e87ea
CG
1065 /* Reload gs selector with exception handling */
1066 /* edi: new selector */
9f9d489a 1067ENTRY(native_load_gs_index)
7effaa88 1068 CFI_STARTPROC
df5d1874 1069 pushfq_cfi
b8aa287f 1070 DISABLE_INTERRUPTS(CLBR_ANY & ~CLBR_RDI)
9f1e87ea 1071 SWAPGS
0bd7b798 1072gs_change:
9f1e87ea 1073 movl %edi,%gs
1da177e4 10742: mfence /* workaround */
72fe4858 1075 SWAPGS
df5d1874 1076 popfq_cfi
9f1e87ea 1077 ret
7effaa88 1078 CFI_ENDPROC
6efdcfaf 1079END(native_load_gs_index)
0bd7b798 1080
d7abc0fa 1081 _ASM_EXTABLE(gs_change,bad_gs)
9f1e87ea 1082 .section .fixup,"ax"
1da177e4 1083 /* running with kernelgs */
0bd7b798 1084bad_gs:
72fe4858 1085 SWAPGS /* switch back to user gs */
1da177e4 1086 xorl %eax,%eax
9f1e87ea
CG
1087 movl %eax,%gs
1088 jmp 2b
1089 .previous
0bd7b798 1090
2699500b 1091/* Call softirq on interrupt stack. Interrupts are off. */
7d65f4a6 1092ENTRY(do_softirq_own_stack)
7effaa88 1093 CFI_STARTPROC
df5d1874 1094 pushq_cfi %rbp
2699500b
AK
1095 CFI_REL_OFFSET rbp,0
1096 mov %rsp,%rbp
1097 CFI_DEF_CFA_REGISTER rbp
56895530 1098 incl PER_CPU_VAR(irq_count)
26f80bd6 1099 cmove PER_CPU_VAR(irq_stack_ptr),%rsp
2699500b 1100 push %rbp # backlink for old unwinder
ed6b676c 1101 call __do_softirq
2699500b 1102 leaveq
df5d1874 1103 CFI_RESTORE rbp
7effaa88 1104 CFI_DEF_CFA_REGISTER rsp
2699500b 1105 CFI_ADJUST_CFA_OFFSET -8
56895530 1106 decl PER_CPU_VAR(irq_count)
ed6b676c 1107 ret
7effaa88 1108 CFI_ENDPROC
7d65f4a6 1109END(do_softirq_own_stack)
75154f40 1110
3d75e1b8 1111#ifdef CONFIG_XEN
cb5dd2c5 1112idtentry xen_hypervisor_callback xen_do_hypervisor_callback has_error_code=0
3d75e1b8
JF
1113
1114/*
9f1e87ea
CG
1115 * A note on the "critical region" in our callback handler.
1116 * We want to avoid stacking callback handlers due to events occurring
1117 * during handling of the last event. To do this, we keep events disabled
1118 * until we've done all processing. HOWEVER, we must enable events before
1119 * popping the stack frame (can't be done atomically) and so it would still
1120 * be possible to get enough handler activations to overflow the stack.
1121 * Although unlikely, bugs of that kind are hard to track down, so we'd
1122 * like to avoid the possibility.
1123 * So, on entry to the handler we detect whether we interrupted an
1124 * existing activation in its critical region -- if so, we pop the current
1125 * activation and restart the handler using the previous one.
1126 */
3d75e1b8
JF
1127ENTRY(xen_do_hypervisor_callback) # do_hypervisor_callback(struct *pt_regs)
1128 CFI_STARTPROC
9f1e87ea
CG
1129/*
1130 * Since we don't modify %rdi, evtchn_do_upall(struct *pt_regs) will
1131 * see the correct pointer to the pt_regs
1132 */
3d75e1b8
JF
1133 movq %rdi, %rsp # we don't return, adjust the stack frame
1134 CFI_ENDPROC
dcd072e2 1135 DEFAULT_FRAME
56895530 113611: incl PER_CPU_VAR(irq_count)
3d75e1b8
JF
1137 movq %rsp,%rbp
1138 CFI_DEF_CFA_REGISTER rbp
26f80bd6 1139 cmovzq PER_CPU_VAR(irq_stack_ptr),%rsp
3d75e1b8
JF
1140 pushq %rbp # backlink for old unwinder
1141 call xen_evtchn_do_upcall
1142 popq %rsp
1143 CFI_DEF_CFA_REGISTER rsp
56895530 1144 decl PER_CPU_VAR(irq_count)
fdfd811d
DV
1145#ifndef CONFIG_PREEMPT
1146 call xen_maybe_preempt_hcall
1147#endif
3d75e1b8
JF
1148 jmp error_exit
1149 CFI_ENDPROC
371c394a 1150END(xen_do_hypervisor_callback)
3d75e1b8
JF
1151
1152/*
9f1e87ea
CG
1153 * Hypervisor uses this for application faults while it executes.
1154 * We get here for two reasons:
1155 * 1. Fault while reloading DS, ES, FS or GS
1156 * 2. Fault while executing IRET
1157 * Category 1 we do not need to fix up as Xen has already reloaded all segment
1158 * registers that could be reloaded and zeroed the others.
1159 * Category 2 we fix up by killing the current process. We cannot use the
1160 * normal Linux return path in this case because if we use the IRET hypercall
1161 * to pop the stack frame we end up in an infinite loop of failsafe callbacks.
1162 * We distinguish between categories by comparing each saved segment register
1163 * with its current contents: any discrepancy means we in category 1.
1164 */
3d75e1b8 1165ENTRY(xen_failsafe_callback)
dcd072e2
AH
1166 INTR_FRAME 1 (6*8)
1167 /*CFI_REL_OFFSET gs,GS*/
1168 /*CFI_REL_OFFSET fs,FS*/
1169 /*CFI_REL_OFFSET es,ES*/
1170 /*CFI_REL_OFFSET ds,DS*/
1171 CFI_REL_OFFSET r11,8
1172 CFI_REL_OFFSET rcx,0
3d75e1b8
JF
1173 movw %ds,%cx
1174 cmpw %cx,0x10(%rsp)
1175 CFI_REMEMBER_STATE
1176 jne 1f
1177 movw %es,%cx
1178 cmpw %cx,0x18(%rsp)
1179 jne 1f
1180 movw %fs,%cx
1181 cmpw %cx,0x20(%rsp)
1182 jne 1f
1183 movw %gs,%cx
1184 cmpw %cx,0x28(%rsp)
1185 jne 1f
1186 /* All segments match their saved values => Category 2 (Bad IRET). */
1187 movq (%rsp),%rcx
1188 CFI_RESTORE rcx
1189 movq 8(%rsp),%r11
1190 CFI_RESTORE r11
1191 addq $0x30,%rsp
1192 CFI_ADJUST_CFA_OFFSET -0x30
14ae22ba
IM
1193 pushq_cfi $0 /* RIP */
1194 pushq_cfi %r11
1195 pushq_cfi %rcx
4a5c3e77 1196 jmp general_protection
3d75e1b8
JF
1197 CFI_RESTORE_STATE
11981: /* Segment mismatch => Category 1 (Bad segment). Retry the IRET. */
1199 movq (%rsp),%rcx
1200 CFI_RESTORE rcx
1201 movq 8(%rsp),%r11
1202 CFI_RESTORE r11
1203 addq $0x30,%rsp
1204 CFI_ADJUST_CFA_OFFSET -0x30
a349e23d 1205 pushq_cfi $-1 /* orig_ax = -1 => not a system call */
76f5df43
DV
1206 ALLOC_PT_GPREGS_ON_STACK
1207 SAVE_C_REGS
1208 SAVE_EXTRA_REGS
3d75e1b8
JF
1209 jmp error_exit
1210 CFI_ENDPROC
3d75e1b8
JF
1211END(xen_failsafe_callback)
1212
cf910e83 1213apicinterrupt3 HYPERVISOR_CALLBACK_VECTOR \
38e20b07
SY
1214 xen_hvm_callback_vector xen_evtchn_do_upcall
1215
3d75e1b8 1216#endif /* CONFIG_XEN */
ddeb8f21 1217
bc2b0331 1218#if IS_ENABLED(CONFIG_HYPERV)
cf910e83 1219apicinterrupt3 HYPERVISOR_CALLBACK_VECTOR \
bc2b0331
S
1220 hyperv_callback_vector hyperv_vector_handler
1221#endif /* CONFIG_HYPERV */
1222
577ed45e
AL
1223idtentry debug do_debug has_error_code=0 paranoid=1 shift_ist=DEBUG_STACK
1224idtentry int3 do_int3 has_error_code=0 paranoid=1 shift_ist=DEBUG_STACK
6f442be2 1225idtentry stack_segment do_stack_segment has_error_code=1
6cac5a92 1226#ifdef CONFIG_XEN
cb5dd2c5
AL
1227idtentry xen_debug do_debug has_error_code=0
1228idtentry xen_int3 do_int3 has_error_code=0
1229idtentry xen_stack_segment do_stack_segment has_error_code=1
6cac5a92 1230#endif
cb5dd2c5
AL
1231idtentry general_protection do_general_protection has_error_code=1
1232trace_idtentry page_fault do_page_fault has_error_code=1
631bc487 1233#ifdef CONFIG_KVM_GUEST
cb5dd2c5 1234idtentry async_page_fault do_async_page_fault has_error_code=1
631bc487 1235#endif
ddeb8f21 1236#ifdef CONFIG_X86_MCE
cb5dd2c5 1237idtentry machine_check has_error_code=0 paranoid=1 do_sym=*machine_check_vector(%rip)
ddeb8f21
AH
1238#endif
1239
ebfc453e
DV
1240/*
1241 * Save all registers in pt_regs, and switch gs if needed.
1242 * Use slow, but surefire "are we in kernel?" check.
1243 * Return: ebx=0: need swapgs on exit, ebx=1: otherwise
1244 */
1245ENTRY(paranoid_entry)
1246 XCPT_FRAME 1 15*8
1eeb207f
DV
1247 cld
1248 SAVE_C_REGS 8
1249 SAVE_EXTRA_REGS 8
1250 movl $1,%ebx
1251 movl $MSR_GS_BASE,%ecx
1252 rdmsr
1253 testl %edx,%edx
1254 js 1f /* negative -> in kernel */
1255 SWAPGS
1256 xorl %ebx,%ebx
12571: ret
1258 CFI_ENDPROC
ebfc453e 1259END(paranoid_entry)
ddeb8f21 1260
ebfc453e
DV
1261/*
1262 * "Paranoid" exit path from exception stack. This is invoked
1263 * only on return from non-NMI IST interrupts that came
1264 * from kernel space.
1265 *
1266 * We may be returning to very strange contexts (e.g. very early
1267 * in syscall entry), so checking for preemption here would
1268 * be complicated. Fortunately, we there's no good reason
1269 * to try to handle preemption here.
1270 */
1271/* On entry, ebx is "no swapgs" flag (1: don't need swapgs, 0: need it) */
ddeb8f21 1272ENTRY(paranoid_exit)
1f130a78 1273 DEFAULT_FRAME
ddeb8f21 1274 DISABLE_INTERRUPTS(CLBR_NONE)
5963e317 1275 TRACE_IRQS_OFF_DEBUG
ddeb8f21 1276 testl %ebx,%ebx /* swapgs needed? */
0d550836 1277 jnz paranoid_exit_no_swapgs
f2db9382 1278 TRACE_IRQS_IRETQ
ddeb8f21 1279 SWAPGS_UNSAFE_STACK
0d550836
DV
1280 jmp paranoid_exit_restore
1281paranoid_exit_no_swapgs:
f2db9382 1282 TRACE_IRQS_IRETQ_DEBUG
0d550836 1283paranoid_exit_restore:
76f5df43
DV
1284 RESTORE_EXTRA_REGS
1285 RESTORE_C_REGS
1286 REMOVE_PT_GPREGS_FROM_STACK 8
48e08d0f 1287 INTERRUPT_RETURN
ddeb8f21
AH
1288 CFI_ENDPROC
1289END(paranoid_exit)
1290
1291/*
ebfc453e
DV
1292 * Save all registers in pt_regs, and switch gs if needed.
1293 * Return: ebx=0: need swapgs on exit, ebx=1: otherwise
ddeb8f21
AH
1294 */
1295ENTRY(error_entry)
ebfc453e 1296 XCPT_FRAME 1 15*8
ddeb8f21 1297 cld
76f5df43
DV
1298 SAVE_C_REGS 8
1299 SAVE_EXTRA_REGS 8
ddeb8f21
AH
1300 xorl %ebx,%ebx
1301 testl $3,CS+8(%rsp)
1302 je error_kernelspace
1303error_swapgs:
1304 SWAPGS
1305error_sti:
1306 TRACE_IRQS_OFF
1307 ret
ddeb8f21 1308
ebfc453e
DV
1309 /*
1310 * There are two places in the kernel that can potentially fault with
1311 * usergs. Handle them here. B stepping K8s sometimes report a
1312 * truncated RIP for IRET exceptions returning to compat mode. Check
1313 * for these here too.
1314 */
ddeb8f21 1315error_kernelspace:
3bab13b0 1316 CFI_REL_OFFSET rcx, RCX+8
ddeb8f21 1317 incl %ebx
7209a75d 1318 leaq native_irq_return_iret(%rip),%rcx
ddeb8f21 1319 cmpq %rcx,RIP+8(%rsp)
b645af2d 1320 je error_bad_iret
ae24ffe5
BG
1321 movl %ecx,%eax /* zero extend */
1322 cmpq %rax,RIP+8(%rsp)
1323 je bstep_iret
ddeb8f21 1324 cmpq $gs_change,RIP+8(%rsp)
9f1e87ea 1325 je error_swapgs
ddeb8f21 1326 jmp error_sti
ae24ffe5
BG
1327
1328bstep_iret:
1329 /* Fix truncated RIP */
1330 movq %rcx,RIP+8(%rsp)
b645af2d
AL
1331 /* fall through */
1332
1333error_bad_iret:
1334 SWAPGS
1335 mov %rsp,%rdi
1336 call fixup_bad_iret
1337 mov %rax,%rsp
1338 decl %ebx /* Return to usergs */
1339 jmp error_sti
e6b04b6b 1340 CFI_ENDPROC
ddeb8f21
AH
1341END(error_entry)
1342
1343
ebfc453e 1344/* On entry, ebx is "no swapgs" flag (1: don't need swapgs, 0: need it) */
ddeb8f21
AH
1345ENTRY(error_exit)
1346 DEFAULT_FRAME
1347 movl %ebx,%eax
76f5df43 1348 RESTORE_EXTRA_REGS
ddeb8f21
AH
1349 DISABLE_INTERRUPTS(CLBR_NONE)
1350 TRACE_IRQS_OFF
1351 GET_THREAD_INFO(%rcx)
1352 testl %eax,%eax
1353 jne retint_kernel
1354 LOCKDEP_SYS_EXIT_IRQ
1355 movl TI_flags(%rcx),%edx
1356 movl $_TIF_WORK_MASK,%edi
1357 andl %edi,%edx
1358 jnz retint_careful
1359 jmp retint_swapgs
1360 CFI_ENDPROC
1361END(error_exit)
1362
3f3c8b8c
SR
1363/*
1364 * Test if a given stack is an NMI stack or not.
1365 */
1366 .macro test_in_nmi reg stack nmi_ret normal_ret
1367 cmpq %\reg, \stack
1368 ja \normal_ret
1369 subq $EXCEPTION_STKSZ, %\reg
1370 cmpq %\reg, \stack
1371 jb \normal_ret
1372 jmp \nmi_ret
1373 .endm
ddeb8f21
AH
1374
1375 /* runs on exception stack */
1376ENTRY(nmi)
1377 INTR_FRAME
1378 PARAVIRT_ADJUST_EXCEPTION_FRAME
3f3c8b8c
SR
1379 /*
1380 * We allow breakpoints in NMIs. If a breakpoint occurs, then
1381 * the iretq it performs will take us out of NMI context.
1382 * This means that we can have nested NMIs where the next
1383 * NMI is using the top of the stack of the previous NMI. We
1384 * can't let it execute because the nested NMI will corrupt the
1385 * stack of the previous NMI. NMI handlers are not re-entrant
1386 * anyway.
1387 *
1388 * To handle this case we do the following:
1389 * Check the a special location on the stack that contains
1390 * a variable that is set when NMIs are executing.
1391 * The interrupted task's stack is also checked to see if it
1392 * is an NMI stack.
1393 * If the variable is not set and the stack is not the NMI
1394 * stack then:
1395 * o Set the special variable on the stack
1396 * o Copy the interrupt frame into a "saved" location on the stack
1397 * o Copy the interrupt frame into a "copy" location on the stack
1398 * o Continue processing the NMI
1399 * If the variable is set or the previous stack is the NMI stack:
1400 * o Modify the "copy" location to jump to the repeate_nmi
1401 * o return back to the first NMI
1402 *
1403 * Now on exit of the first NMI, we first clear the stack variable
1404 * The NMI stack will tell any nested NMIs at that point that it is
1405 * nested. Then we pop the stack normally with iret, and if there was
1406 * a nested NMI that updated the copy interrupt stack frame, a
1407 * jump will be made to the repeat_nmi code that will handle the second
1408 * NMI.
1409 */
1410
146b2b09 1411 /* Use %rdx as our temp variable throughout */
3f3c8b8c 1412 pushq_cfi %rdx
62610913 1413 CFI_REL_OFFSET rdx, 0
3f3c8b8c 1414
45d5a168
SR
1415 /*
1416 * If %cs was not the kernel segment, then the NMI triggered in user
1417 * space, which means it is definitely not nested.
1418 */
a38449ef 1419 cmpl $__KERNEL_CS, 16(%rsp)
45d5a168
SR
1420 jne first_nmi
1421
3f3c8b8c
SR
1422 /*
1423 * Check the special variable on the stack to see if NMIs are
1424 * executing.
1425 */
a38449ef 1426 cmpl $1, -8(%rsp)
3f3c8b8c
SR
1427 je nested_nmi
1428
1429 /*
1430 * Now test if the previous stack was an NMI stack.
1431 * We need the double check. We check the NMI stack to satisfy the
1432 * race when the first NMI clears the variable before returning.
1433 * We check the variable because the first NMI could be in a
1434 * breakpoint routine using a breakpoint stack.
1435 */
1436 lea 6*8(%rsp), %rdx
1437 test_in_nmi rdx, 4*8(%rsp), nested_nmi, first_nmi
62610913 1438 CFI_REMEMBER_STATE
3f3c8b8c
SR
1439
1440nested_nmi:
1441 /*
1442 * Do nothing if we interrupted the fixup in repeat_nmi.
1443 * It's about to repeat the NMI handler, so we are fine
1444 * with ignoring this one.
1445 */
1446 movq $repeat_nmi, %rdx
1447 cmpq 8(%rsp), %rdx
1448 ja 1f
1449 movq $end_repeat_nmi, %rdx
1450 cmpq 8(%rsp), %rdx
1451 ja nested_nmi_out
1452
14531:
1454 /* Set up the interrupted NMIs stack to jump to repeat_nmi */
28696f43 1455 leaq -1*8(%rsp), %rdx
3f3c8b8c 1456 movq %rdx, %rsp
28696f43
SQ
1457 CFI_ADJUST_CFA_OFFSET 1*8
1458 leaq -10*8(%rsp), %rdx
3f3c8b8c
SR
1459 pushq_cfi $__KERNEL_DS
1460 pushq_cfi %rdx
1461 pushfq_cfi
1462 pushq_cfi $__KERNEL_CS
1463 pushq_cfi $repeat_nmi
1464
1465 /* Put stack back */
28696f43
SQ
1466 addq $(6*8), %rsp
1467 CFI_ADJUST_CFA_OFFSET -6*8
3f3c8b8c
SR
1468
1469nested_nmi_out:
1470 popq_cfi %rdx
62610913 1471 CFI_RESTORE rdx
3f3c8b8c
SR
1472
1473 /* No need to check faults here */
1474 INTERRUPT_RETURN
1475
62610913 1476 CFI_RESTORE_STATE
3f3c8b8c
SR
1477first_nmi:
1478 /*
1479 * Because nested NMIs will use the pushed location that we
1480 * stored in rdx, we must keep that space available.
1481 * Here's what our stack frame will look like:
1482 * +-------------------------+
1483 * | original SS |
1484 * | original Return RSP |
1485 * | original RFLAGS |
1486 * | original CS |
1487 * | original RIP |
1488 * +-------------------------+
1489 * | temp storage for rdx |
1490 * +-------------------------+
1491 * | NMI executing variable |
1492 * +-------------------------+
3f3c8b8c
SR
1493 * | copied SS |
1494 * | copied Return RSP |
1495 * | copied RFLAGS |
1496 * | copied CS |
1497 * | copied RIP |
1498 * +-------------------------+
28696f43
SQ
1499 * | Saved SS |
1500 * | Saved Return RSP |
1501 * | Saved RFLAGS |
1502 * | Saved CS |
1503 * | Saved RIP |
1504 * +-------------------------+
3f3c8b8c
SR
1505 * | pt_regs |
1506 * +-------------------------+
1507 *
79fb4ad6
SR
1508 * The saved stack frame is used to fix up the copied stack frame
1509 * that a nested NMI may change to make the interrupted NMI iret jump
1510 * to the repeat_nmi. The original stack frame and the temp storage
3f3c8b8c
SR
1511 * is also used by nested NMIs and can not be trusted on exit.
1512 */
79fb4ad6 1513 /* Do not pop rdx, nested NMIs will corrupt that part of the stack */
62610913
JB
1514 movq (%rsp), %rdx
1515 CFI_RESTORE rdx
1516
3f3c8b8c
SR
1517 /* Set the NMI executing variable on the stack. */
1518 pushq_cfi $1
1519
28696f43
SQ
1520 /*
1521 * Leave room for the "copied" frame
1522 */
1523 subq $(5*8), %rsp
444723dc 1524 CFI_ADJUST_CFA_OFFSET 5*8
28696f43 1525
3f3c8b8c
SR
1526 /* Copy the stack frame to the Saved frame */
1527 .rept 5
28696f43 1528 pushq_cfi 11*8(%rsp)
3f3c8b8c 1529 .endr
911d2bb5 1530 CFI_DEF_CFA_OFFSET 5*8
62610913 1531
79fb4ad6
SR
1532 /* Everything up to here is safe from nested NMIs */
1533
62610913
JB
1534 /*
1535 * If there was a nested NMI, the first NMI's iret will return
1536 * here. But NMIs are still enabled and we can take another
1537 * nested NMI. The nested NMI checks the interrupted RIP to see
1538 * if it is between repeat_nmi and end_repeat_nmi, and if so
1539 * it will just return, as we are about to repeat an NMI anyway.
1540 * This makes it safe to copy to the stack frame that a nested
1541 * NMI will update.
1542 */
1543repeat_nmi:
1544 /*
1545 * Update the stack variable to say we are still in NMI (the update
1546 * is benign for the non-repeat case, where 1 was pushed just above
1547 * to this very stack slot).
1548 */
28696f43 1549 movq $1, 10*8(%rsp)
3f3c8b8c
SR
1550
1551 /* Make another copy, this one may be modified by nested NMIs */
28696f43
SQ
1552 addq $(10*8), %rsp
1553 CFI_ADJUST_CFA_OFFSET -10*8
3f3c8b8c 1554 .rept 5
28696f43 1555 pushq_cfi -6*8(%rsp)
3f3c8b8c 1556 .endr
28696f43 1557 subq $(5*8), %rsp
911d2bb5 1558 CFI_DEF_CFA_OFFSET 5*8
62610913 1559end_repeat_nmi:
3f3c8b8c
SR
1560
1561 /*
1562 * Everything below this point can be preempted by a nested
79fb4ad6
SR
1563 * NMI if the first NMI took an exception and reset our iret stack
1564 * so that we repeat another NMI.
3f3c8b8c 1565 */
1fd466ef 1566 pushq_cfi $-1 /* ORIG_RAX: no syscall to restart */
76f5df43
DV
1567 ALLOC_PT_GPREGS_ON_STACK
1568
1fd466ef 1569 /*
ebfc453e 1570 * Use paranoid_entry to handle SWAPGS, but no need to use paranoid_exit
1fd466ef
SR
1571 * as we should not be calling schedule in NMI context.
1572 * Even with normal interrupts enabled. An NMI should not be
1573 * setting NEED_RESCHED or anything that normal interrupts and
1574 * exceptions might do.
1575 */
ebfc453e 1576 call paranoid_entry
ddeb8f21 1577 DEFAULT_FRAME 0
7fbb98c5
SR
1578
1579 /*
1580 * Save off the CR2 register. If we take a page fault in the NMI then
1581 * it could corrupt the CR2 value. If the NMI preempts a page fault
1582 * handler before it was able to read the CR2 register, and then the
1583 * NMI itself takes a page fault, the page fault that was preempted
1584 * will read the information from the NMI page fault and not the
1585 * origin fault. Save it off and restore it if it changes.
1586 * Use the r12 callee-saved register.
1587 */
1588 movq %cr2, %r12
1589
ddeb8f21
AH
1590 /* paranoidentry do_nmi, 0; without TRACE_IRQS_OFF */
1591 movq %rsp,%rdi
1592 movq $-1,%rsi
1593 call do_nmi
7fbb98c5
SR
1594
1595 /* Did the NMI take a page fault? Restore cr2 if it did */
1596 movq %cr2, %rcx
1597 cmpq %rcx, %r12
1598 je 1f
1599 movq %r12, %cr2
16001:
1601
ddeb8f21
AH
1602 testl %ebx,%ebx /* swapgs needed? */
1603 jnz nmi_restore
ddeb8f21
AH
1604nmi_swapgs:
1605 SWAPGS_UNSAFE_STACK
1606nmi_restore:
76f5df43
DV
1607 RESTORE_EXTRA_REGS
1608 RESTORE_C_REGS
444723dc 1609 /* Pop the extra iret frame at once */
76f5df43 1610 REMOVE_PT_GPREGS_FROM_STACK 6*8
28696f43 1611
3f3c8b8c 1612 /* Clear the NMI executing stack variable */
28696f43 1613 movq $0, 5*8(%rsp)
ddeb8f21 1614 jmp irq_return
9f1e87ea 1615 CFI_ENDPROC
ddeb8f21
AH
1616END(nmi)
1617
1618ENTRY(ignore_sysret)
1619 CFI_STARTPROC
1620 mov $-ENOSYS,%eax
1621 sysret
1622 CFI_ENDPROC
1623END(ignore_sysret)
1624