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x86/fpu/xstate: Fix __fpu_restore_sig() for XSAVES
[people/arne_f/kernel.git] / arch / x86 / kernel / fpu / xstate.c
CommitLineData
dc1e35c6
SS
1/*
2 * xsave/xrstor support.
3 *
4 * Author: Suresh Siddha <suresh.b.siddha@intel.com>
5 */
dc1e35c6 6#include <linux/compat.h>
7e7ce87f 7#include <linux/cpu.h>
84594296 8#include <linux/pkeys.h>
59a36d16 9
df6b35f4 10#include <asm/fpu/api.h>
78f7f1e5 11#include <asm/fpu/internal.h>
fcbc99c4 12#include <asm/fpu/signal.h>
59a36d16 13#include <asm/fpu/regset.h>
91c3dba7 14#include <asm/fpu/xstate.h>
b992c660 15
375074cc 16#include <asm/tlbflush.h>
dc1e35c6 17
1f96b1ef
DH
18/*
19 * Although we spell it out in here, the Processor Trace
20 * xfeature is completely unused. We use other mechanisms
21 * to save/restore PT state in Linux.
22 */
5b073430
IM
23static const char *xfeature_names[] =
24{
25 "x87 floating point registers" ,
26 "SSE registers" ,
27 "AVX registers" ,
28 "MPX bounds registers" ,
29 "MPX CSR" ,
30 "AVX-512 opmask" ,
31 "AVX-512 Hi256" ,
32 "AVX-512 ZMM_Hi256" ,
1f96b1ef 33 "Processor Trace (unused)" ,
c8df4009 34 "Protection Keys User registers",
5b073430
IM
35 "unknown xstate feature" ,
36};
37
dc1e35c6 38/*
614df7fb 39 * Mask of xstate features supported by the CPU and the kernel:
dc1e35c6 40 */
5b073430 41u64 xfeatures_mask __read_mostly;
dc1e35c6 42
dad8c4fe
DH
43static unsigned int xstate_offsets[XFEATURE_MAX] = { [ 0 ... XFEATURE_MAX - 1] = -1};
44static unsigned int xstate_sizes[XFEATURE_MAX] = { [ 0 ... XFEATURE_MAX - 1] = -1};
614df7fb 45static unsigned int xstate_comp_offsets[sizeof(xfeatures_mask)*8];
84246fe4 46
a1141e0b
FY
47/*
48 * The XSAVE area of kernel can be in standard or compacted format;
49 * it is always in standard format for user mode. This is the user
50 * mode standard format size used for signal and ptrace frames.
51 */
52unsigned int fpu_user_xstate_size;
53
0a265375
DH
54/*
55 * Clear all of the X86_FEATURE_* bits that are unavailable
56 * when the CPU has no XSAVE support.
57 */
58void fpu__xstate_clear_all_cpu_caps(void)
59{
60 setup_clear_cpu_cap(X86_FEATURE_XSAVE);
61 setup_clear_cpu_cap(X86_FEATURE_XSAVEOPT);
62 setup_clear_cpu_cap(X86_FEATURE_XSAVEC);
63 setup_clear_cpu_cap(X86_FEATURE_XSAVES);
64 setup_clear_cpu_cap(X86_FEATURE_AVX);
65 setup_clear_cpu_cap(X86_FEATURE_AVX2);
66 setup_clear_cpu_cap(X86_FEATURE_AVX512F);
67 setup_clear_cpu_cap(X86_FEATURE_AVX512PF);
68 setup_clear_cpu_cap(X86_FEATURE_AVX512ER);
69 setup_clear_cpu_cap(X86_FEATURE_AVX512CD);
d0500494
FY
70 setup_clear_cpu_cap(X86_FEATURE_AVX512DQ);
71 setup_clear_cpu_cap(X86_FEATURE_AVX512BW);
72 setup_clear_cpu_cap(X86_FEATURE_AVX512VL);
0a265375 73 setup_clear_cpu_cap(X86_FEATURE_MPX);
eb7c5f87 74 setup_clear_cpu_cap(X86_FEATURE_XGETBV1);
c8df4009 75 setup_clear_cpu_cap(X86_FEATURE_PKU);
0a265375
DH
76}
77
5b073430
IM
78/*
79 * Return whether the system supports a given xfeature.
80 *
81 * Also return the name of the (most advanced) feature that the caller requested:
82 */
83int cpu_has_xfeatures(u64 xfeatures_needed, const char **feature_name)
84{
85 u64 xfeatures_missing = xfeatures_needed & ~xfeatures_mask;
86
87 if (unlikely(feature_name)) {
88 long xfeature_idx, max_idx;
89 u64 xfeatures_print;
90 /*
91 * So we use FLS here to be able to print the most advanced
92 * feature that was requested but is missing. So if a driver
d91cab78 93 * asks about "XFEATURE_MASK_SSE | XFEATURE_MASK_YMM" we'll print the
5b073430
IM
94 * missing AVX feature - this is the most informative message
95 * to users:
96 */
97 if (xfeatures_missing)
98 xfeatures_print = xfeatures_missing;
99 else
100 xfeatures_print = xfeatures_needed;
101
102 xfeature_idx = fls64(xfeatures_print)-1;
103 max_idx = ARRAY_SIZE(xfeature_names)-1;
104 xfeature_idx = min(xfeature_idx, max_idx);
105
106 *feature_name = xfeature_names[xfeature_idx];
107 }
108
109 if (xfeatures_missing)
110 return 0;
111
112 return 1;
113}
114EXPORT_SYMBOL_GPL(cpu_has_xfeatures);
115
1499ce2d
YY
116static int xfeature_is_supervisor(int xfeature_nr)
117{
118 /*
119 * We currently do not support supervisor states, but if
120 * we did, we could find out like this.
121 *
122 * SDM says: If state component 'i' is a user state component,
123 * ECX[0] return 0; if state component i is a supervisor
124 * state component, ECX[0] returns 1.
125 */
126 u32 eax, ebx, ecx, edx;
127
128 cpuid_count(XSTATE_CPUID, xfeature_nr, &eax, &ebx, &ecx, &edx);
129 return !!(ecx & 1);
130}
131
132static int xfeature_is_user(int xfeature_nr)
133{
134 return !xfeature_is_supervisor(xfeature_nr);
135}
136
29104e10 137/*
aeb997b9
IM
138 * When executing XSAVEOPT (or other optimized XSAVE instructions), if
139 * a processor implementation detects that an FPU state component is still
140 * (or is again) in its initialized state, it may clear the corresponding
141 * bit in the header.xfeatures field, and can skip the writeout of registers
142 * to the corresponding memory layout.
73a3aeb3
IM
143 *
144 * This means that when the bit is zero, the state component might still contain
145 * some previous - non-initialized register state.
146 *
147 * Before writing xstate information to user-space we sanitize those components,
148 * to always ensure that the memory layout of a feature will be in the init state
149 * if the corresponding header bit is zero. This is to ensure that user-space doesn't
150 * see some stale state in the memory layout during signal handling, debugging etc.
29104e10 151 */
36e49e7f 152void fpstate_sanitize_xstate(struct fpu *fpu)
29104e10 153{
c47ada30 154 struct fxregs_state *fx = &fpu->state.fxsave;
73a3aeb3 155 int feature_bit;
400e4b20 156 u64 xfeatures;
29104e10 157
1ac91a76 158 if (!use_xsaveopt())
29104e10
SS
159 return;
160
36e49e7f 161 xfeatures = fpu->state.xsave.header.xfeatures;
29104e10
SS
162
163 /*
164 * None of the feature bits are in init state. So nothing else
0d2eb44f 165 * to do for us, as the memory layout is up to date.
29104e10 166 */
400e4b20 167 if ((xfeatures & xfeatures_mask) == xfeatures_mask)
29104e10
SS
168 return;
169
170 /*
171 * FP is in init state
172 */
d91cab78 173 if (!(xfeatures & XFEATURE_MASK_FP)) {
29104e10
SS
174 fx->cwd = 0x37f;
175 fx->swd = 0;
176 fx->twd = 0;
177 fx->fop = 0;
178 fx->rip = 0;
179 fx->rdp = 0;
180 memset(&fx->st_space[0], 0, 128);
181 }
182
183 /*
184 * SSE is in init state
185 */
d91cab78 186 if (!(xfeatures & XFEATURE_MASK_SSE))
29104e10
SS
187 memset(&fx->xmm_space[0], 0, 256);
188
73a3aeb3
IM
189 /*
190 * First two features are FPU and SSE, which above we handled
191 * in a special way already:
192 */
193 feature_bit = 0x2;
400e4b20 194 xfeatures = (xfeatures_mask & ~xfeatures) >> 2;
29104e10
SS
195
196 /*
73a3aeb3
IM
197 * Update all the remaining memory layouts according to their
198 * standard xstate layout, if their header bit is in the init
199 * state:
29104e10 200 */
400e4b20
IM
201 while (xfeatures) {
202 if (xfeatures & 0x1) {
a1141e0b 203 int offset = xstate_comp_offsets[feature_bit];
29104e10
SS
204 int size = xstate_sizes[feature_bit];
205
73a3aeb3 206 memcpy((void *)fx + offset,
6f575023 207 (void *)&init_fpstate.xsave + offset,
29104e10
SS
208 size);
209 }
210
400e4b20 211 xfeatures >>= 1;
29104e10
SS
212 feature_bit++;
213 }
214}
215
dc1e35c6 216/*
55cc4678
IM
217 * Enable the extended processor state save/restore feature.
218 * Called once per CPU onlining.
dc1e35c6 219 */
55cc4678 220void fpu__init_cpu_xstate(void)
dc1e35c6 221{
d366bf7e 222 if (!boot_cpu_has(X86_FEATURE_XSAVE) || !xfeatures_mask)
55cc4678
IM
223 return;
224
375074cc 225 cr4_set_bits(X86_CR4_OSXSAVE);
614df7fb 226 xsetbv(XCR_XFEATURE_ENABLED_MASK, xfeatures_mask);
dc1e35c6
SS
227}
228
e6e888f9
DH
229/*
230 * Note that in the future we will likely need a pair of
231 * functions here: one for user xstates and the other for
232 * system xstates. For now, they are the same.
233 */
234static int xfeature_enabled(enum xfeature xfeature)
235{
236 return !!(xfeatures_mask & (1UL << xfeature));
237}
238
a1488f8b 239/*
39f1acd2
IM
240 * Record the offsets and sizes of various xstates contained
241 * in the XSAVE state memory layout.
a1488f8b 242 */
4995b9db 243static void __init setup_xstate_features(void)
a1488f8b 244{
ee9ae257 245 u32 eax, ebx, ecx, edx, i;
e6e888f9
DH
246 /* start at the beginnning of the "extended state" */
247 unsigned int last_good_offset = offsetof(struct xregs_state,
248 extended_state_area);
ac73b27a
YY
249 /*
250 * The FP xstates and SSE xstates are legacy states. They are always
251 * in the fixed offsets in the xsave area in either compacted form
252 * or standard form.
253 */
254 xstate_offsets[0] = 0;
255 xstate_sizes[0] = offsetof(struct fxregs_state, xmm_space);
256 xstate_offsets[1] = xstate_sizes[0];
257 xstate_sizes[1] = FIELD_SIZEOF(struct fxregs_state, xmm_space);
a1488f8b 258
ee9ae257 259 for (i = FIRST_EXTENDED_XFEATURE; i < XFEATURE_MAX; i++) {
e6e888f9
DH
260 if (!xfeature_enabled(i))
261 continue;
a1488f8b 262
e6e888f9 263 cpuid_count(XSTATE_CPUID, i, &eax, &ebx, &ecx, &edx);
1499ce2d
YY
264
265 /*
266 * If an xfeature is supervisor state, the offset
267 * in EBX is invalid. We leave it to -1.
268 */
269 if (xfeature_is_user(i))
270 xstate_offsets[i] = ebx;
271
ee9ae257 272 xstate_sizes[i] = eax;
e6e888f9
DH
273 /*
274 * In our xstate size checks, we assume that the
275 * highest-numbered xstate feature has the
276 * highest offset in the buffer. Ensure it does.
277 */
278 WARN_ONCE(last_good_offset > xstate_offsets[i],
279 "x86/fpu: misordered xstate at %d\n", last_good_offset);
280 last_good_offset = xstate_offsets[i];
39f1acd2 281 }
a1488f8b
SS
282}
283
32231879 284static void __init print_xstate_feature(u64 xstate_mask)
69496e10 285{
33588b52 286 const char *feature_name;
69496e10 287
33588b52 288 if (cpu_has_xfeatures(xstate_mask, &feature_name))
c8df4009 289 pr_info("x86/fpu: Supporting XSAVE feature 0x%03Lx: '%s'\n", xstate_mask, feature_name);
69496e10
IM
290}
291
292/*
293 * Print out all the supported xstate features:
294 */
32231879 295static void __init print_xstate_features(void)
69496e10 296{
d91cab78
DH
297 print_xstate_feature(XFEATURE_MASK_FP);
298 print_xstate_feature(XFEATURE_MASK_SSE);
299 print_xstate_feature(XFEATURE_MASK_YMM);
300 print_xstate_feature(XFEATURE_MASK_BNDREGS);
301 print_xstate_feature(XFEATURE_MASK_BNDCSR);
302 print_xstate_feature(XFEATURE_MASK_OPMASK);
303 print_xstate_feature(XFEATURE_MASK_ZMM_Hi256);
304 print_xstate_feature(XFEATURE_MASK_Hi16_ZMM);
c8df4009 305 print_xstate_feature(XFEATURE_MASK_PKRU);
69496e10
IM
306}
307
03482e08
YY
308/*
309 * This check is important because it is easy to get XSTATE_*
310 * confused with XSTATE_BIT_*.
311 */
312#define CHECK_XFEATURE(nr) do { \
313 WARN_ON(nr < FIRST_EXTENDED_XFEATURE); \
314 WARN_ON(nr >= XFEATURE_MAX); \
315} while (0)
316
317/*
318 * We could cache this like xstate_size[], but we only use
319 * it here, so it would be a waste of space.
320 */
321static int xfeature_is_aligned(int xfeature_nr)
322{
323 u32 eax, ebx, ecx, edx;
324
325 CHECK_XFEATURE(xfeature_nr);
326 cpuid_count(XSTATE_CPUID, xfeature_nr, &eax, &ebx, &ecx, &edx);
327 /*
328 * The value returned by ECX[1] indicates the alignment
329 * of state component 'i' when the compacted format
330 * of the extended region of an XSAVE area is used:
331 */
332 return !!(ecx & 2);
333}
334
7496d645
FY
335/*
336 * This function sets up offsets and sizes of all extended states in
337 * xsave area. This supports both standard format and compacted format
338 * of the xsave aread.
7496d645 339 */
32231879 340static void __init setup_xstate_comp(void)
7496d645 341{
614df7fb 342 unsigned int xstate_comp_sizes[sizeof(xfeatures_mask)*8];
7496d645
FY
343 int i;
344
8ff925e1
FY
345 /*
346 * The FP xstates and SSE xstates are legacy states. They are always
347 * in the fixed offsets in the xsave area in either compacted form
348 * or standard form.
349 */
350 xstate_comp_offsets[0] = 0;
c47ada30 351 xstate_comp_offsets[1] = offsetof(struct fxregs_state, xmm_space);
7496d645 352
782511b0 353 if (!boot_cpu_has(X86_FEATURE_XSAVES)) {
ee9ae257 354 for (i = FIRST_EXTENDED_XFEATURE; i < XFEATURE_MAX; i++) {
633d54c4 355 if (xfeature_enabled(i)) {
7496d645
FY
356 xstate_comp_offsets[i] = xstate_offsets[i];
357 xstate_comp_sizes[i] = xstate_sizes[i];
358 }
359 }
360 return;
361 }
362
8a93c9e0
DH
363 xstate_comp_offsets[FIRST_EXTENDED_XFEATURE] =
364 FXSAVE_SIZE + XSAVE_HDR_SIZE;
7496d645 365
ee9ae257 366 for (i = FIRST_EXTENDED_XFEATURE; i < XFEATURE_MAX; i++) {
633d54c4 367 if (xfeature_enabled(i))
7496d645
FY
368 xstate_comp_sizes[i] = xstate_sizes[i];
369 else
370 xstate_comp_sizes[i] = 0;
371
03482e08 372 if (i > FIRST_EXTENDED_XFEATURE) {
7496d645
FY
373 xstate_comp_offsets[i] = xstate_comp_offsets[i-1]
374 + xstate_comp_sizes[i-1];
375
03482e08
YY
376 if (xfeature_is_aligned(i))
377 xstate_comp_offsets[i] =
378 ALIGN(xstate_comp_offsets[i], 64);
379 }
7496d645
FY
380 }
381}
382
996952e0
YY
383/*
384 * Print out xstate component offsets and sizes
385 */
386static void __init print_xstate_offset_size(void)
387{
388 int i;
389
390 for (i = FIRST_EXTENDED_XFEATURE; i < XFEATURE_MAX; i++) {
391 if (!xfeature_enabled(i))
392 continue;
393 pr_info("x86/fpu: xstate_offset[%d]: %4d, xstate_sizes[%d]: %4d\n",
394 i, xstate_comp_offsets[i], i, xstate_sizes[i]);
395 }
396}
397
dc1e35c6
SS
398/*
399 * setup the xstate image representing the init state
400 */
32231879 401static void __init setup_init_fpu_buf(void)
dc1e35c6 402{
e49a449b 403 static int on_boot_cpu __initdata = 1;
e97131a8
IM
404
405 WARN_ON_FPU(!on_boot_cpu);
406 on_boot_cpu = 0;
407
d366bf7e 408 if (!boot_cpu_has(X86_FEATURE_XSAVE))
5d2bd700
SS
409 return;
410
411 setup_xstate_features();
69496e10 412 print_xstate_features();
a1488f8b 413
7d937060 414 if (boot_cpu_has(X86_FEATURE_XSAVES))
6f575023 415 init_fpstate.xsave.header.xcomp_bv = (u64)1 << 63 | xfeatures_mask;
47c2f292 416
29104e10 417 /*
7d937060 418 * Init all the features state with header.xfeatures being 0x0
29104e10 419 */
d65fcd60 420 copy_kernel_to_xregs_booting(&init_fpstate.xsave);
3e261c14 421
29104e10
SS
422 /*
423 * Dump the init state again. This is to identify the init state
424 * of any feature which is not represented by all zero's.
425 */
c6813144 426 copy_xregs_to_kernel_booting(&init_fpstate.xsave);
dc1e35c6
SS
427}
428
65ac2e9b
DH
429static int xfeature_uncompacted_offset(int xfeature_nr)
430{
431 u32 eax, ebx, ecx, edx;
432
1499ce2d
YY
433 /*
434 * Only XSAVES supports supervisor states and it uses compacted
435 * format. Checking a supervisor state's uncompacted offset is
436 * an error.
437 */
438 if (XFEATURE_MASK_SUPERVISOR & (1 << xfeature_nr)) {
439 WARN_ONCE(1, "No fixed offset for xstate %d\n", xfeature_nr);
440 return -1;
441 }
442
65ac2e9b
DH
443 CHECK_XFEATURE(xfeature_nr);
444 cpuid_count(XSTATE_CPUID, xfeature_nr, &eax, &ebx, &ecx, &edx);
445 return ebx;
446}
447
448static int xfeature_size(int xfeature_nr)
449{
450 u32 eax, ebx, ecx, edx;
451
452 CHECK_XFEATURE(xfeature_nr);
453 cpuid_count(XSTATE_CPUID, xfeature_nr, &eax, &ebx, &ecx, &edx);
454 return eax;
455}
456
457/*
458 * 'XSAVES' implies two different things:
459 * 1. saving of supervisor/system state
460 * 2. using the compacted format
461 *
462 * Use this function when dealing with the compacted format so
463 * that it is obvious which aspect of 'XSAVES' is being handled
464 * by the calling code.
465 */
99aa22d0 466int using_compacted_format(void)
65ac2e9b 467{
782511b0 468 return boot_cpu_has(X86_FEATURE_XSAVES);
65ac2e9b
DH
469}
470
471static void __xstate_dump_leaves(void)
472{
473 int i;
474 u32 eax, ebx, ecx, edx;
475 static int should_dump = 1;
476
477 if (!should_dump)
478 return;
479 should_dump = 0;
480 /*
481 * Dump out a few leaves past the ones that we support
482 * just in case there are some goodies up there
483 */
484 for (i = 0; i < XFEATURE_MAX + 10; i++) {
485 cpuid_count(XSTATE_CPUID, i, &eax, &ebx, &ecx, &edx);
486 pr_warn("CPUID[%02x, %02x]: eax=%08x ebx=%08x ecx=%08x edx=%08x\n",
487 XSTATE_CPUID, i, eax, ebx, ecx, edx);
488 }
489}
490
491#define XSTATE_WARN_ON(x) do { \
492 if (WARN_ONCE(x, "XSAVE consistency problem, dumping leaves")) { \
493 __xstate_dump_leaves(); \
494 } \
495} while (0)
496
ef78f2a4
DH
497#define XCHECK_SZ(sz, nr, nr_macro, __struct) do { \
498 if ((nr == nr_macro) && \
499 WARN_ONCE(sz != sizeof(__struct), \
500 "%s: struct is %zu bytes, cpu state %d bytes\n", \
501 __stringify(nr_macro), sizeof(__struct), sz)) { \
502 __xstate_dump_leaves(); \
503 } \
504} while (0)
505
506/*
507 * We have a C struct for each 'xstate'. We need to ensure
508 * that our software representation matches what the CPU
509 * tells us about the state's size.
510 */
511static void check_xstate_against_struct(int nr)
512{
513 /*
514 * Ask the CPU for the size of the state.
515 */
516 int sz = xfeature_size(nr);
517 /*
518 * Match each CPU state with the corresponding software
519 * structure.
520 */
521 XCHECK_SZ(sz, nr, XFEATURE_YMM, struct ymmh_struct);
522 XCHECK_SZ(sz, nr, XFEATURE_BNDREGS, struct mpx_bndreg_state);
523 XCHECK_SZ(sz, nr, XFEATURE_BNDCSR, struct mpx_bndcsr_state);
524 XCHECK_SZ(sz, nr, XFEATURE_OPMASK, struct avx_512_opmask_state);
525 XCHECK_SZ(sz, nr, XFEATURE_ZMM_Hi256, struct avx_512_zmm_uppers_state);
526 XCHECK_SZ(sz, nr, XFEATURE_Hi16_ZMM, struct avx_512_hi16_state);
c8df4009 527 XCHECK_SZ(sz, nr, XFEATURE_PKRU, struct pkru_state);
ef78f2a4
DH
528
529 /*
530 * Make *SURE* to add any feature numbers in below if
531 * there are "holes" in the xsave state component
532 * numbers.
533 */
534 if ((nr < XFEATURE_YMM) ||
1f96b1ef
DH
535 (nr >= XFEATURE_MAX) ||
536 (nr == XFEATURE_PT_UNIMPLEMENTED_SO_FAR)) {
ef78f2a4
DH
537 WARN_ONCE(1, "no structure for xstate: %d\n", nr);
538 XSTATE_WARN_ON(1);
539 }
540}
541
65ac2e9b
DH
542/*
543 * This essentially double-checks what the cpu told us about
544 * how large the XSAVE buffer needs to be. We are recalculating
545 * it to be safe.
546 */
547static void do_extra_xstate_size_checks(void)
548{
549 int paranoid_xstate_size = FXSAVE_SIZE + XSAVE_HDR_SIZE;
550 int i;
551
552 for (i = FIRST_EXTENDED_XFEATURE; i < XFEATURE_MAX; i++) {
553 if (!xfeature_enabled(i))
554 continue;
ef78f2a4
DH
555
556 check_xstate_against_struct(i);
65ac2e9b
DH
557 /*
558 * Supervisor state components can be managed only by
559 * XSAVES, which is compacted-format only.
560 */
561 if (!using_compacted_format())
562 XSTATE_WARN_ON(xfeature_is_supervisor(i));
563
564 /* Align from the end of the previous feature */
565 if (xfeature_is_aligned(i))
566 paranoid_xstate_size = ALIGN(paranoid_xstate_size, 64);
567 /*
568 * The offset of a given state in the non-compacted
569 * format is given to us in a CPUID leaf. We check
570 * them for being ordered (increasing offsets) in
571 * setup_xstate_features().
572 */
573 if (!using_compacted_format())
574 paranoid_xstate_size = xfeature_uncompacted_offset(i);
575 /*
576 * The compacted-format offset always depends on where
577 * the previous state ended.
578 */
579 paranoid_xstate_size += xfeature_size(i);
580 }
bf15a8cf 581 XSTATE_WARN_ON(paranoid_xstate_size != fpu_kernel_xstate_size);
65ac2e9b
DH
582}
583
a1141e0b 584
7e7ce87f 585/*
a1141e0b 586 * Get total size of enabled xstates in XCR0/xfeatures_mask.
65ac2e9b
DH
587 *
588 * Note the SDM's wording here. "sub-function 0" only enumerates
589 * the size of the *user* states. If we use it to size a buffer
590 * that we use 'XSAVES' on, we could potentially overflow the
591 * buffer because 'XSAVES' saves system states too.
592 *
593 * Note that we do not currently set any bits on IA32_XSS so
594 * 'XCR0 | IA32_XSS == XCR0' for now.
7e7ce87f 595 */
a1141e0b 596static unsigned int __init get_xsaves_size(void)
7e7ce87f
FY
597{
598 unsigned int eax, ebx, ecx, edx;
a1141e0b
FY
599 /*
600 * - CPUID function 0DH, sub-function 1:
601 * EBX enumerates the size (in bytes) required by
602 * the XSAVES instruction for an XSAVE area
603 * containing all the state components
604 * corresponding to bits currently set in
605 * XCR0 | IA32_XSS.
606 */
607 cpuid_count(XSTATE_CPUID, 1, &eax, &ebx, &ecx, &edx);
608 return ebx;
609}
7e7ce87f 610
a1141e0b
FY
611static unsigned int __init get_xsave_size(void)
612{
613 unsigned int eax, ebx, ecx, edx;
614 /*
615 * - CPUID function 0DH, sub-function 0:
616 * EBX enumerates the size (in bytes) required by
617 * the XSAVE instruction for an XSAVE area
618 * containing all the *user* state components
619 * corresponding to bits currently set in XCR0.
620 */
621 cpuid_count(XSTATE_CPUID, 0, &eax, &ebx, &ecx, &edx);
622 return ebx;
4109ca06
DH
623}
624
625/*
626 * Will the runtime-enumerated 'xstate_size' fit in the init
627 * task's statically-allocated buffer?
628 */
629static bool is_supported_xstate_size(unsigned int test_xstate_size)
630{
631 if (test_xstate_size <= sizeof(union fpregs_state))
632 return true;
633
634 pr_warn("x86/fpu: xstate buffer too small (%zu < %d), disabling xsave\n",
635 sizeof(union fpregs_state), test_xstate_size);
636 return false;
637}
638
639static int init_xstate_size(void)
640{
641 /* Recompute the context size for enabled features: */
a1141e0b
FY
642 unsigned int possible_xstate_size;
643 unsigned int xsave_size;
644
645 xsave_size = get_xsave_size();
646
647 if (boot_cpu_has(X86_FEATURE_XSAVES))
648 possible_xstate_size = get_xsaves_size();
649 else
650 possible_xstate_size = xsave_size;
4109ca06
DH
651
652 /* Ensure we have the space to store all enabled: */
653 if (!is_supported_xstate_size(possible_xstate_size))
654 return -EINVAL;
655
656 /*
657 * The size is OK, we are definitely going to use xsave,
658 * make it known to the world that we need more space.
659 */
bf15a8cf 660 fpu_kernel_xstate_size = possible_xstate_size;
65ac2e9b 661 do_extra_xstate_size_checks();
a1141e0b
FY
662
663 /*
664 * User space is always in standard format.
665 */
666 fpu_user_xstate_size = xsave_size;
4109ca06
DH
667 return 0;
668}
669
d91cab78
DH
670/*
671 * We enabled the XSAVE hardware, but something went wrong and
672 * we can not use it. Disable it.
673 */
674static void fpu__init_disable_system_xstate(void)
4109ca06
DH
675{
676 xfeatures_mask = 0;
677 cr4_clear_bits(X86_CR4_OSXSAVE);
678 fpu__xstate_clear_all_cpu_caps();
7e7ce87f
FY
679}
680
dc1e35c6
SS
681/*
682 * Enable and initialize the xsave feature.
55cc4678 683 * Called once per system bootup.
dc1e35c6 684 */
32231879 685void __init fpu__init_system_xstate(void)
dc1e35c6
SS
686{
687 unsigned int eax, ebx, ecx, edx;
e49a449b 688 static int on_boot_cpu __initdata = 1;
4109ca06 689 int err;
e97131a8
IM
690
691 WARN_ON_FPU(!on_boot_cpu);
692 on_boot_cpu = 0;
dc1e35c6 693
d366bf7e 694 if (!boot_cpu_has(X86_FEATURE_XSAVE)) {
e9dbfd67
IM
695 pr_info("x86/fpu: Legacy x87 FPU detected.\n");
696 return;
697 }
698
ee813d53 699 if (boot_cpu_data.cpuid_level < XSTATE_CPUID) {
e97131a8 700 WARN_ON_FPU(1);
ee813d53
RR
701 return;
702 }
703
704 cpuid_count(XSTATE_CPUID, 0, &eax, &ebx, &ecx, &edx);
614df7fb 705 xfeatures_mask = eax + ((u64)edx << 32);
dc1e35c6 706
d91cab78 707 if ((xfeatures_mask & XFEATURE_MASK_FPSSE) != XFEATURE_MASK_FPSSE) {
614df7fb 708 pr_err("x86/fpu: FP/SSE not present amongst the CPU's xstate features: 0x%llx.\n", xfeatures_mask);
dc1e35c6
SS
709 BUG();
710 }
711
a5fe93a5 712 xfeatures_mask &= fpu__get_supported_xfeatures_mask();
97e80a70 713
55cc4678
IM
714 /* Enable xstate instructions to be able to continue with initialization: */
715 fpu__init_cpu_xstate();
4109ca06
DH
716 err = init_xstate_size();
717 if (err) {
718 /* something went wrong, boot without any XSAVE support */
719 fpu__init_disable_system_xstate();
720 return;
721 }
dc1e35c6 722
91c3dba7
YY
723 /*
724 * Update info used for ptrace frames; use standard-format size and no
725 * supervisor xstates:
726 */
727 update_regset_xstate_info(fpu_user_xstate_size, xfeatures_mask & ~XFEATURE_MASK_SUPERVISOR);
728
b992c660 729 fpu__init_prepare_fx_sw_frame();
5d2bd700 730 setup_init_fpu_buf();
5fd402df 731 setup_xstate_comp();
996952e0 732 print_xstate_offset_size();
dc1e35c6 733
b0815359 734 pr_info("x86/fpu: Enabled xstate features 0x%llx, context size is %d bytes, using '%s' format.\n",
614df7fb 735 xfeatures_mask,
bf15a8cf 736 fpu_kernel_xstate_size,
782511b0 737 boot_cpu_has(X86_FEATURE_XSAVES) ? "compacted" : "standard");
dc1e35c6 738}
82d4150c 739
9254aaa0
IM
740/*
741 * Restore minimal FPU state after suspend:
742 */
743void fpu__resume_cpu(void)
744{
745 /*
746 * Restore XCR0 on xsave capable CPUs:
747 */
d366bf7e 748 if (boot_cpu_has(X86_FEATURE_XSAVE))
9254aaa0
IM
749 xsetbv(XCR_XFEATURE_ENABLED_MASK, xfeatures_mask);
750}
751
b8b9b6ba
DH
752/*
753 * Given an xstate feature mask, calculate where in the xsave
754 * buffer the state is. Callers should ensure that the buffer
755 * is valid.
756 *
757 * Note: does not work for compacted buffers.
758 */
759void *__raw_xsave_addr(struct xregs_state *xsave, int xstate_feature_mask)
760{
761 int feature_nr = fls64(xstate_feature_mask) - 1;
762
763 return (void *)xsave + xstate_comp_offsets[feature_nr];
764}
7496d645
FY
765/*
766 * Given the xsave area and a state inside, this function returns the
767 * address of the state.
768 *
769 * This is the API that is called to get xstate address in either
770 * standard format or compacted format of xsave area.
771 *
0c4109be
DH
772 * Note that if there is no data for the field in the xsave buffer
773 * this will return NULL.
774 *
7496d645 775 * Inputs:
0c4109be
DH
776 * xstate: the thread's storage area for all FPU data
777 * xstate_feature: state which is defined in xsave.h (e.g.
d91cab78 778 * XFEATURE_MASK_FP, XFEATURE_MASK_SSE, etc...)
7496d645 779 * Output:
0c4109be
DH
780 * address of the state in the xsave area, or NULL if the
781 * field is not present in the xsave buffer.
7496d645 782 */
0c4109be 783void *get_xsave_addr(struct xregs_state *xsave, int xstate_feature)
7496d645 784{
0c4109be
DH
785 /*
786 * Do we even *have* xsave state?
787 */
788 if (!boot_cpu_has(X86_FEATURE_XSAVE))
789 return NULL;
790
0c4109be
DH
791 /*
792 * We should not ever be requesting features that we
793 * have not enabled. Remember that pcntxt_mask is
794 * what we write to the XCR0 register.
795 */
796 WARN_ONCE(!(xfeatures_mask & xstate_feature),
797 "get of unsupported state");
798 /*
799 * This assumes the last 'xsave*' instruction to
800 * have requested that 'xstate_feature' be saved.
801 * If it did not, we might be seeing and old value
802 * of the field in the buffer.
803 *
804 * This can happen because the last 'xsave' did not
805 * request that this feature be saved (unlikely)
806 * or because the "init optimization" caused it
807 * to not be saved.
808 */
809 if (!(xsave->header.xfeatures & xstate_feature))
7496d645
FY
810 return NULL;
811
b8b9b6ba 812 return __raw_xsave_addr(xsave, xstate_feature);
7496d645 813}
ba7b3920 814EXPORT_SYMBOL_GPL(get_xsave_addr);
04cd027b
DH
815
816/*
817 * This wraps up the common operations that need to occur when retrieving
818 * data from xsave state. It first ensures that the current task was
819 * using the FPU and retrieves the data in to a buffer. It then calculates
820 * the offset of the requested field in the buffer.
821 *
822 * This function is safe to call whether the FPU is in use or not.
823 *
824 * Note that this only works on the current task.
825 *
826 * Inputs:
d91cab78
DH
827 * @xsave_state: state which is defined in xsave.h (e.g. XFEATURE_MASK_FP,
828 * XFEATURE_MASK_SSE, etc...)
04cd027b
DH
829 * Output:
830 * address of the state in the xsave area or NULL if the state
831 * is not present or is in its 'init state'.
832 */
833const void *get_xsave_field_ptr(int xsave_state)
834{
835 struct fpu *fpu = &current->thread.fpu;
836
837 if (!fpu->fpstate_active)
838 return NULL;
839 /*
840 * fpu__save() takes the CPU's xstate registers
841 * and saves them off to the 'fpu memory buffer.
842 */
843 fpu__save(fpu);
844
845 return get_xsave_addr(&fpu->state.xsave, xsave_state);
846}
b8b9b6ba
DH
847
848
849/*
850 * Set xfeatures (aka XSTATE_BV) bit for a feature that we want
851 * to take out of its "init state". This will ensure that an
852 * XRSTOR actually restores the state.
853 */
854static void fpu__xfeature_set_non_init(struct xregs_state *xsave,
855 int xstate_feature_mask)
856{
857 xsave->header.xfeatures |= xstate_feature_mask;
858}
859
860/*
861 * This function is safe to call whether the FPU is in use or not.
862 *
863 * Note that this only works on the current task.
864 *
865 * Inputs:
866 * @xsave_state: state which is defined in xsave.h (e.g. XFEATURE_MASK_FP,
867 * XFEATURE_MASK_SSE, etc...)
868 * @xsave_state_ptr: a pointer to a copy of the state that you would
869 * like written in to the current task's FPU xsave state. This pointer
870 * must not be located in the current tasks's xsave area.
871 * Output:
872 * address of the state in the xsave area or NULL if the state
873 * is not present or is in its 'init state'.
874 */
875static void fpu__xfeature_set_state(int xstate_feature_mask,
876 void *xstate_feature_src, size_t len)
877{
878 struct xregs_state *xsave = &current->thread.fpu.state.xsave;
879 struct fpu *fpu = &current->thread.fpu;
880 void *dst;
881
882 if (!boot_cpu_has(X86_FEATURE_XSAVE)) {
883 WARN_ONCE(1, "%s() attempted with no xsave support", __func__);
884 return;
885 }
886
887 /*
888 * Tell the FPU code that we need the FPU state to be in
889 * 'fpu' (not in the registers), and that we need it to
890 * be stable while we write to it.
891 */
892 fpu__current_fpstate_write_begin();
893
894 /*
895 * This method *WILL* *NOT* work for compact-format
896 * buffers. If the 'xstate_feature_mask' is unset in
897 * xcomp_bv then we may need to move other feature state
898 * "up" in the buffer.
899 */
900 if (xsave->header.xcomp_bv & xstate_feature_mask) {
901 WARN_ON_ONCE(1);
902 goto out;
903 }
904
905 /* find the location in the xsave buffer of the desired state */
906 dst = __raw_xsave_addr(&fpu->state.xsave, xstate_feature_mask);
907
908 /*
909 * Make sure that the pointer being passed in did not
910 * come from the xsave buffer itself.
911 */
912 WARN_ONCE(xstate_feature_src == dst, "set from xsave buffer itself");
913
914 /* put the caller-provided data in the location */
915 memcpy(dst, xstate_feature_src, len);
916
917 /*
918 * Mark the xfeature so that the CPU knows there is state
919 * in the buffer now.
920 */
921 fpu__xfeature_set_non_init(xsave, xstate_feature_mask);
922out:
923 /*
924 * We are done writing to the 'fpu'. Reenable preeption
925 * and (possibly) move the fpstate back in to the fpregs.
926 */
927 fpu__current_fpstate_write_end();
928}
84594296
DH
929
930#define NR_VALID_PKRU_BITS (CONFIG_NR_PROTECTION_KEYS * 2)
931#define PKRU_VALID_MASK (NR_VALID_PKRU_BITS - 1)
932
933/*
934 * This will go out and modify the XSAVE buffer so that PKRU is
935 * set to a particular state for access to 'pkey'.
936 *
937 * PKRU state does affect kernel access to user memory. We do
938 * not modfiy PKRU *itself* here, only the XSAVE state that will
939 * be restored in to PKRU when we return back to userspace.
940 */
941int arch_set_user_pkey_access(struct task_struct *tsk, int pkey,
942 unsigned long init_val)
943{
944 struct xregs_state *xsave = &tsk->thread.fpu.state.xsave;
945 struct pkru_state *old_pkru_state;
946 struct pkru_state new_pkru_state;
947 int pkey_shift = (pkey * PKRU_BITS_PER_PKEY);
948 u32 new_pkru_bits = 0;
949
84594296
DH
950 /*
951 * This check implies XSAVE support. OSPKE only gets
952 * set if we enable XSAVE and we enable PKU in XCR0.
953 */
954 if (!boot_cpu_has(X86_FEATURE_OSPKE))
955 return -EINVAL;
956
91c3dba7 957 /* Set the bits we need in PKRU: */
84594296
DH
958 if (init_val & PKEY_DISABLE_ACCESS)
959 new_pkru_bits |= PKRU_AD_BIT;
960 if (init_val & PKEY_DISABLE_WRITE)
961 new_pkru_bits |= PKRU_WD_BIT;
962
91c3dba7 963 /* Shift the bits in to the correct place in PKRU for pkey: */
84594296
DH
964 new_pkru_bits <<= pkey_shift;
965
91c3dba7 966 /* Locate old copy of the state in the xsave buffer: */
84594296
DH
967 old_pkru_state = get_xsave_addr(xsave, XFEATURE_MASK_PKRU);
968
969 /*
970 * When state is not in the buffer, it is in the init
971 * state, set it manually. Otherwise, copy out the old
972 * state.
973 */
974 if (!old_pkru_state)
975 new_pkru_state.pkru = 0;
976 else
977 new_pkru_state.pkru = old_pkru_state->pkru;
978
91c3dba7 979 /* Mask off any old bits in place: */
84594296 980 new_pkru_state.pkru &= ~((PKRU_AD_BIT|PKRU_WD_BIT) << pkey_shift);
91c3dba7
YY
981
982 /* Set the newly-requested bits: */
84594296
DH
983 new_pkru_state.pkru |= new_pkru_bits;
984
985 /*
986 * We could theoretically live without zeroing pkru.pad.
987 * The current XSAVE feature state definition says that
988 * only bytes 0->3 are used. But we do not want to
989 * chance leaking kernel stack out to userspace in case a
990 * memcpy() of the whole xsave buffer was done.
991 *
992 * They're in the same cacheline anyway.
993 */
994 new_pkru_state.pad = 0;
995
91c3dba7
YY
996 fpu__xfeature_set_state(XFEATURE_MASK_PKRU, &new_pkru_state, sizeof(new_pkru_state));
997
998 return 0;
999}
1000
1001/*
1002 * This is similar to user_regset_copyout(), but will not add offset to
1003 * the source data pointer or increment pos, count, kbuf, and ubuf.
1004 */
1005static inline int xstate_copyout(unsigned int pos, unsigned int count,
1006 void *kbuf, void __user *ubuf,
1007 const void *data, const int start_pos,
1008 const int end_pos)
1009{
1010 if ((count == 0) || (pos < start_pos))
1011 return 0;
1012
1013 if (end_pos < 0 || pos < end_pos) {
1014 unsigned int copy = (end_pos < 0 ? count : min(count, end_pos - pos));
1015
1016 if (kbuf) {
1017 memcpy(kbuf + pos, data, copy);
1018 } else {
1019 if (__copy_to_user(ubuf + pos, data, copy))
1020 return -EFAULT;
1021 }
1022 }
1023 return 0;
1024}
1025
1026/*
1027 * Convert from kernel XSAVES compacted format to standard format and copy
1028 * to a ptrace buffer. It supports partial copy but pos always starts from
1029 * zero. This is called from xstateregs_get() and there we check the CPU
1030 * has XSAVES.
1031 */
1032int copyout_from_xsaves(unsigned int pos, unsigned int count, void *kbuf,
1033 void __user *ubuf, struct xregs_state *xsave)
1034{
1035 unsigned int offset, size;
1036 int ret, i;
1037 struct xstate_header header;
1038
1039 /*
1040 * Currently copy_regset_to_user() starts from pos 0:
1041 */
1042 if (unlikely(pos != 0))
1043 return -EFAULT;
1044
1045 /*
1046 * The destination is a ptrace buffer; we put in only user xstates:
1047 */
1048 memset(&header, 0, sizeof(header));
1049 header.xfeatures = xsave->header.xfeatures;
1050 header.xfeatures &= ~XFEATURE_MASK_SUPERVISOR;
1051
1052 /*
1053 * Copy xregs_state->header:
1054 */
1055 offset = offsetof(struct xregs_state, header);
1056 size = sizeof(header);
1057
1058 ret = xstate_copyout(offset, size, kbuf, ubuf, &header, 0, count);
1059
1060 if (ret)
1061 return ret;
1062
1063 for (i = 0; i < XFEATURE_MAX; i++) {
1064 /*
1065 * Copy only in-use xstates:
1066 */
1067 if ((header.xfeatures >> i) & 1) {
1068 void *src = __raw_xsave_addr(xsave, 1 << i);
1069
1070 offset = xstate_offsets[i];
1071 size = xstate_sizes[i];
1072
1073 ret = xstate_copyout(offset, size, kbuf, ubuf, src, 0, count);
1074
1075 if (ret)
1076 return ret;
1077
1078 if (offset + size >= count)
1079 break;
1080 }
1081
1082 }
1083
1084 /*
1085 * Fill xsave->i387.sw_reserved value for ptrace frame:
1086 */
1087 offset = offsetof(struct fxregs_state, sw_reserved);
1088 size = sizeof(xstate_fx_sw_bytes);
1089
1090 ret = xstate_copyout(offset, size, kbuf, ubuf, xstate_fx_sw_bytes, 0, count);
1091
1092 if (ret)
1093 return ret;
1094
1095 return 0;
1096}
1097
1098/*
1099 * Convert from a ptrace standard-format buffer to kernel XSAVES format
1100 * and copy to the target thread. This is called from xstateregs_set() and
1101 * there we check the CPU has XSAVES and a whole standard-sized buffer
1102 * exists.
1103 */
1104int copyin_to_xsaves(const void *kbuf, const void __user *ubuf,
1105 struct xregs_state *xsave)
1106{
1107 unsigned int offset, size;
1108 int i;
1109 u64 xfeatures;
1110 u64 allowed_features;
1111
1112 offset = offsetof(struct xregs_state, header);
1113 size = sizeof(xfeatures);
1114
1115 if (kbuf) {
1116 memcpy(&xfeatures, kbuf + offset, size);
1117 } else {
1118 if (__copy_from_user(&xfeatures, ubuf + offset, size))
1119 return -EFAULT;
1120 }
1121
1122 /*
1123 * Reject if the user sets any disabled or supervisor features:
1124 */
1125 allowed_features = xfeatures_mask & ~XFEATURE_MASK_SUPERVISOR;
1126
1127 if (xfeatures & ~allowed_features)
1128 return -EINVAL;
1129
1130 for (i = 0; i < XFEATURE_MAX; i++) {
1131 u64 mask = ((u64)1 << i);
1132
1133 if (xfeatures & mask) {
1134 void *dst = __raw_xsave_addr(xsave, 1 << i);
1135
1136 offset = xstate_offsets[i];
1137 size = xstate_sizes[i];
1138
1139 if (kbuf) {
1140 memcpy(dst, kbuf + offset, size);
1141 } else {
1142 if (__copy_from_user(dst, ubuf + offset, size))
1143 return -EFAULT;
1144 }
1145 }
1146 }
1147
1148 /*
1149 * The state that came in from userspace was user-state only.
1150 * Mask all the user states out of 'xfeatures':
1151 */
1152 xsave->header.xfeatures &= XFEATURE_MASK_SUPERVISOR;
1153
1154 /*
1155 * Add back in the features that came in from userspace:
1156 */
1157 xsave->header.xfeatures |= xfeatures;
84594296
DH
1158
1159 return 0;
1160}