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Commit | Line | Data |
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b2441318 | 1 | /* SPDX-License-Identifier: GPL-2.0 */ |
1da177e4 | 2 | /* |
1da177e4 LT |
3 | * |
4 | * Copyright (C) 1991, 1992 Linus Torvalds | |
5 | * | |
6 | * Enhanced CPU detection and feature setting code by Mike Jagdis | |
7 | * and Martin Mares, November 1997. | |
8 | */ | |
9 | ||
10 | .text | |
94ea9c05 | 11 | #include <linux/export.h> |
1da177e4 | 12 | #include <linux/threads.h> |
8b2f7fff | 13 | #include <linux/init.h> |
1da177e4 LT |
14 | #include <linux/linkage.h> |
15 | #include <asm/segment.h> | |
0341c14d JF |
16 | #include <asm/page_types.h> |
17 | #include <asm/pgtable_types.h> | |
1da177e4 LT |
18 | #include <asm/cache.h> |
19 | #include <asm/thread_info.h> | |
86feeaa8 | 20 | #include <asm/asm-offsets.h> |
1da177e4 | 21 | #include <asm/setup.h> |
551889a6 | 22 | #include <asm/processor-flags.h> |
8a50e513 | 23 | #include <asm/msr-index.h> |
cd4d09ec | 24 | #include <asm/cpufeatures.h> |
60a5317f | 25 | #include <asm/percpu.h> |
4c5023a3 | 26 | #include <asm/nops.h> |
3131ef39 | 27 | #include <asm/nospec-branch.h> |
fb148d83 | 28 | #include <asm/bootparam.h> |
1e620f9b | 29 | #include <asm/pgtable_32.h> |
551889a6 IC |
30 | |
31 | /* Physical address */ | |
32 | #define pa(X) ((X) - __PAGE_OFFSET) | |
1da177e4 LT |
33 | |
34 | /* | |
35 | * References to members of the new_cpu_data structure. | |
36 | */ | |
37 | ||
38 | #define X86 new_cpu_data+CPUINFO_x86 | |
39 | #define X86_VENDOR new_cpu_data+CPUINFO_x86_vendor | |
40 | #define X86_MODEL new_cpu_data+CPUINFO_x86_model | |
b399151c | 41 | #define X86_STEPPING new_cpu_data+CPUINFO_x86_stepping |
1da177e4 LT |
42 | #define X86_HARD_MATH new_cpu_data+CPUINFO_hard_math |
43 | #define X86_CPUID new_cpu_data+CPUINFO_cpuid_level | |
44 | #define X86_CAPABILITY new_cpu_data+CPUINFO_x86_capability | |
45 | #define X86_VENDOR_ID new_cpu_data+CPUINFO_x86_vendor_id | |
46 | ||
c090f532 JF |
47 | /* |
48 | * Worst-case size of the kernel mapping we need to make: | |
147dd561 PA |
49 | * a relocatable kernel can live anywhere in lowmem, so we need to be able |
50 | * to map all of lowmem. | |
c090f532 | 51 | */ |
147dd561 | 52 | KERNEL_PAGES = LOWMEM_PAGES |
c090f532 | 53 | |
7bf04be8 | 54 | INIT_MAP_SIZE = PAGE_TABLE_SIZE(KERNEL_PAGES) * PAGE_SIZE |
2bd2753f | 55 | RESERVE_BRK(pagetables, INIT_MAP_SIZE) |
796216a5 | 56 | |
1da177e4 LT |
57 | /* |
58 | * 32-bit kernel entrypoint; only used by the boot CPU. On entry, | |
59 | * %esi points to the real-mode code as a 32-bit pointer. | |
60 | * CS and DS must be 4 GB flat segments, but we don't depend on | |
61 | * any particular GDT layout, because we load our own as soon as we | |
62 | * can. | |
63 | */ | |
4ae59b91 | 64 | __HEAD |
78762b0e | 65 | SYM_CODE_START(startup_32) |
b32f96c7 | 66 | movl pa(initial_stack),%ecx |
11d4c3f9 | 67 | |
1da177e4 LT |
68 | /* |
69 | * Set segments to known values. | |
70 | */ | |
551889a6 | 71 | lgdt pa(boot_gdt_descr) |
1da177e4 LT |
72 | movl $(__BOOT_DS),%eax |
73 | movl %eax,%ds | |
74 | movl %eax,%es | |
75 | movl %eax,%fs | |
76 | movl %eax,%gs | |
11d4c3f9 | 77 | movl %eax,%ss |
11d4c3f9 | 78 | leal -__PAGE_OFFSET(%ecx),%esp |
1da177e4 LT |
79 | |
80 | /* | |
81 | * Clear BSS first so that there are no surprises... | |
1da177e4 | 82 | */ |
a24e7851 | 83 | cld |
1da177e4 | 84 | xorl %eax,%eax |
551889a6 IC |
85 | movl $pa(__bss_start),%edi |
86 | movl $pa(__bss_stop),%ecx | |
1da177e4 LT |
87 | subl %edi,%ecx |
88 | shrl $2,%ecx | |
89 | rep ; stosl | |
484b90c4 VG |
90 | /* |
91 | * Copy bootup parameters out of the way. | |
92 | * Note: %esi still has the pointer to the real-mode data. | |
93 | * With the kexec as boot loader, parameter segment might be loaded beyond | |
94 | * kernel image and might not even be addressable by early boot page tables. | |
95 | * (kexec on panic case). Hence copy out the parameters before initializing | |
96 | * page tables. | |
97 | */ | |
551889a6 | 98 | movl $pa(boot_params),%edi |
484b90c4 VG |
99 | movl $(PARAM_SIZE/4),%ecx |
100 | cld | |
101 | rep | |
102 | movsl | |
551889a6 | 103 | movl pa(boot_params) + NEW_CL_POINTER,%esi |
484b90c4 | 104 | andl %esi,%esi |
b595076a | 105 | jz 1f # No command line |
551889a6 | 106 | movl $pa(boot_command_line),%edi |
484b90c4 VG |
107 | movl $(COMMAND_LINE_SIZE/4),%ecx |
108 | rep | |
109 | movsl | |
110 | 1: | |
1da177e4 | 111 | |
dc3119e7 | 112 | #ifdef CONFIG_OLPC |
fd699c76 AS |
113 | /* save OFW's pgdir table for later use when calling into OFW */ |
114 | movl %cr3, %eax | |
115 | movl %eax, pa(olpc_ofw_pgd) | |
116 | #endif | |
117 | ||
1e620f9b BO |
118 | /* Create early pagetables. */ |
119 | call mk_early_pgtbl_32 | |
551889a6 IC |
120 | |
121 | /* Do early initialization of the fixmap area */ | |
b40827fa | 122 | movl $pa(initial_pg_fixmap)+PDE_IDENT_ATTR,%eax |
1e620f9b BO |
123 | #ifdef CONFIG_X86_PAE |
124 | #define KPMDS (((-__PAGE_OFFSET) >> 30) & 3) /* Number of kernel PMDs */ | |
b40827fa | 125 | movl %eax,pa(initial_pg_pmd+0x1000*KPMDS-8) |
1e620f9b | 126 | #else |
b40827fa | 127 | movl %eax,pa(initial_page_table+0xffc) |
551889a6 | 128 | #endif |
d50d8fe1 | 129 | |
1b00255f | 130 | jmp .Ldefault_entry |
78762b0e | 131 | SYM_CODE_END(startup_32) |
d50d8fe1 | 132 | |
1da177e4 LT |
133 | /* |
134 | * Non-boot CPU entry point; entered from trampoline.S | |
135 | * We can't lgdt here, because lgdt itself uses a data segment, but | |
52de74dd | 136 | * we know the trampoline has already loaded the boot_gdt for us. |
f8657e1b VG |
137 | * |
138 | * If cpu hotplug is not supported then this code can go in init section | |
139 | * which will be freed later | |
1da177e4 | 140 | */ |
6d685e53 | 141 | SYM_FUNC_START(startup_32_smp) |
1da177e4 LT |
142 | cld |
143 | movl $(__BOOT_DS),%eax | |
144 | movl %eax,%ds | |
145 | movl %eax,%es | |
146 | movl %eax,%fs | |
147 | movl %eax,%gs | |
b32f96c7 | 148 | movl pa(initial_stack),%ecx |
11d4c3f9 PA |
149 | movl %eax,%ss |
150 | leal -__PAGE_OFFSET(%ecx),%esp | |
48927bbb | 151 | |
1b00255f | 152 | .Ldefault_entry: |
021ef050 PA |
153 | movl $(CR0_STATE & ~X86_CR0_PG),%eax |
154 | movl %eax,%cr0 | |
155 | ||
1da177e4 | 156 | /* |
9efb58de BP |
157 | * We want to start out with EFLAGS unambiguously cleared. Some BIOSes leave |
158 | * bits like NT set. This would confuse the debugger if this code is traced. So | |
159 | * initialize them properly now before switching to protected mode. That means | |
160 | * DF in particular (even though we have cleared it earlier after copying the | |
161 | * command line) because GCC expects it. | |
162 | */ | |
163 | pushl $0 | |
164 | popfl | |
165 | ||
166 | /* | |
167 | * New page tables may be in 4Mbyte page mode and may be using the global pages. | |
1da177e4 | 168 | * |
9efb58de BP |
169 | * NOTE! If we are on a 486 we may have no cr4 at all! Specifically, cr4 exists |
170 | * if and only if CPUID exists and has flags other than the FPU flag set. | |
1da177e4 | 171 | */ |
9efb58de | 172 | movl $-1,pa(X86_CPUID) # preset CPUID level |
5a5a51db PA |
173 | movl $X86_EFLAGS_ID,%ecx |
174 | pushl %ecx | |
9efb58de | 175 | popfl # set EFLAGS=ID |
5a5a51db | 176 | pushfl |
9efb58de BP |
177 | popl %eax # get EFLAGS |
178 | testl $X86_EFLAGS_ID,%eax # did EFLAGS.ID remained set? | |
1b00255f | 179 | jz .Lenable_paging # hw disallowed setting of ID bit |
9efb58de BP |
180 | # which means no CPUID and no CR4 |
181 | ||
182 | xorl %eax,%eax | |
183 | cpuid | |
184 | movl %eax,pa(X86_CPUID) # save largest std CPUID function | |
5a5a51db | 185 | |
6662c34f PA |
186 | movl $1,%eax |
187 | cpuid | |
9efb58de | 188 | andl $~1,%edx # Ignore CPUID.FPU |
1b00255f | 189 | jz .Lenable_paging # No flags or only CPUID.FPU = no CR4 |
6662c34f | 190 | |
5a5a51db | 191 | movl pa(mmu_cr4_features),%eax |
1da177e4 LT |
192 | movl %eax,%cr4 |
193 | ||
8a50e513 | 194 | testb $X86_CR4_PAE, %al # check if PAE is enabled |
1b00255f | 195 | jz .Lenable_paging |
1da177e4 LT |
196 | |
197 | /* Check if extended functions are implemented */ | |
198 | movl $0x80000000, %eax | |
199 | cpuid | |
8a50e513 PA |
200 | /* Value must be in the range 0x80000001 to 0x8000ffff */ |
201 | subl $0x80000001, %eax | |
202 | cmpl $(0x8000ffff-0x80000001), %eax | |
1b00255f | 203 | ja .Lenable_paging |
ebba638a KC |
204 | |
205 | /* Clear bogus XD_DISABLE bits */ | |
206 | call verify_cpu | |
207 | ||
1da177e4 LT |
208 | mov $0x80000001, %eax |
209 | cpuid | |
210 | /* Execute Disable bit supported? */ | |
8a50e513 | 211 | btl $(X86_FEATURE_NX & 31), %edx |
1b00255f | 212 | jnc .Lenable_paging |
1da177e4 LT |
213 | |
214 | /* Setup EFER (Extended Feature Enable Register) */ | |
8a50e513 | 215 | movl $MSR_EFER, %ecx |
1da177e4 LT |
216 | rdmsr |
217 | ||
8a50e513 | 218 | btsl $_EFER_NX, %eax |
1da177e4 LT |
219 | /* Make changes effective */ |
220 | wrmsr | |
221 | ||
1b00255f | 222 | .Lenable_paging: |
1da177e4 LT |
223 | |
224 | /* | |
225 | * Enable paging | |
226 | */ | |
b40827fa | 227 | movl $pa(initial_page_table), %eax |
1da177e4 | 228 | movl %eax,%cr3 /* set the page table pointer.. */ |
021ef050 | 229 | movl $CR0_STATE,%eax |
1da177e4 LT |
230 | movl %eax,%cr0 /* ..and set paging (PG) bit */ |
231 | ljmp $__BOOT_CS,$1f /* Clear prefetch and normalize %eip */ | |
232 | 1: | |
11d4c3f9 PA |
233 | /* Shift the stack pointer to a virtual address */ |
234 | addl $__PAGE_OFFSET, %esp | |
1da177e4 | 235 | |
1da177e4 | 236 | /* |
166df91d | 237 | * Check if it is 486 |
1da177e4 | 238 | */ |
237d1548 | 239 | movb $4,X86 # at least 486 |
c3a22a26 | 240 | cmpl $-1,X86_CPUID |
1b00255f | 241 | je .Lis486 |
1da177e4 LT |
242 | |
243 | /* get vendor info */ | |
244 | xorl %eax,%eax # call CPUID with 0 -> return vendor ID | |
245 | cpuid | |
246 | movl %eax,X86_CPUID # save CPUID level | |
247 | movl %ebx,X86_VENDOR_ID # lo 4 chars | |
248 | movl %edx,X86_VENDOR_ID+4 # next 4 chars | |
249 | movl %ecx,X86_VENDOR_ID+8 # last 4 chars | |
250 | ||
251 | orl %eax,%eax # do we have processor info as well? | |
1b00255f | 252 | je .Lis486 |
1da177e4 LT |
253 | |
254 | movl $1,%eax # Use the CPUID instruction to get CPU type | |
255 | cpuid | |
256 | movb %al,%cl # save reg for future use | |
257 | andb $0x0f,%ah # mask processor family | |
258 | movb %ah,X86 | |
259 | andb $0xf0,%al # mask model | |
260 | shrb $4,%al | |
261 | movb %al,X86_MODEL | |
262 | andb $0x0f,%cl # mask mask revision | |
b399151c | 263 | movb %cl,X86_STEPPING |
1da177e4 LT |
264 | movl %edx,X86_CAPABILITY |
265 | ||
1b00255f | 266 | .Lis486: |
c3a22a26 | 267 | movl $0x50022,%ecx # set AM, WP, NE and MP |
166df91d | 268 | movl %cr0,%eax |
1da177e4 LT |
269 | andl $0x80000011,%eax # Save PG,PE,ET |
270 | orl %ecx,%eax | |
271 | movl %eax,%cr0 | |
272 | ||
2a57ff1a | 273 | lgdt early_gdt_descr |
1da177e4 LT |
274 | ljmp $(__KERNEL_CS),$1f |
275 | 1: movl $(__KERNEL_DS),%eax # reload all the segment registers | |
276 | movl %eax,%ss # after changing gdt. | |
277 | ||
278 | movl $(__USER_DS),%eax # DS/ES contains default USER segment | |
279 | movl %eax,%ds | |
280 | movl %eax,%es | |
281 | ||
0dd76d73 BG |
282 | movl $(__KERNEL_PERCPU), %eax |
283 | movl %eax,%fs # set this cpu's percpu | |
284 | ||
3fb0fdb3 AL |
285 | xorl %eax,%eax |
286 | movl %eax,%gs # clear possible garbage in %gs | |
60a5317f TH |
287 | |
288 | xorl %eax,%eax # Clear LDT | |
1da177e4 | 289 | lldt %ax |
f95d47ca | 290 | |
6616a147 JP |
291 | call *(initial_code) |
292 | 1: jmp 1b | |
6d685e53 | 293 | SYM_FUNC_END(startup_32_smp) |
1da177e4 | 294 | |
4c5023a3 PA |
295 | #include "verify_cpu.S" |
296 | ||
4c5023a3 | 297 | __INIT |
6d685e53 | 298 | SYM_FUNC_START(early_idt_handler_array) |
4c5023a3 PA |
299 | # 36(%esp) %eflags |
300 | # 32(%esp) %cs | |
301 | # 28(%esp) %eip | |
302 | # 24(%rsp) error code | |
303 | i = 0 | |
304 | .rept NUM_EXCEPTION_VECTORS | |
82c62fa0 | 305 | .if ((EXCEPTION_ERRCODE_MASK >> i) & 1) == 0 |
4c5023a3 PA |
306 | pushl $0 # Dummy error code, to make stack frame uniform |
307 | .endif | |
308 | pushl $i # 20(%esp) Vector number | |
425be567 | 309 | jmp early_idt_handler_common |
4c5023a3 | 310 | i = i + 1 |
425be567 | 311 | .fill early_idt_handler_array + i*EARLY_IDT_HANDLER_SIZE - ., 1, 0xcc |
4c5023a3 | 312 | .endr |
6d685e53 | 313 | SYM_FUNC_END(early_idt_handler_array) |
4c5023a3 | 314 | |
ef77e688 | 315 | SYM_CODE_START_LOCAL(early_idt_handler_common) |
425be567 AL |
316 | /* |
317 | * The stack is the hardware frame, an error code or zero, and the | |
318 | * vector number. | |
319 | */ | |
4c5023a3 | 320 | cld |
5fa10196 | 321 | |
4c5023a3 | 322 | incl %ss:early_recursion_flag |
ec5c0926 | 323 | |
7bbcdb1c | 324 | /* The vector number is in pt_regs->gs */ |
ec5c0926 | 325 | |
7bbcdb1c | 326 | cld |
630c1863 AL |
327 | pushl %fs /* pt_regs->fs (__fsh varies by model) */ |
328 | pushl %es /* pt_regs->es (__esh varies by model) */ | |
329 | pushl %ds /* pt_regs->ds (__dsh varies by model) */ | |
7bbcdb1c AL |
330 | pushl %eax /* pt_regs->ax */ |
331 | pushl %ebp /* pt_regs->bp */ | |
332 | pushl %edi /* pt_regs->di */ | |
333 | pushl %esi /* pt_regs->si */ | |
334 | pushl %edx /* pt_regs->dx */ | |
335 | pushl %ecx /* pt_regs->cx */ | |
336 | pushl %ebx /* pt_regs->bx */ | |
337 | ||
338 | /* Fix up DS and ES */ | |
339 | movl $(__KERNEL_DS), %ecx | |
340 | movl %ecx, %ds | |
341 | movl %ecx, %es | |
342 | ||
343 | /* Load the vector number into EDX */ | |
344 | movl PT_GS(%esp), %edx | |
345 | ||
630c1863 | 346 | /* Load GS into pt_regs->gs (and maybe clobber __gsh) */ |
7bbcdb1c | 347 | movw %gs, PT_GS(%esp) |
7bbcdb1c | 348 | |
7bbcdb1c AL |
349 | movl %esp, %eax /* args are pt_regs (EAX), trapnr (EDX) */ |
350 | call early_fixup_exception | |
7bbcdb1c AL |
351 | |
352 | popl %ebx /* pt_regs->bx */ | |
353 | popl %ecx /* pt_regs->cx */ | |
354 | popl %edx /* pt_regs->dx */ | |
355 | popl %esi /* pt_regs->si */ | |
356 | popl %edi /* pt_regs->di */ | |
357 | popl %ebp /* pt_regs->bp */ | |
358 | popl %eax /* pt_regs->ax */ | |
630c1863 AL |
359 | popl %ds /* pt_regs->ds (always ignores __dsh) */ |
360 | popl %es /* pt_regs->es (always ignores __esh) */ | |
361 | popl %fs /* pt_regs->fs (always ignores __fsh) */ | |
362 | popl %gs /* pt_regs->gs (always ignores __gsh) */ | |
7bbcdb1c AL |
363 | decl %ss:early_recursion_flag |
364 | addl $4, %esp /* pop pt_regs->orig_ax */ | |
365 | iret | |
ef77e688 | 366 | SYM_CODE_END(early_idt_handler_common) |
4c5023a3 | 367 | |
1da177e4 | 368 | /* This is the default interrupt "handler" :-) */ |
6d685e53 | 369 | SYM_FUNC_START(early_ignore_irq) |
1da177e4 | 370 | cld |
d59745ce | 371 | #ifdef CONFIG_PRINTK |
1da177e4 LT |
372 | pushl %eax |
373 | pushl %ecx | |
374 | pushl %edx | |
375 | pushl %es | |
376 | pushl %ds | |
377 | movl $(__KERNEL_DS),%eax | |
378 | movl %eax,%ds | |
379 | movl %eax,%es | |
ec5c0926 CE |
380 | cmpl $2,early_recursion_flag |
381 | je hlt_loop | |
382 | incl early_recursion_flag | |
1da177e4 LT |
383 | pushl 16(%esp) |
384 | pushl 24(%esp) | |
385 | pushl 32(%esp) | |
386 | pushl 40(%esp) | |
387 | pushl $int_msg | |
33701557 | 388 | call _printk |
d5e397cb IM |
389 | |
390 | call dump_stack | |
391 | ||
1da177e4 LT |
392 | addl $(5*4),%esp |
393 | popl %ds | |
394 | popl %es | |
395 | popl %edx | |
396 | popl %ecx | |
397 | popl %eax | |
d59745ce | 398 | #endif |
1da177e4 | 399 | iret |
0e861fbb AL |
400 | |
401 | hlt_loop: | |
402 | hlt | |
403 | jmp hlt_loop | |
6d685e53 | 404 | SYM_FUNC_END(early_ignore_irq) |
04b5de3a | 405 | |
4c5023a3 PA |
406 | __INITDATA |
407 | .align 4 | |
b1bd27b9 | 408 | SYM_DATA(early_recursion_flag, .long 0) |
1da177e4 | 409 | |
4c5023a3 PA |
410 | __REFDATA |
411 | .align 4 | |
b1bd27b9 | 412 | SYM_DATA(initial_code, .long i386_start_kernel) |
583323b9 | 413 | |
ea4654e0 | 414 | #ifdef CONFIG_MITIGATION_PAGE_TABLE_ISOLATION |
e3238faf JR |
415 | #define PGD_ALIGN (2 * PAGE_SIZE) |
416 | #define PTI_USER_PGD_FILL 1024 | |
417 | #else | |
418 | #define PGD_ALIGN (PAGE_SIZE) | |
419 | #define PTI_USER_PGD_FILL 0 | |
420 | #endif | |
1da177e4 LT |
421 | /* |
422 | * BSS section | |
423 | */ | |
02b7da37 | 424 | __PAGE_ALIGNED_BSS |
e3238faf | 425 | .align PGD_ALIGN |
551889a6 | 426 | #ifdef CONFIG_X86_PAE |
1e620f9b | 427 | .globl initial_pg_pmd |
d50d8fe1 | 428 | initial_pg_pmd: |
551889a6 IC |
429 | .fill 1024*KPMDS,4,0 |
430 | #else | |
553bbc11 AB |
431 | .globl initial_page_table |
432 | initial_page_table: | |
1da177e4 | 433 | .fill 1024,4,0 |
551889a6 | 434 | #endif |
e3238faf | 435 | .align PGD_ALIGN |
d50d8fe1 | 436 | initial_pg_fixmap: |
b1c931e3 | 437 | .fill 1024,4,0 |
553bbc11 | 438 | .globl swapper_pg_dir |
e3238faf | 439 | .align PGD_ALIGN |
553bbc11 | 440 | swapper_pg_dir: |
b40827fa | 441 | .fill 1024,4,0 |
e3238faf JR |
442 | .fill PTI_USER_PGD_FILL,4,0 |
443 | .globl empty_zero_page | |
444 | empty_zero_page: | |
445 | .fill 4096,1,0 | |
784d5699 | 446 | EXPORT_SYMBOL(empty_zero_page) |
2bd2753f | 447 | |
1da177e4 LT |
448 | /* |
449 | * This starts the data section. | |
450 | */ | |
551889a6 | 451 | #ifdef CONFIG_X86_PAE |
abe1ee3a | 452 | __PAGE_ALIGNED_DATA |
551889a6 | 453 | /* Page-aligned for the benefit of paravirt? */ |
e3238faf | 454 | .align PGD_ALIGN |
b1bd27b9 | 455 | SYM_DATA_START(initial_page_table) |
b40827fa | 456 | .long pa(initial_pg_pmd+PGD_IDENT_ATTR),0 /* low identity map */ |
551889a6 | 457 | # if KPMDS == 3 |
b40827fa BP |
458 | .long pa(initial_pg_pmd+PGD_IDENT_ATTR),0 |
459 | .long pa(initial_pg_pmd+PGD_IDENT_ATTR+0x1000),0 | |
460 | .long pa(initial_pg_pmd+PGD_IDENT_ATTR+0x2000),0 | |
551889a6 IC |
461 | # elif KPMDS == 2 |
462 | .long 0,0 | |
b40827fa BP |
463 | .long pa(initial_pg_pmd+PGD_IDENT_ATTR),0 |
464 | .long pa(initial_pg_pmd+PGD_IDENT_ATTR+0x1000),0 | |
551889a6 IC |
465 | # elif KPMDS == 1 |
466 | .long 0,0 | |
467 | .long 0,0 | |
b40827fa | 468 | .long pa(initial_pg_pmd+PGD_IDENT_ATTR),0 |
551889a6 IC |
469 | # else |
470 | # error "Kernel PMDs should be 1, 2 or 3" | |
471 | # endif | |
7bf04be8 | 472 | .align PAGE_SIZE /* needs to be page-sized too */ |
f490e07c | 473 | |
ea4654e0 | 474 | #ifdef CONFIG_MITIGATION_PAGE_TABLE_ISOLATION |
f490e07c TG |
475 | /* |
476 | * PTI needs another page so sync_initial_pagetable() works correctly | |
477 | * and does not scribble over the data which is placed behind the | |
478 | * actual initial_page_table. See clone_pgd_range(). | |
479 | */ | |
480 | .fill 1024, 4, 0 | |
481 | #endif | |
482 | ||
b1bd27b9 | 483 | SYM_DATA_END(initial_page_table) |
551889a6 IC |
484 | #endif |
485 | ||
1da177e4 | 486 | .data |
11d4c3f9 | 487 | .balign 4 |
2cb16181 | 488 | SYM_DATA(initial_stack, .long __top_init_kernel_stack) |
1da177e4 | 489 | |
4c5023a3 | 490 | __INITRODATA |
1da177e4 | 491 | int_msg: |
d5e397cb | 492 | .asciz "Unknown interrupt or fault at: %p %p %p\n" |
1da177e4 | 493 | |
c3262d3d | 494 | #include "../xen/xen-head.S" |
5ead97c8 | 495 | |
1da177e4 LT |
496 | /* |
497 | * The IDT and GDT 'descriptors' are a strange 48-bit object | |
498 | * only used by the lidt and lgdt instructions. They are not | |
499 | * like usual segment descriptors - they consist of a 16-bit | |
500 | * segment size, and 32-bit linear address value: | |
501 | */ | |
502 | ||
4c5023a3 | 503 | .data |
1da177e4 LT |
504 | ALIGN |
505 | # early boot GDT descriptor (must use 1:1 address mapping) | |
506 | .word 0 # 32 bit align gdt_desc.address | |
b1bd27b9 | 507 | SYM_DATA_START_LOCAL(boot_gdt_descr) |
1da177e4 | 508 | .word __BOOT_DS+7 |
52de74dd | 509 | .long boot_gdt - __PAGE_OFFSET |
b1bd27b9 | 510 | SYM_DATA_END(boot_gdt_descr) |
1da177e4 | 511 | |
1da177e4 LT |
512 | # boot GDT descriptor (later on used by CPU#0): |
513 | .word 0 # 32 bit align gdt_desc.address | |
b1bd27b9 | 514 | SYM_DATA_START(early_gdt_descr) |
1da177e4 | 515 | .word GDT_ENTRIES*8-1 |
dd17c8f7 | 516 | .long gdt_page /* Overwritten for secondary CPUs */ |
b1bd27b9 | 517 | SYM_DATA_END(early_gdt_descr) |
1da177e4 | 518 | |
1da177e4 | 519 | /* |
52de74dd | 520 | * The boot_gdt must mirror the equivalent in setup.S and is |
1da177e4 LT |
521 | * used only for booting. |
522 | */ | |
523 | .align L1_CACHE_BYTES | |
b1bd27b9 | 524 | SYM_DATA_START(boot_gdt) |
1da177e4 LT |
525 | .fill GDT_ENTRY_BOOT_CS,8,0 |
526 | .quad 0x00cf9a000000ffff /* kernel 4GB code at 0x00000000 */ | |
527 | .quad 0x00cf92000000ffff /* kernel 4GB data at 0x00000000 */ | |
b1bd27b9 | 528 | SYM_DATA_END(boot_gdt) |