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3e135d88 PO |
1 | /* |
2 | * Intel CPU Microcode Update Driver for Linux | |
3 | * | |
4 | * Copyright (C) 2000-2006 Tigran Aivazian <tigran@aivazian.fsnet.co.uk> | |
5 | * 2006 Shaohua Li <shaohua.li@intel.com> | |
6 | * | |
7 | * This driver allows to upgrade microcode on Intel processors | |
8 | * belonging to IA-32 family - PentiumPro, Pentium II, | |
9 | * Pentium III, Xeon, Pentium 4, etc. | |
10 | * | |
11 | * Reference: Section 8.11 of Volume 3a, IA-32 Intel? Architecture | |
12 | * Software Developer's Manual | |
13 | * Order Number 253668 or free download from: | |
14 | * | |
15 | * http://developer.intel.com/design/pentium4/manuals/253668.htm | |
16 | * | |
17 | * For more information, go to http://www.urbanmyth.org/microcode | |
18 | * | |
19 | * This program is free software; you can redistribute it and/or | |
20 | * modify it under the terms of the GNU General Public License | |
21 | * as published by the Free Software Foundation; either version | |
22 | * 2 of the License, or (at your option) any later version. | |
23 | * | |
24 | * 1.0 16 Feb 2000, Tigran Aivazian <tigran@sco.com> | |
25 | * Initial release. | |
26 | * 1.01 18 Feb 2000, Tigran Aivazian <tigran@sco.com> | |
27 | * Added read() support + cleanups. | |
28 | * 1.02 21 Feb 2000, Tigran Aivazian <tigran@sco.com> | |
29 | * Added 'device trimming' support. open(O_WRONLY) zeroes | |
30 | * and frees the saved copy of applied microcode. | |
31 | * 1.03 29 Feb 2000, Tigran Aivazian <tigran@sco.com> | |
32 | * Made to use devfs (/dev/cpu/microcode) + cleanups. | |
33 | * 1.04 06 Jun 2000, Simon Trimmer <simon@veritas.com> | |
34 | * Added misc device support (now uses both devfs and misc). | |
35 | * Added MICROCODE_IOCFREE ioctl to clear memory. | |
36 | * 1.05 09 Jun 2000, Simon Trimmer <simon@veritas.com> | |
37 | * Messages for error cases (non Intel & no suitable microcode). | |
38 | * 1.06 03 Aug 2000, Tigran Aivazian <tigran@veritas.com> | |
39 | * Removed ->release(). Removed exclusive open and status bitmap. | |
40 | * Added microcode_rwsem to serialize read()/write()/ioctl(). | |
41 | * Removed global kernel lock usage. | |
42 | * 1.07 07 Sep 2000, Tigran Aivazian <tigran@veritas.com> | |
43 | * Write 0 to 0x8B msr and then cpuid before reading revision, | |
44 | * so that it works even if there were no update done by the | |
45 | * BIOS. Otherwise, reading from 0x8B gives junk (which happened | |
46 | * to be 0 on my machine which is why it worked even when I | |
47 | * disabled update by the BIOS) | |
48 | * Thanks to Eric W. Biederman <ebiederman@lnxi.com> for the fix. | |
49 | * 1.08 11 Dec 2000, Richard Schaal <richard.schaal@intel.com> and | |
50 | * Tigran Aivazian <tigran@veritas.com> | |
51 | * Intel Pentium 4 processor support and bugfixes. | |
52 | * 1.09 30 Oct 2001, Tigran Aivazian <tigran@veritas.com> | |
53 | * Bugfix for HT (Hyper-Threading) enabled processors | |
54 | * whereby processor resources are shared by all logical processors | |
55 | * in a single CPU package. | |
56 | * 1.10 28 Feb 2002 Asit K Mallick <asit.k.mallick@intel.com> and | |
57 | * Tigran Aivazian <tigran@veritas.com>, | |
d33dcb9e PO |
58 | * Serialize updates as required on HT processors due to |
59 | * speculative nature of implementation. | |
3e135d88 PO |
60 | * 1.11 22 Mar 2002 Tigran Aivazian <tigran@veritas.com> |
61 | * Fix the panic when writing zero-length microcode chunk. | |
62 | * 1.12 29 Sep 2003 Nitin Kamble <nitin.a.kamble@intel.com>, | |
63 | * Jun Nakajima <jun.nakajima@intel.com> | |
64 | * Support for the microcode updates in the new format. | |
65 | * 1.13 10 Oct 2003 Tigran Aivazian <tigran@veritas.com> | |
66 | * Removed ->read() method and obsoleted MICROCODE_IOCFREE ioctl | |
67 | * because we no longer hold a copy of applied microcode | |
68 | * in kernel memory. | |
69 | * 1.14 25 Jun 2004 Tigran Aivazian <tigran@veritas.com> | |
70 | * Fix sigmatch() macro to handle old CPUs with pf == 0. | |
71 | * Thanks to Stuart Swales for pointing out this bug. | |
72 | */ | |
4bae1967 | 73 | #include <linux/platform_device.h> |
4bae1967 | 74 | #include <linux/miscdevice.h> |
871b72dd | 75 | #include <linux/capability.h> |
4bae1967 IM |
76 | #include <linux/kernel.h> |
77 | #include <linux/module.h> | |
3e135d88 PO |
78 | #include <linux/mutex.h> |
79 | #include <linux/cpu.h> | |
4bae1967 IM |
80 | #include <linux/fs.h> |
81 | #include <linux/mm.h> | |
3e135d88 | 82 | |
3e135d88 | 83 | #include <asm/microcode.h> |
4bae1967 | 84 | #include <asm/processor.h> |
3e135d88 PO |
85 | |
86 | MODULE_DESCRIPTION("Microcode Update Driver"); | |
87 | MODULE_AUTHOR("Tigran Aivazian <tigran@aivazian.fsnet.co.uk>"); | |
88 | MODULE_LICENSE("GPL"); | |
89 | ||
4bae1967 | 90 | #define MICROCODE_VERSION "2.00" |
3e135d88 | 91 | |
4bae1967 | 92 | static struct microcode_ops *microcode_ops; |
3e135d88 | 93 | |
871b72dd DA |
94 | /* |
95 | * Synchronization. | |
96 | * | |
97 | * All non cpu-hotplug-callback call sites use: | |
98 | * | |
99 | * - microcode_mutex to synchronize with each other; | |
100 | * - get/put_online_cpus() to synchronize with | |
101 | * the cpu-hotplug-callback call sites. | |
102 | * | |
103 | * We guarantee that only a single cpu is being | |
104 | * updated at any particular moment of time. | |
105 | */ | |
d45de409 | 106 | static DEFINE_MUTEX(microcode_mutex); |
3e135d88 | 107 | |
4bae1967 | 108 | struct ucode_cpu_info ucode_cpu_info[NR_CPUS]; |
8d86f390 | 109 | EXPORT_SYMBOL_GPL(ucode_cpu_info); |
3e135d88 | 110 | |
871b72dd DA |
111 | /* |
112 | * Operations that are run on a target cpu: | |
113 | */ | |
114 | ||
115 | struct cpu_info_ctx { | |
116 | struct cpu_signature *cpu_sig; | |
117 | int err; | |
118 | }; | |
119 | ||
120 | static void collect_cpu_info_local(void *arg) | |
121 | { | |
122 | struct cpu_info_ctx *ctx = arg; | |
123 | ||
124 | ctx->err = microcode_ops->collect_cpu_info(smp_processor_id(), | |
125 | ctx->cpu_sig); | |
126 | } | |
127 | ||
128 | static int collect_cpu_info_on_target(int cpu, struct cpu_signature *cpu_sig) | |
129 | { | |
130 | struct cpu_info_ctx ctx = { .cpu_sig = cpu_sig, .err = 0 }; | |
131 | int ret; | |
132 | ||
133 | ret = smp_call_function_single(cpu, collect_cpu_info_local, &ctx, 1); | |
134 | if (!ret) | |
135 | ret = ctx.err; | |
136 | ||
137 | return ret; | |
138 | } | |
139 | ||
140 | static int collect_cpu_info(int cpu) | |
141 | { | |
142 | struct ucode_cpu_info *uci = ucode_cpu_info + cpu; | |
143 | int ret; | |
144 | ||
145 | memset(uci, 0, sizeof(*uci)); | |
146 | ||
147 | ret = collect_cpu_info_on_target(cpu, &uci->cpu_sig); | |
148 | if (!ret) | |
149 | uci->valid = 1; | |
150 | ||
151 | return ret; | |
152 | } | |
153 | ||
154 | struct apply_microcode_ctx { | |
155 | int err; | |
156 | }; | |
157 | ||
158 | static void apply_microcode_local(void *arg) | |
159 | { | |
160 | struct apply_microcode_ctx *ctx = arg; | |
161 | ||
162 | ctx->err = microcode_ops->apply_microcode(smp_processor_id()); | |
163 | } | |
164 | ||
165 | static int apply_microcode_on_target(int cpu) | |
166 | { | |
167 | struct apply_microcode_ctx ctx = { .err = 0 }; | |
168 | int ret; | |
169 | ||
170 | ret = smp_call_function_single(cpu, apply_microcode_local, &ctx, 1); | |
171 | if (!ret) | |
172 | ret = ctx.err; | |
173 | ||
174 | return ret; | |
175 | } | |
176 | ||
3e135d88 | 177 | #ifdef CONFIG_MICROCODE_OLD_INTERFACE |
a0a29b62 | 178 | static int do_microcode_update(const void __user *buf, size_t size) |
3e135d88 | 179 | { |
3e135d88 | 180 | int error = 0; |
3e135d88 | 181 | int cpu; |
6f66cbc6 | 182 | |
a0a29b62 DA |
183 | for_each_online_cpu(cpu) { |
184 | struct ucode_cpu_info *uci = ucode_cpu_info + cpu; | |
871b72dd | 185 | enum ucode_state ustate; |
a0a29b62 DA |
186 | |
187 | if (!uci->valid) | |
188 | continue; | |
6f66cbc6 | 189 | |
871b72dd DA |
190 | ustate = microcode_ops->request_microcode_user(cpu, buf, size); |
191 | if (ustate == UCODE_ERROR) { | |
192 | error = -1; | |
193 | break; | |
194 | } else if (ustate == UCODE_OK) | |
195 | apply_microcode_on_target(cpu); | |
3e135d88 | 196 | } |
871b72dd | 197 | |
3e135d88 PO |
198 | return error; |
199 | } | |
200 | ||
d33dcb9e | 201 | static int microcode_open(struct inode *unused1, struct file *unused2) |
3e135d88 | 202 | { |
3e135d88 PO |
203 | return capable(CAP_SYS_RAWIO) ? 0 : -EPERM; |
204 | } | |
205 | ||
d33dcb9e PO |
206 | static ssize_t microcode_write(struct file *file, const char __user *buf, |
207 | size_t len, loff_t *ppos) | |
3e135d88 | 208 | { |
871b72dd | 209 | ssize_t ret = -EINVAL; |
3e135d88 | 210 | |
4481374c JB |
211 | if ((len >> PAGE_SHIFT) > totalram_pages) { |
212 | pr_err("microcode: too much data (max %ld pages)\n", totalram_pages); | |
871b72dd | 213 | return ret; |
3e135d88 PO |
214 | } |
215 | ||
216 | get_online_cpus(); | |
217 | mutex_lock(µcode_mutex); | |
218 | ||
871b72dd | 219 | if (do_microcode_update(buf, len) == 0) |
3e135d88 PO |
220 | ret = (ssize_t)len; |
221 | ||
222 | mutex_unlock(µcode_mutex); | |
223 | put_online_cpus(); | |
224 | ||
225 | return ret; | |
226 | } | |
227 | ||
228 | static const struct file_operations microcode_fops = { | |
871b72dd DA |
229 | .owner = THIS_MODULE, |
230 | .write = microcode_write, | |
231 | .open = microcode_open, | |
3e135d88 PO |
232 | }; |
233 | ||
234 | static struct miscdevice microcode_dev = { | |
871b72dd DA |
235 | .minor = MICROCODE_MINOR, |
236 | .name = "microcode", | |
e454cea2 | 237 | .nodename = "cpu/microcode", |
871b72dd | 238 | .fops = µcode_fops, |
3e135d88 PO |
239 | }; |
240 | ||
d33dcb9e | 241 | static int __init microcode_dev_init(void) |
3e135d88 PO |
242 | { |
243 | int error; | |
244 | ||
245 | error = misc_register(µcode_dev); | |
246 | if (error) { | |
871b72dd | 247 | pr_err("microcode: can't misc_register on minor=%d\n", MICROCODE_MINOR); |
3e135d88 PO |
248 | return error; |
249 | } | |
250 | ||
251 | return 0; | |
252 | } | |
253 | ||
d33dcb9e | 254 | static void microcode_dev_exit(void) |
3e135d88 PO |
255 | { |
256 | misc_deregister(µcode_dev); | |
257 | } | |
258 | ||
259 | MODULE_ALIAS_MISCDEV(MICROCODE_MINOR); | |
260 | #else | |
4bae1967 IM |
261 | #define microcode_dev_init() 0 |
262 | #define microcode_dev_exit() do { } while (0) | |
3e135d88 PO |
263 | #endif |
264 | ||
265 | /* fake device for request_firmware */ | |
4bae1967 | 266 | static struct platform_device *microcode_pdev; |
3e135d88 | 267 | |
871b72dd | 268 | static int reload_for_cpu(int cpu) |
af5c820a | 269 | { |
871b72dd | 270 | struct ucode_cpu_info *uci = ucode_cpu_info + cpu; |
af5c820a RR |
271 | int err = 0; |
272 | ||
273 | mutex_lock(µcode_mutex); | |
274 | if (uci->valid) { | |
871b72dd DA |
275 | enum ucode_state ustate; |
276 | ||
277 | ustate = microcode_ops->request_microcode_fw(cpu, µcode_pdev->dev); | |
278 | if (ustate == UCODE_OK) | |
279 | apply_microcode_on_target(cpu); | |
280 | else | |
281 | if (ustate == UCODE_ERROR) | |
282 | err = -EINVAL; | |
af5c820a RR |
283 | } |
284 | mutex_unlock(µcode_mutex); | |
871b72dd | 285 | |
af5c820a RR |
286 | return err; |
287 | } | |
288 | ||
3e135d88 PO |
289 | static ssize_t reload_store(struct sys_device *dev, |
290 | struct sysdev_attribute *attr, | |
871b72dd | 291 | const char *buf, size_t size) |
3e135d88 | 292 | { |
871b72dd | 293 | unsigned long val; |
3e135d88 | 294 | int cpu = dev->id; |
871b72dd DA |
295 | int ret = 0; |
296 | char *end; | |
3e135d88 | 297 | |
871b72dd | 298 | val = simple_strtoul(buf, &end, 0); |
3e135d88 PO |
299 | if (end == buf) |
300 | return -EINVAL; | |
871b72dd | 301 | |
3e135d88 | 302 | if (val == 1) { |
3e135d88 | 303 | get_online_cpus(); |
af5c820a | 304 | if (cpu_online(cpu)) |
871b72dd | 305 | ret = reload_for_cpu(cpu); |
3e135d88 | 306 | put_online_cpus(); |
3e135d88 | 307 | } |
871b72dd DA |
308 | |
309 | if (!ret) | |
310 | ret = size; | |
311 | ||
312 | return ret; | |
3e135d88 PO |
313 | } |
314 | ||
315 | static ssize_t version_show(struct sys_device *dev, | |
316 | struct sysdev_attribute *attr, char *buf) | |
317 | { | |
318 | struct ucode_cpu_info *uci = ucode_cpu_info + dev->id; | |
319 | ||
d45de409 | 320 | return sprintf(buf, "0x%x\n", uci->cpu_sig.rev); |
3e135d88 PO |
321 | } |
322 | ||
323 | static ssize_t pf_show(struct sys_device *dev, | |
324 | struct sysdev_attribute *attr, char *buf) | |
325 | { | |
326 | struct ucode_cpu_info *uci = ucode_cpu_info + dev->id; | |
327 | ||
d45de409 | 328 | return sprintf(buf, "0x%x\n", uci->cpu_sig.pf); |
3e135d88 PO |
329 | } |
330 | ||
331 | static SYSDEV_ATTR(reload, 0200, NULL, reload_store); | |
332 | static SYSDEV_ATTR(version, 0400, version_show, NULL); | |
333 | static SYSDEV_ATTR(processor_flags, 0400, pf_show, NULL); | |
334 | ||
335 | static struct attribute *mc_default_attrs[] = { | |
336 | &attr_reload.attr, | |
337 | &attr_version.attr, | |
338 | &attr_processor_flags.attr, | |
339 | NULL | |
340 | }; | |
341 | ||
342 | static struct attribute_group mc_attr_group = { | |
871b72dd DA |
343 | .attrs = mc_default_attrs, |
344 | .name = "microcode", | |
3e135d88 PO |
345 | }; |
346 | ||
871b72dd | 347 | static void microcode_fini_cpu(int cpu) |
d45de409 DA |
348 | { |
349 | struct ucode_cpu_info *uci = ucode_cpu_info + cpu; | |
350 | ||
d45de409 DA |
351 | microcode_ops->microcode_fini_cpu(cpu); |
352 | uci->valid = 0; | |
280a9ca5 DA |
353 | } |
354 | ||
871b72dd | 355 | static enum ucode_state microcode_resume_cpu(int cpu) |
d45de409 DA |
356 | { |
357 | struct ucode_cpu_info *uci = ucode_cpu_info + cpu; | |
358 | ||
871b72dd DA |
359 | if (!uci->mc) |
360 | return UCODE_NFOUND; | |
361 | ||
362 | pr_debug("microcode: CPU%d updated upon resume\n", cpu); | |
363 | apply_microcode_on_target(cpu); | |
364 | ||
365 | return UCODE_OK; | |
d45de409 DA |
366 | } |
367 | ||
871b72dd | 368 | static enum ucode_state microcode_init_cpu(int cpu) |
d45de409 | 369 | { |
871b72dd | 370 | enum ucode_state ustate; |
d45de409 | 371 | |
871b72dd DA |
372 | if (collect_cpu_info(cpu)) |
373 | return UCODE_ERROR; | |
d45de409 | 374 | |
871b72dd DA |
375 | /* --dimm. Trigger a delayed update? */ |
376 | if (system_state != SYSTEM_RUNNING) | |
377 | return UCODE_NFOUND; | |
d45de409 | 378 | |
871b72dd | 379 | ustate = microcode_ops->request_microcode_fw(cpu, µcode_pdev->dev); |
d45de409 | 380 | |
871b72dd DA |
381 | if (ustate == UCODE_OK) { |
382 | pr_debug("microcode: CPU%d updated upon init\n", cpu); | |
383 | apply_microcode_on_target(cpu); | |
d45de409 DA |
384 | } |
385 | ||
871b72dd | 386 | return ustate; |
d45de409 DA |
387 | } |
388 | ||
871b72dd | 389 | static enum ucode_state microcode_update_cpu(int cpu) |
d45de409 | 390 | { |
871b72dd DA |
391 | struct ucode_cpu_info *uci = ucode_cpu_info + cpu; |
392 | enum ucode_state ustate; | |
d45de409 | 393 | |
9f15226e | 394 | if (uci->valid && uci->mc) |
871b72dd DA |
395 | ustate = microcode_resume_cpu(cpu); |
396 | else | |
397 | ustate = microcode_init_cpu(cpu); | |
d45de409 | 398 | |
871b72dd | 399 | return ustate; |
d45de409 DA |
400 | } |
401 | ||
402 | static int mc_sysdev_add(struct sys_device *sys_dev) | |
3e135d88 PO |
403 | { |
404 | int err, cpu = sys_dev->id; | |
3e135d88 PO |
405 | |
406 | if (!cpu_online(cpu)) | |
407 | return 0; | |
408 | ||
409 | pr_debug("microcode: CPU%d added\n", cpu); | |
3e135d88 PO |
410 | |
411 | err = sysfs_create_group(&sys_dev->kobj, &mc_attr_group); | |
412 | if (err) | |
413 | return err; | |
414 | ||
871b72dd DA |
415 | if (microcode_init_cpu(cpu) == UCODE_ERROR) |
416 | err = -EINVAL; | |
af5c820a RR |
417 | |
418 | return err; | |
3e135d88 PO |
419 | } |
420 | ||
3e135d88 PO |
421 | static int mc_sysdev_remove(struct sys_device *sys_dev) |
422 | { | |
423 | int cpu = sys_dev->id; | |
424 | ||
425 | if (!cpu_online(cpu)) | |
426 | return 0; | |
427 | ||
428 | pr_debug("microcode: CPU%d removed\n", cpu); | |
d45de409 | 429 | microcode_fini_cpu(cpu); |
3e135d88 PO |
430 | sysfs_remove_group(&sys_dev->kobj, &mc_attr_group); |
431 | return 0; | |
432 | } | |
433 | ||
434 | static int mc_sysdev_resume(struct sys_device *dev) | |
435 | { | |
436 | int cpu = dev->id; | |
871b72dd | 437 | struct ucode_cpu_info *uci = ucode_cpu_info + cpu; |
3e135d88 PO |
438 | |
439 | if (!cpu_online(cpu)) | |
440 | return 0; | |
a1c75cc5 | 441 | |
871b72dd DA |
442 | /* |
443 | * All non-bootup cpus are still disabled, | |
444 | * so only CPU 0 will apply ucode here. | |
445 | * | |
446 | * Moreover, there can be no concurrent | |
447 | * updates from any other places at this point. | |
448 | */ | |
449 | WARN_ON(cpu != 0); | |
450 | ||
451 | if (uci->valid && uci->mc) | |
452 | microcode_ops->apply_microcode(cpu); | |
453 | ||
3e135d88 PO |
454 | return 0; |
455 | } | |
456 | ||
457 | static struct sysdev_driver mc_sysdev_driver = { | |
871b72dd DA |
458 | .add = mc_sysdev_add, |
459 | .remove = mc_sysdev_remove, | |
460 | .resume = mc_sysdev_resume, | |
3e135d88 PO |
461 | }; |
462 | ||
463 | static __cpuinit int | |
464 | mc_cpu_callback(struct notifier_block *nb, unsigned long action, void *hcpu) | |
465 | { | |
466 | unsigned int cpu = (unsigned long)hcpu; | |
467 | struct sys_device *sys_dev; | |
468 | ||
469 | sys_dev = get_cpu_sysdev(cpu); | |
470 | switch (action) { | |
3e135d88 | 471 | case CPU_ONLINE: |
3e135d88 | 472 | case CPU_ONLINE_FROZEN: |
871b72dd | 473 | microcode_update_cpu(cpu); |
d45de409 | 474 | case CPU_DOWN_FAILED: |
3e135d88 | 475 | case CPU_DOWN_FAILED_FROZEN: |
d45de409 | 476 | pr_debug("microcode: CPU%d added\n", cpu); |
3e135d88 | 477 | if (sysfs_create_group(&sys_dev->kobj, &mc_attr_group)) |
871b72dd | 478 | pr_err("microcode: Failed to create group for CPU%d\n", cpu); |
3e135d88 PO |
479 | break; |
480 | case CPU_DOWN_PREPARE: | |
3e135d88 PO |
481 | case CPU_DOWN_PREPARE_FROZEN: |
482 | /* Suspend is in progress, only remove the interface */ | |
483 | sysfs_remove_group(&sys_dev->kobj, &mc_attr_group); | |
d45de409 DA |
484 | pr_debug("microcode: CPU%d removed\n", cpu); |
485 | break; | |
486 | case CPU_DEAD: | |
487 | case CPU_UP_CANCELED_FROZEN: | |
488 | /* The CPU refused to come up during a system resume */ | |
489 | microcode_fini_cpu(cpu); | |
3e135d88 PO |
490 | break; |
491 | } | |
492 | return NOTIFY_OK; | |
493 | } | |
494 | ||
495 | static struct notifier_block __refdata mc_cpu_notifier = { | |
4bae1967 | 496 | .notifier_call = mc_cpu_callback, |
3e135d88 PO |
497 | }; |
498 | ||
18dbc916 | 499 | static int __init microcode_init(void) |
3e135d88 | 500 | { |
18dbc916 | 501 | struct cpuinfo_x86 *c = &cpu_data(0); |
3e135d88 PO |
502 | int error; |
503 | ||
18dbc916 DA |
504 | if (c->x86_vendor == X86_VENDOR_INTEL) |
505 | microcode_ops = init_intel_microcode(); | |
82b07865 | 506 | else if (c->x86_vendor == X86_VENDOR_AMD) |
18dbc916 | 507 | microcode_ops = init_amd_microcode(); |
8d86f390 | 508 | |
18dbc916 | 509 | if (!microcode_ops) { |
871b72dd | 510 | pr_err("microcode: no support for this CPU vendor\n"); |
18dbc916 DA |
511 | return -ENODEV; |
512 | } | |
3e135d88 | 513 | |
3e135d88 PO |
514 | microcode_pdev = platform_device_register_simple("microcode", -1, |
515 | NULL, 0); | |
516 | if (IS_ERR(microcode_pdev)) { | |
517 | microcode_dev_exit(); | |
518 | return PTR_ERR(microcode_pdev); | |
519 | } | |
520 | ||
d1c84f79 AH |
521 | if (microcode_ops->init) |
522 | microcode_ops->init(µcode_pdev->dev); | |
523 | ||
3e135d88 | 524 | get_online_cpus(); |
871b72dd DA |
525 | mutex_lock(µcode_mutex); |
526 | ||
3e135d88 | 527 | error = sysdev_driver_register(&cpu_sysdev_class, &mc_sysdev_driver); |
871b72dd DA |
528 | |
529 | mutex_unlock(µcode_mutex); | |
3e135d88 | 530 | put_online_cpus(); |
871b72dd | 531 | |
3e135d88 | 532 | if (error) { |
3e135d88 PO |
533 | platform_device_unregister(microcode_pdev); |
534 | return error; | |
535 | } | |
536 | ||
871b72dd DA |
537 | error = microcode_dev_init(); |
538 | if (error) | |
539 | return error; | |
540 | ||
3e135d88 | 541 | register_hotcpu_notifier(&mc_cpu_notifier); |
8d86f390 | 542 | |
871b72dd | 543 | pr_info("Microcode Update Driver: v" MICROCODE_VERSION |
36b75da2 PO |
544 | " <tigran@aivazian.fsnet.co.uk>," |
545 | " Peter Oruba\n"); | |
8d86f390 | 546 | |
3e135d88 PO |
547 | return 0; |
548 | } | |
871b72dd | 549 | module_init(microcode_init); |
3e135d88 | 550 | |
18dbc916 | 551 | static void __exit microcode_exit(void) |
3e135d88 PO |
552 | { |
553 | microcode_dev_exit(); | |
554 | ||
555 | unregister_hotcpu_notifier(&mc_cpu_notifier); | |
556 | ||
557 | get_online_cpus(); | |
871b72dd DA |
558 | mutex_lock(µcode_mutex); |
559 | ||
3e135d88 | 560 | sysdev_driver_unregister(&cpu_sysdev_class, &mc_sysdev_driver); |
871b72dd DA |
561 | |
562 | mutex_unlock(µcode_mutex); | |
3e135d88 PO |
563 | put_online_cpus(); |
564 | ||
565 | platform_device_unregister(microcode_pdev); | |
3e135d88 | 566 | |
d1c84f79 AH |
567 | if (microcode_ops->fini) |
568 | microcode_ops->fini(); | |
569 | ||
8d86f390 PO |
570 | microcode_ops = NULL; |
571 | ||
871b72dd | 572 | pr_info("Microcode Update Driver: v" MICROCODE_VERSION " removed.\n"); |
8d86f390 | 573 | } |
18dbc916 | 574 | module_exit(microcode_exit); |